2026-05-03 01:31:22.518 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.37.20:5700'
2026-05-03 01:31:22.518 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.37.20:5802)
2026-05-03 01:31:22.518 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.37.20:5801)
2026-05-03 01:31:22.518 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.37.22:6700'
2026-05-03 01:31:22.518 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.37.22:6802)
2026-05-03 01:31:22.518 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.37.22:6801)
2026-05-03 01:31:22.518 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.37.20:5700/1'
2026-05-03 01:31:22.518 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.37.20:5804)
2026-05-03 01:31:22.518 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.37.20:5803)
2026-05-03 01:31:22.518 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.37.20:5700/2'
2026-05-03 01:31:22.518 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.37.20:5806)
2026-05-03 01:31:22.518 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.37.20:5805)
2026-05-03 01:31:22.518 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.37.20:5700/3'
2026-05-03 01:31:22.518 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.37.20:5808)
2026-05-03 01:31:22.518 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.37.20:5807)
2026-05-03 01:31:22.518 [INFO] fake_trx.py:429 Init complete
2026-05-03 01:31:22.518 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-05-03 01:31:23.111 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:31:23.111 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:31:23.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:31:23.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:31:23.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:31:23.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:31:27.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:31:27.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:31:27.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:27.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:31:27.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 0 -> 1
2026-05-03 01:31:27.120 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:31:27.120 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:31:27.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:31:27.120 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:27.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:31:27.121 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:31:27.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:31:27.121 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 0 -> 1
2026-05-03 01:31:27.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:31:27.126 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:31:27.126 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:31:27.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:31:27.126 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:27.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:31:27.127 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:31:27.127 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:31:27.127 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 0 -> 1
2026-05-03 01:31:27.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:31:27.132 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:31:27.132 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:31:27.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:31:27.132 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:27.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:31:27.132 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:31:27.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:31:27.132 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 0 -> 1
2026-05-03 01:31:27.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:31:27.137 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:31:27.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:31:27.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:31:27.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:31:27.137 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:31:27.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:31:27.137 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:31:27.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:31:27.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:31:27.138 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:31:27.138 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:31:27.138 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:31:27.138 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:31:27.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:27.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:27.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:27.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:27.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:27.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:27.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:27.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:27.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:27.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:27.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:27.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:27.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:27.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:27.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:27.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:27.143 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:31:27.621 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:31:27.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:27.681 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:31:27.683 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:31:27.684 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:31:27.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:27.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:27.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:27.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:27.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:27.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:27.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:27.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:27.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:27.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:27.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:27.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:27.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:28.093 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:31:28.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:31:28.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:31:28.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:31:28.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:31:28.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:28.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:28.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:28.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:28.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:28.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:28.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:28.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:28.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:28.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:28.321 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:28.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:28.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:28.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:28.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:28.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:28.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:28.564 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:31:28.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:28.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:28.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:28.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:28.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:28.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:28.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:28.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:28.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:28.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:28.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:28.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:28.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:29.037 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:31:29.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:29.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:29.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:29.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:29.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:31:29.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:31:29.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:31:29.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:31:29.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:29.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:29.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:29.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:29.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:29.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:29.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:29.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:29.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:29.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:29.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:29.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:29.509 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:31:29.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:29.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:29.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:29.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:29.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:29.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:29.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:29.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:29.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:29.981 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:31:29.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:29.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:29.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:29.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:29.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:29.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:29.983 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:29.983 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:30.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:30.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:31:30.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:31:30.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:31:30.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:31:30.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:30.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:30.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:30.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:30.453 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:31:30.926 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:31:30.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:30.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:30.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:30.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:31.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:31.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:31.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:31.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:31.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:31.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:31.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:31.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:31.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:31.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:31:31.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:31:31.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:31:31.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:31:31.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:31.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:31.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:31.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:31.399 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:31:31.871 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:31:32.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:32.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:32.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:32.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:32.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:32.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:32.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:32.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:32.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:32.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:32.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:32.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:32.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:32.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:32.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:32.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:32.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:32.342 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:31:32.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:32.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:32.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:32.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:32.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:32.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:32.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:32.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:32.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:32.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:32.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:32.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:32.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:32.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:32.815 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:31:32.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:32.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:32.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:32.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:33.288 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:31:33.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:33.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:33.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:33.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:33.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:33.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:33.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:33.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:33.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:33.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:33.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:33.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:33.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:33.769 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:31:33.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:33.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:33.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:33.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:34.241 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:31:34.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:34.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:34.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:34.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:34.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:34.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:34.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:34.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:34.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:34.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:34.632 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:34.632 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:34.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:34.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:34.712 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:31:34.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:34.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:34.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:34.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:35.183 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:31:35.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:35.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:35.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:35.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:35.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:35.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:35.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:35.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:35.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:35.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:35.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:35.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:35.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:35.657 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:31:35.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:35.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:35.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:35.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:36.129 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:31:36.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:36.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:36.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:36.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:36.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:36.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:36.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:36.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:36.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:36.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:36.496 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:36.496 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:36.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:36.601 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:31:36.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:36.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:36.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:36.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:37.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:37.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:37.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:37.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:37.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:37.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:37.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:37.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:37.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:37.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:37.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:37.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:37.072 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:31:37.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:37.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:37.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:37.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:37.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:37.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:37.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:37.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:37.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:37.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:37.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:37.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:37.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:37.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:37.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:37.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:37.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:37.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:37.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:37.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:37.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:37.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:37.543 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:31:37.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:37.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:37.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:37.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:37.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:37.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:37.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:37.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:37.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:37.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:37.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:37.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:37.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:37.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:37.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:37.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:37.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:38.013 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:31:38.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:38.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:38.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:38.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:38.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:38.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:38.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:38.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:38.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:38.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:38.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:38.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:38.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:38.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:38.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:38.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:38.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:38.484 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:31:38.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:38.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:38.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:38.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:38.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:38.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:38.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:38.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:38.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:38.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:38.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:38.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:38.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:38.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:38.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:38.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:38.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:38.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:38.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:38.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:38.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:38.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:38.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:38.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:38.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:38.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:38.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:38.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:38.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:38.957 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:31:38.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:39.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:39.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:39.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:39.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:39.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:39.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:39.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:39.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:39.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:39.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:39.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:39.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:39.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:39.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:39.384 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:39.384 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:39.430 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:31:39.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:39.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:39.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:39.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:39.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:39.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:39.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:39.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:39.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:39.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:39.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:39.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:39.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:39.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:39.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:39.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:31:39.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:31:39.901 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:31:39.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:39.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:31:39.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:31:39.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:39.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:40.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:31:40.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:40.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:40.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:40.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:31:40.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:31:40.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:31:40.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:31:40.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:31:40.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:31:40.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:31:40.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:31:40.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:31:40.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:31:40.360 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:31:45.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:31:45.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:31:45.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:31:45.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:31:45.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:31:45.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:31:45.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:31:45.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:31:45.375 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:45.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:31:45.375 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:31:45.378 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:31:45.378 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:31:45.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:31:45.378 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:45.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:31:45.378 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:31:45.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:31:45.378 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:31:45.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:31:45.381 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:31:45.381 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:31:45.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:31:45.381 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:45.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:31:45.382 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:31:45.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:31:45.382 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:31:45.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:31:45.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:31:45.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:31:45.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:31:45.384 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:45.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:31:45.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:31:45.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:31:45.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:31:45.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:45.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:31:45.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:31:45.388 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:31:45.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:45.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:45.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:31:45.871 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:31:45.917 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:31:45.920 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:31:45.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.922 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:31:45.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:45.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:45.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:45.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:45.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:46.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:46.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:46.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:46.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:46.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:46.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:46.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.336 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:31:46.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:46.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:46.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:46.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:31:46.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:31:46.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:31:46.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:31:46.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:46.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:46.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:46.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:46.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:46.801 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-05-03 01:31:47.265 [DEBUG] clck_gen.py:113 IND CLOCK 408
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2026-05-03 01:31:47.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:31:47.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:31:47.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:31:47.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:31:47.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:47.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:47.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:47.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:47.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:47.731 [DEBUG] clck_gen.py:113 IND CLOCK 510
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2026-05-03 01:31:48.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 01:31:48.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.196 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:31:48.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:48.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:31:48.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:31:48.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:31:48.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:31:48.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:31:48.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:31:48.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:31:48.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:31:48.367 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:31:48.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:31:48.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:31:53.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:31:53.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:31:53.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:31:53.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:31:53.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:31:53.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:31:53.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:31:53.381 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:31:53.381 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:53.381 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:31:53.381 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:31:53.384 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:31:53.385 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:31:53.385 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:31:53.385 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:53.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:31:53.386 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:31:53.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:31:53.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:31:53.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:31:53.388 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:31:53.388 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:31:53.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:31:53.389 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:53.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:31:53.389 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:31:53.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:31:53.390 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:31:53.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:31:53.391 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:31:53.391 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:31:53.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:31:53.391 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:53.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:31:53.392 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:31:53.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:31:53.392 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:31:53.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:53.395 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:31:53.395 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:31:53.395 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:31:53.396 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:53.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:53.400 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:31:53.878 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:31:53.923 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:31:53.925 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:31:53.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:53.928 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:31:53.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:53.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:53.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:53.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:53.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:53.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:31:53.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:31:53.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:31:53.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:31:53.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:31:53.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:31:53.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:31:53.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:31:53.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:31:53.982 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:31:53.982 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:31:53.983 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:31:53.983 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:31:53.983 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:31:53.983 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:31:53.983 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:31:53.983 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:31:53.983 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:31:58.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:31:58.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:31:58.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:31:58.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:31:58.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:31:58.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:31:58.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:31:58.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:31:58.991 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:58.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:31:58.992 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:31:58.992 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:31:58.992 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:31:58.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:31:58.993 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:58.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:31:58.993 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:31:58.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:31:58.993 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:31:58.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:31:58.993 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:31:58.993 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:31:58.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:31:58.994 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:58.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:31:58.994 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:31:58.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:31:58.994 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:31:58.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:31:58.995 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:31:58.996 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:31:58.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:31:58.996 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:31:58.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:31:58.996 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:31:58.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:31:58.996 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:31:58.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:31:58.999 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:31:58.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:31:58.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:31:58.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:31:58.999 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:31:58.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:31:58.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:31:58.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:58.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:31:58.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:31:58.999 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:31:59.000 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:31:59.000 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:31:59.000 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:59.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:59.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:59.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:59.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:31:59.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:59.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:59.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:59.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:59.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:59.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:31:59.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:59.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:31:59.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:31:59.004 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:31:59.482 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:31:59.526 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:31:59.528 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:31:59.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:31:59.530 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:31:59.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:31:59.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:31:59.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:31:59.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:31:59.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:31:59.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:31:59.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:31:59.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:31:59.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:31:59.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:31:59.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:31:59.569 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:31:59.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:31:59.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:31:59.569 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:31:59.569 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:31:59.569 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:31:59.569 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:31:59.569 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:31:59.569 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:31:59.569 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:32:04.572 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:32:04.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:32:04.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:32:04.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:32:04.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:32:04.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:32:04.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:32:04.580 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:32:04.581 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:32:04.581 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:32:04.581 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:32:04.584 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:32:04.584 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:32:04.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:32:04.584 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:32:04.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:32:04.585 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:32:04.585 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:32:04.585 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:32:04.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:32:04.586 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:32:04.586 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:32:04.587 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:32:04.587 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:32:04.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:32:04.587 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:32:04.587 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:32:04.587 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:32:04.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:32:04.589 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:32:04.589 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:32:04.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:32:04.589 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:32:04.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:32:04.589 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:32:04.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:32:04.589 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:32:04.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:32:04.591 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:32:04.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:32:04.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:32:04.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:32:04.591 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:32:04.592 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:32:04.592 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:32:04.592 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:04.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:04.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:04.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:04.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:04.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:04.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:04.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:04.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:04.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:04.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:04.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:04.597 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:32:05.075 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:32:05.116 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:32:05.118 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:32:05.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:05.119 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:32:05.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:05.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:05.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:05.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:05.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:05.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:05.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:05.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:05.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:05.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:05.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:05.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:05.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:05.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:05.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:05.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:05.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:05.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:05.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:05.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:05.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:05.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:05.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:05.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:05.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:05.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:05.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:05.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:05.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:05.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:05.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:05.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:05.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:05.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:05.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:05.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:05.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:05.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:05.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:05.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:32:05.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:32:05.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:32:05.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:32:05.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:32:05.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:32:05.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:32:05.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:32:05.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:32:05.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:32:05.237 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:32:05.237 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=139 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:32:05.238 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=139 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:32:05.238 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=139 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:32:05.238 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:32:05.238 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:32:05.238 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:32:05.238 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:32:10.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:32:10.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:32:10.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:32:10.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:32:10.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:32:10.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:32:10.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:32:10.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:32:10.254 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:32:10.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:32:10.254 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:32:10.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:32:10.257 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:32:10.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:32:10.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:32:10.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:32:10.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:32:10.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:32:10.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:32:10.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:32:10.259 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:32:10.259 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:32:10.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:32:10.259 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:32:10.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:32:10.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:32:10.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:32:10.259 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:32:10.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:32:10.261 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:32:10.261 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:32:10.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:32:10.261 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:32:10.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:32:10.261 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:32:10.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:32:10.261 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:32:10.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:32:10.264 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:32:10.264 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:32:10.264 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:32:10.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:10.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:10.269 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:32:10.747 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:32:10.787 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:32:10.789 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:32:10.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:10.792 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:32:10.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:10.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:10.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:10.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:10.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:10.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:10.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:32:10.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:32:10.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:10.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:10.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:10.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:10.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:10.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:11.220 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:32:11.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:32:11.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:32:11.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:32:11.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:32:11.693 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:32:12.166 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:32:12.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:32:12.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:32:12.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:32:12.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:32:12.638 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:32:13.111 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:32:13.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:32:13.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:32:13.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:32:13.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:32:13.584 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:32:14.056 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:32:14.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:32:14.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:32:14.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:32:14.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:32:14.527 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:32:14.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:14.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:14.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:14.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:14.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:14.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:14.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:14.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:14.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:14.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:14.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:32:14.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:32:14.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:15.000 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:32:15.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:15.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:15.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:15.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:15.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:15.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:32:15.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:32:15.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:32:15.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:32:15.473 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:32:15.945 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:32:16.419 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:32:16.891 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:32:17.363 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:32:17.834 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:32:18.308 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:32:18.780 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:32:19.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:19.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:19.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:19.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:19.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:19.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:19.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:19.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:19.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:19.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:19.231 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:32:19.231 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:32:19.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:19.252 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:32:19.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:19.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:19.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:19.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:19.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:19.723 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:32:20.197 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:32:20.668 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:32:21.141 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:32:21.611 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:32:22.085 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:32:22.557 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:32:23.029 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:32:23.500 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:32:23.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:23.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:23.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:23.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:23.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:23.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:23.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:23.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:23.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:23.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:23.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:32:23.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:32:23.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:23.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:23.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:23.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:23.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:23.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:23.971 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:32:24.444 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:32:24.917 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:32:25.389 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:32:25.860 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:32:26.331 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:32:26.804 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:32:27.276 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:32:27.748 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:32:27.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:27.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:27.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:27.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:27.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:27.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:27.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:27.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:27.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:27.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:27.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:32:27.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:32:28.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:28.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:28.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:28.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:28.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:28.220 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:32:28.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:28.693 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:32:29.166 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:32:29.638 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:32:30.109 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:32:30.583 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:32:31.055 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:32:31.528 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:32:32.002 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:32:32.474 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 01:32:32.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:32.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:32.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:32.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:32.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:32.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:32.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:32.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:32.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:32.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:32.584 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:32:32.584 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:32:32.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:32.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:32.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:32.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:32.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:32.945 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 01:32:33.419 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 01:32:33.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:33.891 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 01:32:34.364 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 01:32:34.837 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 01:32:35.310 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 01:32:35.782 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 01:32:36.256 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 01:32:36.729 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 01:32:37.201 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 01:32:37.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:37.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:37.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:37.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:37.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:37.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:37.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:37.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:37.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:37.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:37.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:32:37.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:32:37.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:37.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:37.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:37.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:37.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:37.672 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 01:32:38.146 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 01:32:38.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:38.618 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 01:32:39.089 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 01:32:39.562 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 01:32:40.035 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 01:32:40.508 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 01:32:40.981 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 01:32:41.454 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 01:32:41.926 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 01:32:42.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:42.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:42.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:42.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:42.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:42.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:42.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:42.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:42.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:42.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:42.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:32:42.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:32:42.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:42.399 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 01:32:42.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:42.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:42.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:42.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:42.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:42.872 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 01:32:43.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:43.345 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 01:32:43.815 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 01:32:44.286 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 01:32:44.757 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 01:32:45.228 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 01:32:45.701 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 01:32:46.174 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 01:32:46.646 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 01:32:47.120 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 01:32:47.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:47.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:47.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:47.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:47.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:47.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:47.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:47.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:47.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:47.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:47.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:32:47.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:32:47.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:47.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:47.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:47.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:47.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:47.592 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 01:32:48.064 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 01:32:48.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:48.537 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 01:32:49.010 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 01:32:49.481 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 01:32:49.954 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 01:32:50.427 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 01:32:50.899 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 01:32:51.370 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 01:32:51.841 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 01:32:52.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:52.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:52.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:52.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:52.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:52.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:52.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:52.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:52.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:52.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:52.097 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:32:52.097 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:32:52.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:32:52.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:52.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:52.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:52.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:52.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:52.311 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 01:32:52.783 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 01:32:52.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:53.253 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 01:32:53.727 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 01:32:54.199 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 01:32:54.671 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 01:32:55.144 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 01:32:55.616 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 01:32:56.089 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 01:32:56.562 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 01:32:56.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:56.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:56.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:56.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:56.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:32:56.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:32:56.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:32:56.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:56.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:56.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:56.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:32:56.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:32:56.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:56.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:32:56.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:32:56.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:56.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:32:57.035 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 01:32:57.507 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 01:32:57.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:32:57.981 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 01:32:58.453 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-03 01:32:58.925 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-03 01:32:59.396 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-03 01:32:59.870 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-03 01:33:00.342 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-03 01:33:00.813 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-03 01:33:01.284 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-03 01:33:01.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:01.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:01.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:01.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:01.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:01.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:01.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:01.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:01.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:01.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:01.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:01.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:01.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:01.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:01.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:01.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:01.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:01.755 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-03 01:33:02.229 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-03 01:33:02.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:02.701 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-03 01:33:03.175 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-03 01:33:03.647 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-03 01:33:04.120 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-03 01:33:04.591 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-03 01:33:05.061 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-03 01:33:05.532 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-03 01:33:06.003 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-03 01:33:06.476 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-03 01:33:06.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:06.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:06.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:06.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:06.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:06.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:06.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:06.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:06.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:06.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:06.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:06.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:06.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:06.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:06.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:06.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:06.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:06.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:06.949 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-03 01:33:07.421 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-03 01:33:07.894 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-03 01:33:08.367 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-03 01:33:08.839 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-03 01:33:09.310 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-03 01:33:09.783 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-03 01:33:10.256 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-03 01:33:10.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:10.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:10.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:10.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:10.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:10.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:10.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:10.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:10.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:10.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:10.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:10.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:10.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:10.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:10.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:10.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:10.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:10.727 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-03 01:33:10.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:11.199 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-03 01:33:11.672 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-03 01:33:12.144 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-03 01:33:12.616 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-03 01:33:13.087 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-03 01:33:13.561 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-03 01:33:14.033 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-03 01:33:14.505 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-03 01:33:14.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:14.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:14.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:14.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:14.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:14.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:14.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:14.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:14.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:14.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:14.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:14.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:14.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:14.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:14.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:14.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:14.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:14.975 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-03 01:33:15.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:15.446 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-03 01:33:15.920 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-03 01:33:16.392 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-03 01:33:16.863 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-03 01:33:17.335 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-03 01:33:17.808 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-03 01:33:18.281 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-03 01:33:18.753 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-03 01:33:19.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:19.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:19.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:19.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:19.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:19.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:19.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:19.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:19.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:19.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:19.182 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:19.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:19.224 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-03 01:33:19.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:19.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:19.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:19.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:19.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:19.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:19.694 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-03 01:33:20.168 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-03 01:33:20.640 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-03 01:33:21.112 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-03 01:33:21.578 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-03 01:33:22.052 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-03 01:33:22.524 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-03 01:33:22.996 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-03 01:33:23.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:23.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:23.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:23.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:23.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:23.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:23.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:23.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:23.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:23.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:23.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:23.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:23.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:23.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:23.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:23.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:23.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:23.467 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-03 01:33:23.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:23.938 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-03 01:33:24.412 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-03 01:33:24.883 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-03 01:33:25.356 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-03 01:33:25.829 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-03 01:33:26.301 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-03 01:33:26.773 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-03 01:33:27.244 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-03 01:33:27.718 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-03 01:33:27.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:27.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:27.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:27.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:27.863 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=16762 tn=7 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:33:27.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:27.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:27.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:27.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:27.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:27.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:27.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:27.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:27.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:27.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:27.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:27.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:27.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:28.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:28.190 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-03 01:33:28.662 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-03 01:33:29.133 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-03 01:33:29.607 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-03 01:33:30.079 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-03 01:33:30.551 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-03 01:33:31.022 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-03 01:33:31.496 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-03 01:33:31.968 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-03 01:33:32.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:32.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:32.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:32.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:32.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:32.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:32.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:32.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:32.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:32.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:32.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:32.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:32.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:32.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:32.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:32.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:32.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:32.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:32.440 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-03 01:33:32.911 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-03 01:33:33.382 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-03 01:33:33.856 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-03 01:33:34.328 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-03 01:33:34.799 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-03 01:33:35.271 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-03 01:33:35.744 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-03 01:33:36.216 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-03 01:33:36.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:36.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:36.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:36.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:36.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:36.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:36.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:36.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:36.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:36.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:36.421 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:36.421 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:36.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:36.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:36.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:36.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:36.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:36.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:36.688 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-03 01:33:37.160 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-03 01:33:37.633 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-03 01:33:38.105 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-03 01:33:38.578 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-03 01:33:39.049 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-03 01:33:39.522 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-03 01:33:39.994 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-03 01:33:40.467 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-03 01:33:40.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:40.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:40.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:40.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:40.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:33:40.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:33:40.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:33:40.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:33:40.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:33:40.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:33:40.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:33:40.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:33:40.690 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:33:40.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:33:40.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:33:45.695 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:33:45.695 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:33:45.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:33:45.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:33:45.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:33:45.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:33:45.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:33:45.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:33:45.703 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:33:45.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:33:45.703 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:33:45.706 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:33:45.706 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:33:45.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:33:45.707 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:33:45.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:33:45.707 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:33:45.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:33:45.708 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:33:45.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:33:45.710 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:33:45.710 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:33:45.710 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:33:45.710 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:33:45.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:33:45.710 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:33:45.710 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:33:45.710 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:33:45.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:33:45.713 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:33:45.713 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:33:45.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:33:45.713 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:33:45.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:33:45.714 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:33:45.714 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:33:45.714 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:33:45.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:33:45.717 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:33:45.717 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:33:45.717 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:33:45.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:33:45.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:33:45.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:33:45.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:33:45.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:33:45.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:33:45.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:33:45.718 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:33:45.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:33:45.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:33:45.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:33:50.727 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:33:50.727 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:33:50.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:33:50.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:33:50.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:33:50.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:33:50.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:33:50.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:33:50.736 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:33:50.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:33:50.737 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:33:50.741 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:33:50.742 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:33:50.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:33:50.742 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:33:50.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:33:50.743 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:33:50.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:33:50.743 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:33:50.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:33:50.745 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:33:50.745 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:33:50.745 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:33:50.745 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:33:50.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:33:50.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:33:50.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:33:50.746 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:33:50.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:33:50.748 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:33:50.748 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:33:50.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:33:50.748 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:33:50.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:33:50.748 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:33:50.749 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:33:50.749 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:33:50.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:33:50.751 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:33:50.752 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:33:50.752 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:33:50.752 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:33:50.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:33:50.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:33:50.757 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:33:51.234 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:33:51.280 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:33:51.282 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:33:51.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:51.285 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:33:51.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:51.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:51.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:51.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:51.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:51.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:51.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:51.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:51.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:51.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:51.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:51.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:51.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:51.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:51.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:51.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:51.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:51.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:51.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:51.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:51.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:51.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:51.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:51.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:51.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:51.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:51.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:51.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:51.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:51.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:51.703 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:33:51.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:33:51.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:33:51.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:33:51.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:33:51.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:51.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:51.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:51.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:51.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:51.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:51.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:51.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:51.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:51.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:51.945 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:51.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:51.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:51.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:51.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:51.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:51.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:52.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:52.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:52.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:52.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:52.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:52.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:52.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:52.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:52.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:52.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:52.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:52.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:52.176 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:33:52.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:52.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:52.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:52.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:52.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:52.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:52.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:52.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:52.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:52.647 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:33:52.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:52.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:52.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:52.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:52.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:52.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:52.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:52.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:52.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:52.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:52.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:52.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:52.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:52.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:33:52.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:33:52.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:33:52.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:33:53.119 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:33:53.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:53.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:53.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:53.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:53.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:53.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:53.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:53.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:53.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:53.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:53.178 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:53.178 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:53.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:53.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:53.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:53.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:53.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:53.590 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:33:53.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:53.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:53.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:53.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:53.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:53.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:53.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:53.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:53.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:53.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:53.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:53.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:53.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:53.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:33:53.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:33:53.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:33:53.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:33:53.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:53.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:53.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:53.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:54.063 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:33:54.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:54.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:54.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:54.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:54.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:54.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:54.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:54.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:54.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:54.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:54.255 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:54.255 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:54.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:33:54.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:54.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:54.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:54.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:54.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:54.535 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:33:54.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:33:54.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:33:54.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:33:54.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:33:54.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:54.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:54.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:54.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:54.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:54.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:54.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:54.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:54.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:54.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:54.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:54.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:54.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:54.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:54.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:54.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:54.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:55.007 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:33:55.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:55.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:55.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:55.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:55.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:55.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:55.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:55.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:55.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:55.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:55.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:55.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:55.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:33:55.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:55.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:55.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:55.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:55.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:55.479 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:33:55.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:33:55.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:33:55.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:33:55.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:33:55.952 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:33:56.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:56.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:56.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:56.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:56.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:56.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:56.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:56.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:56.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:56.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:56.247 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:56.247 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:56.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:56.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:56.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:56.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:56.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:56.424 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:33:56.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:56.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:56.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:56.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:56.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:56.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:56.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:56.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:56.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:56.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:56.727 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:56.727 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:56.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:56.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:56.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:56.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:56.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:56.896 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:33:57.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:57.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:57.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:57.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:57.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:57.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:57.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:57.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:57.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:57.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:57.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:57.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:57.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:57.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:57.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:57.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:57.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:57.366 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:33:57.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:57.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:57.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:57.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:57.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:57.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:57.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:57.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:57.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:57.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:57.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:57.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:57.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:57.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:57.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:57.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:57.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:57.840 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:33:58.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:58.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:58.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:58.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:58.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:58.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:58.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:58.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:58.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:58.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:58.035 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:58.035 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:58.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:58.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:58.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:58.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:58.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:58.312 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:33:58.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:58.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:58.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:58.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:58.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:58.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:58.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:58.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:58.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:58.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:58.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:58.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:58.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:58.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:58.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:58.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:58.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:58.783 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:33:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:58.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:58.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:58.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:59.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:59.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:59.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:59.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:59.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:59.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:59.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:59.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:59.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:59.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:59.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:59.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:59.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:59.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:59.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:59.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:59.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:59.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:59.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:59.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:59.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:59.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:59.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:59.198 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:59.198 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:59.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:59.254 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:33:59.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:59.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:59.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:59.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:59.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:59.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:59.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:59.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:59.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:33:59.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:33:59.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:33:59.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:59.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:59.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:59.682 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:33:59.682 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:33:59.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:33:59.727 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:33:59.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:33:59.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:33:59.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:33:59.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:00.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:00.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:00.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:00.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:00.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:00.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:00.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:00.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:00.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:00.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:00.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:00.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:00.200 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:34:00.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:00.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:00.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:00.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:00.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:00.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:00.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:00.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:00.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:00.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:34:00.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:34:00.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:34:00.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:34:00.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:34:00.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:34:00.665 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:34:00.665 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:34:00.665 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:34:00.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:34:00.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:34:00.666 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2142 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:34:00.666 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2142 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:34:00.666 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:34:00.666 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:34:00.666 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:34:00.667 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:34:00.667 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:34:05.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:34:05.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:34:05.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:34:05.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:34:05.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:34:05.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:34:05.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:34:05.676 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:34:05.676 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:34:05.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:34:05.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:34:05.680 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:34:05.680 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:34:05.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:34:05.681 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:34:05.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:34:05.682 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:34:05.682 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:34:05.683 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:34:05.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:34:05.685 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:34:05.685 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:34:05.686 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:34:05.686 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:34:05.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:34:05.686 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:34:05.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:34:05.687 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:34:05.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:34:05.690 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:34:05.690 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:34:05.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:34:05.690 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:34:05.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:34:05.691 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:34:05.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:34:05.691 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:34:05.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:34:05.696 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:34:05.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:34:05.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:34:05.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:34:05.696 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:34:05.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:34:05.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:34:05.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:05.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:34:05.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:34:05.696 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:34:05.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:05.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:05.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:05.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:34:05.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:05.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:05.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:05.697 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:34:05.697 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:34:05.697 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:34:05.697 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:34:05.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:05.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:05.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:05.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:05.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:05.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:05.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:05.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:05.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:05.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:05.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:05.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:05.702 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:34:06.180 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:34:06.225 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:34:06.226 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:34:06.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:06.227 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:34:06.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:06.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:06.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:06.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:06.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:06.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:06.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:06.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:06.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:06.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:06.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:06.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:06.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:06.651 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:34:06.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:34:06.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:34:06.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:34:06.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:34:06.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:06.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:07.123 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:34:07.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:07.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:07.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:07.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:07.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:07.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:07.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:07.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:07.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:07.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:07.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:07.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:07.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:07.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:07.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:07.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:07.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:07.596 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:34:07.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:34:07.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:34:07.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:34:07.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:34:08.068 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:34:08.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:08.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:08.541 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:34:08.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:34:08.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:34:08.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:34:08.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:34:08.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:08.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:08.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:08.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:08.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:08.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:08.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:08.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:08.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:08.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:08.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:08.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:08.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:08.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:08.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:08.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:08.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:09.013 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:34:09.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:09.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:09.486 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:34:09.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:34:09.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:34:09.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:34:09.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:34:09.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:09.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:09.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:09.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:09.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:09.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:09.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:09.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:09.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:09.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:09.945 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:09.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:09.958 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:34:09.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:09.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:09.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:09.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:09.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:10.429 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:34:10.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:34:10.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:34:10.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:34:10.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:34:10.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:10.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:10.903 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:34:11.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:11.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:11.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:11.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:11.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:11.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:11.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:11.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:11.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:11.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:11.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:11.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:11.375 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:34:11.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:11.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:11.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:11.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:11.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:11.847 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:34:12.321 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:34:12.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:12.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:12.793 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:34:12.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:12.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:12.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:12.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:12.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:12.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:12.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:12.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:12.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:12.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:12.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:12.946 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:12.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:12.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:12.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:12.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:12.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:13.266 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:34:13.737 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:34:13.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:13.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:14.210 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:34:14.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:14.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:14.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:14.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:14.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:14.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:14.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:14.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:14.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:14.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:14.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:14.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:14.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:14.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:14.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:14.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:14.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:14.683 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:34:15.155 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:34:15.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:15.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:15.626 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:34:15.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:15.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:15.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:15.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:15.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:15.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:15.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:15.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:15.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:15.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:15.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:15.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:15.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:16.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:16.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:16.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:16.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:16.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:16.097 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:34:16.570 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:34:16.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:16.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:17.042 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:34:17.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:17.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:17.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:17.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:17.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:17.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:17.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:17.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:17.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:17.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:17.457 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:17.457 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:17.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:17.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:17.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:17.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:17.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:17.515 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:34:17.985 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:34:18.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:18.456 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:34:18.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:18.927 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:34:18.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:18.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:18.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:18.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:18.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:18.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:18.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:18.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:18.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:18.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:18.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:18.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:19.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:19.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:19.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:19.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:19.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:19.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:19.398 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:34:19.871 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:34:20.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:20.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:20.344 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:34:20.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:20.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:20.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:20.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:20.816 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:34:20.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:20.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:20.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:20.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:20.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:20.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:20.822 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:20.822 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:20.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:20.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:20.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:20.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:20.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:21.287 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:34:21.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:21.761 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:34:21.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:22.233 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:34:22.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:22.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:22.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:22.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:22.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:22.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:22.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:22.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:22.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:22.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:22.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:22.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:22.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:22.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:22.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:22.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:22.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:22.705 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:34:23.176 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:34:23.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:23.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:23.647 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:34:23.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:23.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:23.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:23.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:23.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:23.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:23.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:23.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:23.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:23.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:23.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:23.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:23.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:23.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:23.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:23.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:23.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:24.118 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:34:24.589 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:34:24.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:24.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:25.063 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:34:25.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:25.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:25.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:25.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:25.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:25.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:25.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:25.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:25.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:25.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:25.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:25.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:25.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:25.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:25.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:25.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:25.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:25.534 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:34:26.006 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:34:26.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:26.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:26.476 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:34:26.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:26.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:26.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:26.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:26.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:26.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:26.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:26.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:26.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:26.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:26.675 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:26.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:26.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:26.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:26.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:26.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:26.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:26.947 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:34:27.418 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:34:27.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:27.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:27.892 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 01:34:28.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:28.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:28.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:28.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:28.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:28.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:28.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:28.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:28.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:28.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:28.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:28.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:28.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:28.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:28.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:28.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:28.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:28.364 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 01:34:28.836 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 01:34:29.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:29.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:29.307 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 01:34:29.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:29.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:29.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:29.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:29.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:29.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:29.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:29.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:29.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:29.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:29.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:29.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:29.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:29.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:29.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:29.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:29.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:29.780 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 01:34:30.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:30.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:30.252 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 01:34:30.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:30.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:30.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:30.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:30.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:30.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:30.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:30.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:30.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:30.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:30.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:30.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:30.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:30.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:30.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:30.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:30.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:30.724 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 01:34:31.196 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 01:34:31.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:31.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:31.666 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 01:34:32.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:32.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:32.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:32.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:32.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:32.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:32.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:32.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:32.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:32.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:32.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:32.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:32.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:32.139 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 01:34:32.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:32.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:32.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:32.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:32.612 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 01:34:33.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:33.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:33.084 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 01:34:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:33.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:33.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:33.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:33.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:33.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:33.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:33.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:33.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:33.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:33.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:33.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:33.558 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 01:34:33.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:33.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:33.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:33.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:33.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:34.030 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 01:34:34.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:34.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:34.502 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 01:34:34.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:34.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:34.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:34.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:34.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:34:34.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:34:34.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:34:34.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:34:34.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:34:34.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:34:34.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:34:34.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:34:34.960 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:34:34.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:34:34.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:34:39.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:34:39.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:34:39.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:34:39.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:34:39.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:34:39.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:34:39.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:34:39.976 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:34:39.976 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:34:39.976 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:34:39.976 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:34:39.978 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:34:39.978 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:34:39.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:34:39.979 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:34:39.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:34:39.979 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:34:39.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:34:39.980 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:34:39.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:34:39.981 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:34:39.981 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:34:39.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:34:39.981 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:34:39.981 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:34:39.981 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:34:39.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:34:39.981 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:34:39.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:34:39.983 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:34:39.983 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:34:39.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:34:39.983 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:34:39.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:34:39.983 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:34:39.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:34:39.983 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:34:39.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:34:39.985 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:34:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:34:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:34:39.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:34:39.985 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:34:39.986 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:34:39.986 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:34:39.986 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:39.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:39.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:39.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:39.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:34:39.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:39.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:39.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:39.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:39.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:34:39.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:34:39.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:34:39.991 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:34:40.468 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:34:40.514 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:34:40.516 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:34:40.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:40.519 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:34:40.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:40.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:40.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:40.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:40.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:40.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:40.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:40.547 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:40.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:40.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:40.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:40.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:40.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:40.941 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:34:40.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:34:40.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:34:40.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:34:40.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:34:41.412 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:34:41.885 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:34:41.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:34:41.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:34:41.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:34:41.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:34:42.358 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:34:42.829 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:34:42.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:34:42.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:34:42.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:34:42.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:34:43.301 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:34:43.774 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:34:43.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:34:43.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:34:43.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:34:43.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:34:44.247 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:34:44.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:44.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:44.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:44.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:44.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:44.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:44.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:44.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:44.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:44.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:44.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:44.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:44.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:44.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:44.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:44.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:44.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:44.718 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:34:44.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:34:44.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:34:44.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:34:44.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:34:45.190 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:34:45.663 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:34:46.135 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:34:46.608 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:34:47.079 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:34:47.552 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:34:48.024 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:34:48.496 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:34:48.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:48.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:48.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:48.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:48.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:48.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:48.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:48.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:48.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:48.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:48.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:48.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:48.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:48.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:48.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:48.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:48.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:48.968 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:34:49.441 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:34:49.913 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:34:50.386 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:34:50.859 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:34:51.331 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:34:51.804 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:34:52.275 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:34:52.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:52.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:52.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:52.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:52.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:52.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:52.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:52.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:52.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:52.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:52.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:52.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:52.745 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:34:52.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:52.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:52.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:52.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:52.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:53.216 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:34:53.687 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:34:54.160 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:34:54.633 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:34:55.105 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:34:55.576 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:34:56.049 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:34:56.522 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:34:56.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:56.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:56.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:56.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:56.993 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:34:56.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:34:56.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:34:56.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:34:57.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:57.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:57.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:57.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:34:57.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:34:57.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:34:57.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:34:57.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:34:57.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:57.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:34:57.465 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:34:57.938 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:34:58.411 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:34:58.884 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:34:59.357 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:34:59.830 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:35:00.304 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:35:00.776 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:35:01.249 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:35:01.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:01.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:01.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:01.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:01.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:01.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:01.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:35:01.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:01.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:01.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:01.675 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:35:01.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:35:01.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:01.720 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:35:01.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:01.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:01.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:01.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:02.193 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 01:35:02.666 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 01:35:03.140 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 01:35:03.612 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 01:35:04.085 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 01:35:04.558 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 01:35:05.031 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 01:35:05.503 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 01:35:05.974 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 01:35:06.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:06.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:06.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:06.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:06.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:06.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:06.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:35:06.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:06.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:06.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:06.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:35:06.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:35:06.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:06.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:06.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:06.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:06.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:06.447 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 01:35:06.920 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 01:35:07.392 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 01:35:07.863 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 01:35:08.337 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 01:35:08.809 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 01:35:09.283 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 01:35:09.756 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 01:35:10.228 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 01:35:10.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:10.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:10.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:10.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:10.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:10.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:10.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:35:10.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:10.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:10.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:10.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:35:10.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:35:10.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:35:10.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:10.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:10.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:10.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:10.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:10.701 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 01:35:11.181 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 01:35:11.653 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 01:35:12.124 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 01:35:12.597 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 01:35:13.070 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 01:35:13.542 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 01:35:14.013 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 01:35:14.484 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 01:35:14.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:14.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:14.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:14.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:14.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:14.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:14.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:35:14.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:14.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:14.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:14.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:35:14.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:35:14.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:14.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:14.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:14.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:14.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:14.957 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 01:35:15.430 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 01:35:15.902 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 01:35:16.373 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 01:35:16.844 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 01:35:17.317 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 01:35:17.789 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 01:35:18.262 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 01:35:18.735 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 01:35:19.207 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 01:35:19.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:19.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:19.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:19.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:19.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:19.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:19.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:35:19.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:19.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:19.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:19.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:35:19.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:35:19.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:35:19.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:19.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:19.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:19.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:19.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:19.680 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 01:35:20.153 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 01:35:20.626 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 01:35:21.099 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 01:35:21.572 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 01:35:22.045 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 01:35:22.517 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 01:35:22.988 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 01:35:23.459 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 01:35:23.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:23.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:23.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:23.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:23.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:23.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:23.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:35:23.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:23.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:23.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:23.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:35:23.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:35:23.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:23.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:23.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:23.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:23.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:23.929 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 01:35:24.403 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 01:35:24.876 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 01:35:25.348 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 01:35:25.821 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 01:35:26.294 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 01:35:26.766 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 01:35:27.237 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 01:35:27.711 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 01:35:27.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:27.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:27.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:27.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:27.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:27.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:27.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:35:27.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:27.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:27.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:27.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:35:27.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:35:27.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:27.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:27.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:27.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:27.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:28.183 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-03 01:35:28.654 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-03 01:35:29.125 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-03 01:35:29.599 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-03 01:35:30.072 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-03 01:35:30.545 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-03 01:35:31.017 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-03 01:35:31.490 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-03 01:35:31.960 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-03 01:35:32.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:32.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:32.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:32.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:32.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:32.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:32.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:35:32.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:32.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:32.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:32.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:35:32.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:35:32.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:32.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:32.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:32.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:32.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:32.432 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-03 01:35:32.905 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-03 01:35:33.377 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-03 01:35:33.849 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-03 01:35:34.320 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-03 01:35:34.791 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-03 01:35:35.264 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-03 01:35:35.737 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-03 01:35:36.209 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-03 01:35:36.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:36.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:36.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:36.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:36.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:36.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:36.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:35:36.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:36.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:36.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:36.384 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:35:36.384 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:35:36.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:36.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:36.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:36.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:36.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:36.682 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-03 01:35:37.155 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-03 01:35:37.626 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-03 01:35:38.098 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-03 01:35:38.571 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-03 01:35:39.044 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-03 01:35:39.515 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-03 01:35:39.987 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-03 01:35:40.460 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-03 01:35:40.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:40.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:40.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:40.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:40.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:40.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:40.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:35:40.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:40.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:40.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:40.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:35:40.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:35:40.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:40.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:40.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:40.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:40.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:40.932 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-03 01:35:41.404 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-03 01:35:41.875 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-03 01:35:42.348 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-03 01:35:42.821 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-03 01:35:43.293 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-03 01:35:43.764 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-03 01:35:44.237 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-03 01:35:44.709 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-03 01:35:44.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:44.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:44.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:44.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:44.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:44.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:44.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:35:44.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:44.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:44.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:44.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:35:44.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:35:44.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:44.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:44.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:44.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:44.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:45.182 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-03 01:35:45.652 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-03 01:35:46.126 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-03 01:35:46.598 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-03 01:35:47.070 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-03 01:35:47.541 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-03 01:35:48.015 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-03 01:35:48.487 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-03 01:35:48.959 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-03 01:35:49.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:49.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:49.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:49.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:49.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:49.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:49.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:35:49.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:49.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:49.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:49.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:35:49.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:35:49.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:49.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:49.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:49.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:49.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:49.430 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-03 01:35:49.901 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-03 01:35:50.375 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-03 01:35:50.846 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-03 01:35:51.318 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-03 01:35:51.789 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-03 01:35:52.260 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-03 01:35:52.734 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-03 01:35:53.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:53.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:53.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:53.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:53.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:53.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:53.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:35:53.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:53.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:53.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:53.144 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:35:53.144 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:35:53.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:53.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:53.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:53.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:53.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:53.206 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-03 01:35:53.678 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-03 01:35:54.152 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-03 01:35:54.624 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-03 01:35:55.096 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-03 01:35:55.570 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-03 01:35:56.042 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-03 01:35:56.513 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-03 01:35:56.985 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-03 01:35:57.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:57.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:57.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:57.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:57.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:35:57.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:35:57.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:35:57.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:57.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:57.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:57.418 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:35:57.418 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:35:57.458 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-03 01:35:57.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:35:57.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:35:57.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:35:57.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:57.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:35:57.931 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-03 01:35:58.403 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-03 01:35:58.873 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-03 01:35:59.344 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-03 01:35:59.818 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-03 01:36:00.290 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-03 01:36:00.762 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-03 01:36:01.233 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-03 01:36:01.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:01.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:01.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:01.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:01.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:01.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:01.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:36:01.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:01.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:01.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:01.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:36:01.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:36:01.704 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-03 01:36:01.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:01.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:01.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:01.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:01.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:02.175 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-03 01:36:02.646 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-03 01:36:03.116 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-03 01:36:03.587 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-03 01:36:04.061 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-03 01:36:04.533 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-03 01:36:05.005 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-03 01:36:05.476 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-03 01:36:05.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:05.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:05.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:05.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:05.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:36:05.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:36:05.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:36:05.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:36:05.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:36:05.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:36:05.941 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:36:05.941 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:36:05.941 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:36:05.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:36:05.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:36:05.942 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=18565 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:36:05.942 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=18565 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:36:05.942 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=18565 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:36:05.942 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=18565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:36:05.942 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=18565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:36:05.942 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=18565 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:36:05.942 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=18565 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:36:10.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:36:10.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:36:10.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:36:10.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:36:10.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:36:10.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:36:10.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:36:10.952 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:36:10.952 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:36:10.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:36:10.953 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:36:10.955 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:36:10.955 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:36:10.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:36:10.955 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:36:10.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:36:10.956 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:36:10.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:36:10.956 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:36:10.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:36:10.957 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:36:10.957 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:36:10.957 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:36:10.958 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:36:10.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:36:10.958 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:36:10.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:36:10.958 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:36:10.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:36:10.959 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:36:10.960 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:36:10.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:36:10.960 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:36:10.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:36:10.960 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:36:10.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:36:10.960 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:36:10.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:36:10.962 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:36:10.962 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:36:10.962 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:36:10.963 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:36:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:36:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:36:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:36:10.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:36:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:36:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:36:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:36:10.963 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:36:10.963 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:36:10.963 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:36:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:36:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:36:10.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:36:15.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:36:15.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:36:15.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:36:15.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:36:15.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:36:15.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:36:15.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:36:15.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:36:15.980 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:36:15.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:36:15.981 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:36:15.984 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:36:15.984 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:36:15.985 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:36:15.985 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:36:15.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:36:15.986 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:36:15.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:36:15.986 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:36:15.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:36:15.988 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:36:15.988 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:36:15.988 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:36:15.988 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:36:15.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:36:15.989 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:36:15.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:36:15.989 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:36:15.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:36:15.991 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:36:15.991 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:36:15.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:36:15.991 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:36:15.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:36:15.991 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:36:15.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:36:15.991 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:36:15.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:36:15.994 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:36:15.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:36:15.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:36:15.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:36:15.994 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:36:15.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:36:15.995 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:36:15.995 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:36:15.995 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:36:15.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:36:15.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:36:16.000 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:36:16.478 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:36:16.520 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:36:16.522 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:36:16.524 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:36:16.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:16.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:16.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:16.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:36:16.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:16.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:16.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:16.555 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:36:16.555 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:36:16.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:16.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:16.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:16.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:16.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:16.951 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:36:16.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:36:16.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:36:16.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:36:16.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:36:17.422 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:36:17.895 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:36:17.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:36:17.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:36:17.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:36:17.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:36:18.367 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:36:18.840 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:36:18.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:36:19.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:36:19.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:36:19.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:36:19.311 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:36:19.784 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:36:20.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:36:20.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:36:20.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:36:20.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:36:20.256 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:36:20.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:20.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:20.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:20.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:20.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:20.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:20.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:36:20.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:20.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:20.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:20.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:36:20.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:36:20.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:20.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:20.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:20.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:20.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:20.728 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:36:21.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:36:21.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:36:21.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:36:21.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:36:21.199 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:36:21.672 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:36:22.145 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:36:22.617 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:36:23.088 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:36:23.562 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:36:24.034 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:36:24.506 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:36:24.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:24.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:24.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:24.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:24.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:24.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:24.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:36:24.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:24.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:24.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:24.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:36:24.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:36:24.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:24.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:24.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:24.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:24.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:24.980 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:36:25.452 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:36:25.924 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:36:26.398 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:36:26.870 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:36:27.342 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:36:27.815 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:36:28.288 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:36:28.760 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:36:29.231 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:36:29.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:29.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:29.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:29.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:29.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:29.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:29.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:36:29.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:29.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:29.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:29.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:36:29.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:36:29.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:29.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:29.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:29.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:29.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:29.702 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:36:30.175 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:36:30.648 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:36:31.120 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:36:31.591 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:36:32.064 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:36:32.537 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:36:33.009 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:36:33.480 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:36:33.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:33.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:33.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:33.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:33.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:33.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:33.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:36:33.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:33.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:33.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:33.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:36:33.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:36:33.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:33.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:33.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:33.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:33.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:33.953 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:36:34.426 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:36:34.898 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:36:35.369 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:36:35.843 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:36:36.315 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:36:36.787 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:36:37.259 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:36:37.732 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:36:38.205 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 01:36:38.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:38.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:38.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:38.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:38.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:38.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:38.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:36:38.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:38.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:38.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:38.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:36:38.275 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:36:38.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:38.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:38.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:38.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:38.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:38.677 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 01:36:39.151 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 01:36:39.623 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 01:36:40.095 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 01:36:40.569 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 01:36:41.041 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 01:36:41.514 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 01:36:41.987 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 01:36:42.460 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 01:36:42.932 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 01:36:43.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:43.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:43.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:43.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:43.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:43.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:43.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:36:43.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:43.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:43.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:43.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:36:43.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:36:43.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:43.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:43.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:43.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:43.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:43.404 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 01:36:43.877 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 01:36:44.350 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 01:36:44.822 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 01:36:45.295 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 01:36:45.768 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 01:36:46.241 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 01:36:46.714 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 01:36:47.187 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 01:36:47.659 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 01:36:48.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:48.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:48.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:48.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:48.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:48.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:48.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:36:48.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:48.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:48.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:48.035 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:36:48.035 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:36:48.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:36:48.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:48.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:48.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:48.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:48.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:48.130 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 01:36:48.601 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 01:36:49.071 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 01:36:49.545 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 01:36:50.017 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 01:36:50.489 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 01:36:50.960 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 01:36:51.431 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 01:36:51.903 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 01:36:52.373 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 01:36:52.846 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 01:36:52.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:52.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:52.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:52.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:52.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:52.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:52.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:36:52.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:52.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:52.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:52.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:36:52.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:36:52.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:52.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:52.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:52.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:52.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:53.318 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 01:36:53.790 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 01:36:54.264 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 01:36:54.736 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 01:36:55.208 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 01:36:55.679 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 01:36:56.153 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 01:36:56.625 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 01:36:57.098 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 01:36:57.569 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 01:36:57.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:57.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:57.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:57.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:57.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:36:57.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:36:57.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:36:57.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:57.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:57.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:57.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:36:57.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:36:57.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:36:57.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:36:57.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:36:57.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:36:57.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:57.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:36:58.040 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 01:36:58.513 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 01:36:58.986 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 01:36:59.458 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 01:36:59.932 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 01:37:00.404 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 01:37:00.876 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 01:37:01.347 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 01:37:01.821 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 01:37:02.293 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 01:37:02.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:02.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:02.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:02.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:02.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:02.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:02.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:37:02.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:02.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:02.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:02.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:37:02.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:37:02.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:02.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:02.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:02.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:02.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:02.764 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 01:37:03.235 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 01:37:03.709 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 01:37:04.181 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-03 01:37:04.653 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-03 01:37:05.124 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-03 01:37:05.598 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-03 01:37:06.070 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-03 01:37:06.541 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-03 01:37:07.012 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-03 01:37:07.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:07.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:07.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:07.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:07.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:07.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:07.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:37:07.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:07.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:07.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:07.356 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:37:07.356 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:37:07.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:07.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:07.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:07.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:07.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:07.483 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-03 01:37:07.954 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-03 01:37:08.427 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-03 01:37:08.900 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-03 01:37:09.372 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-03 01:37:09.843 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-03 01:37:10.313 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-03 01:37:10.784 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-03 01:37:11.258 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-03 01:37:11.730 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-03 01:37:12.203 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-03 01:37:12.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:12.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:12.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:12.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:12.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:12.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:12.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:37:12.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:12.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:12.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:12.228 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:37:12.228 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:37:12.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:12.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:12.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:12.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:12.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:12.676 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-03 01:37:13.148 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-03 01:37:13.620 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-03 01:37:14.092 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-03 01:37:14.565 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-03 01:37:15.037 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-03 01:37:15.509 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-03 01:37:15.980 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-03 01:37:16.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:16.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:16.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:16.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:16.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:16.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:16.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:37:16.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:16.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:16.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:16.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:37:16.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:37:16.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:16.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:16.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:16.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:16.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:16.451 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-03 01:37:16.924 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-03 01:37:17.392 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-03 01:37:17.863 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-03 01:37:18.334 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-03 01:37:18.807 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-03 01:37:19.280 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-03 01:37:19.752 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-03 01:37:20.223 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-03 01:37:20.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:20.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:20.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:20.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:20.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:20.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:20.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:37:20.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:20.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:20.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:20.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:37:20.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:37:20.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:20.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:20.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:20.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:20.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:20.694 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-03 01:37:21.167 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-03 01:37:21.639 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-03 01:37:22.111 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-03 01:37:22.583 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-03 01:37:23.056 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-03 01:37:23.528 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-03 01:37:24.000 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-03 01:37:24.471 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-03 01:37:24.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:24.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:24.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:24.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:24.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:24.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:24.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:37:24.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:24.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:24.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:24.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:37:24.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:37:24.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:24.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:24.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:24.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:24.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:24.944 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-03 01:37:25.417 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-03 01:37:25.889 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-03 01:37:26.360 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-03 01:37:26.833 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-03 01:37:27.306 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-03 01:37:27.778 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-03 01:37:28.249 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-03 01:37:28.722 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-03 01:37:29.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:29.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:29.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:29.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:29.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:29.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:29.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:37:29.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:29.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:29.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:29.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:37:29.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:37:29.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:29.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:29.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:29.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:29.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:29.194 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-03 01:37:29.666 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-03 01:37:30.137 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-03 01:37:30.611 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-03 01:37:31.083 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-03 01:37:31.555 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-03 01:37:32.026 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-03 01:37:32.498 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-03 01:37:32.971 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-03 01:37:33.443 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-03 01:37:33.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:33.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:33.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:33.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:33.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:33.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:33.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:37:33.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:33.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:33.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:33.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:37:33.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:37:33.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:33.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:33.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:33.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:33.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:33.914 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-03 01:37:34.387 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-03 01:37:34.860 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-03 01:37:35.332 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-03 01:37:35.805 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-03 01:37:36.278 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-03 01:37:36.750 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-03 01:37:37.221 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-03 01:37:37.694 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-03 01:37:37.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:37.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:37.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:37.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:37.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:37.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:37.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:37:37.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:37.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:37.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:37.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:37:37.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:37:37.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:37.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:37.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:37.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:37.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:38.167 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-03 01:37:38.638 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-03 01:37:39.110 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-03 01:37:39.580 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-03 01:37:40.051 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-03 01:37:40.525 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-03 01:37:40.997 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-03 01:37:41.469 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-03 01:37:41.940 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-03 01:37:42.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:42.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:42.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:42.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:42.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:42.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:42.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:37:42.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:42.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:42.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:42.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:37:42.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:37:42.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:42.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:42.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:42.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:42.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:42.411 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-03 01:37:42.881 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-03 01:37:43.355 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-03 01:37:43.827 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-03 01:37:44.299 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-03 01:37:44.770 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-03 01:37:45.244 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-03 01:37:45.716 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-03 01:37:46.188 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-03 01:37:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:46.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:46.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:46.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:46.331 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=19515 tn=1 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:37:46.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:37:46.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:37:46.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:37:46.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:37:46.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:37:46.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:37:46.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:37:46.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:37:46.349 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:37:46.349 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:37:46.349 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:37:46.349 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19518 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:37:46.349 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19519 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:37:46.350 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19519 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:37:46.350 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19519 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:37:46.350 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19519 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:37:46.350 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19519 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:37:46.350 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19519 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:37:46.350 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19519 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:37:46.350 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19519 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:37:51.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:37:51.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:37:51.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:37:51.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:37:51.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:37:51.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:37:51.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:37:51.360 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:37:51.360 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:37:51.360 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:37:51.360 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:37:51.364 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:37:51.364 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:37:51.365 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:37:51.365 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:37:51.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:37:51.365 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:37:51.365 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:37:51.365 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:37:51.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:37:51.369 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:37:51.369 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:37:51.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:37:51.370 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:37:51.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:37:51.370 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:37:51.370 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:37:51.370 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:37:51.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:37:51.373 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:37:51.374 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:37:51.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:37:51.374 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:37:51.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:37:51.374 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:37:51.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:37:51.374 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:37:51.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:37:51.379 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:37:51.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:37:51.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:37:51.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:37:51.379 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:37:51.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:37:51.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:37:51.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:37:51.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:37:51.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:37:51.380 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:37:51.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:37:51.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:37:51.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:37:51.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:37:51.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:37:51.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:37:51.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:37:51.380 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:37:51.380 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:37:51.380 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:37:51.381 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:37:51.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:37:51.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:37:51.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:37:51.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:37:51.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:37:51.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:37:51.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:37:51.383 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:37:51.383 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:37:51.383 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:37:51.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:37:51.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:37:51.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:37:56.390 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:37:56.390 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:37:56.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:37:56.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:37:56.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:37:56.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:37:56.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:37:56.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:37:56.401 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:37:56.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:37:56.401 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:37:56.406 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:37:56.406 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:37:56.407 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:37:56.407 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:37:56.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:37:56.407 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:37:56.408 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:37:56.408 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:37:56.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:37:56.410 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:37:56.410 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:37:56.410 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:37:56.410 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:37:56.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:37:56.410 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:37:56.411 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:37:56.411 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:37:56.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:37:56.413 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:37:56.413 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:37:56.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:37:56.413 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:37:56.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:37:56.413 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:37:56.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:37:56.413 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:37:56.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:37:56.416 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:37:56.417 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:37:56.417 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:37:56.417 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:37:56.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:37:56.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:37:56.422 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:37:56.900 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:37:56.943 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:37:56.946 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:37:56.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:56.948 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:37:56.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:56.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:56.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:37:56.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:56.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:56.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:56.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:37:56.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:37:56.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:56.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:56.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:56.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:56.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:57.372 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:37:57.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:37:57.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:37:57.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:37:57.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:37:57.843 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:37:58.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:58.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:58.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:58.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:58.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:58.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:58.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:37:58.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:58.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:58.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:58.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:37:58.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:37:58.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:58.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:58.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:58.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:58.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:58.316 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:37:58.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:37:58.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:37:58.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:37:58.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:37:58.789 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:37:59.261 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:37:59.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:37:59.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:37:59.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:37:59.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:37:59.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:59.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:59.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:59.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:59.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:37:59.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:37:59.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:37:59.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:59.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:59.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:59.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:37:59.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:37:59.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:37:59.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:37:59.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:37:59.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:59.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:37:59.732 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:38:00.203 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:38:00.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:38:00.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:38:00.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:38:00.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:38:00.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:00.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:00.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:00.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:00.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:00.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:00.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:00.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:00.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:00.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:00.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:00.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:00.676 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:38:00.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:00.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:00.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:00.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:00.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:01.149 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:38:01.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:38:01.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:38:01.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:38:01.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:38:01.621 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:38:02.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:02.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:02.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:02.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:02.091 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:38:02.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:02.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:02.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:02.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:02.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:02.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:02.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:02.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:02.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:02.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:02.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:02.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:02.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:02.563 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:38:03.036 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:38:03.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:03.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:03.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:03.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:03.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:03.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:03.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:03.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:03.174 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:03.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:03.174 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:03.174 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:03.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:03.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:03.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:03.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:03.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:03.508 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:38:03.981 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:38:04.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:04.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:04.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:04.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:04.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:04.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:04.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:04.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:04.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:04.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:04.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:04.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:04.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:04.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:04.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:04.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:04.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:04.454 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:38:04.927 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:38:05.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:05.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:05.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:05.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:05.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:05.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:05.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:05.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:05.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:05.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:05.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:05.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:05.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:38:05.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:05.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:05.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:05.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:05.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:05.399 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:38:05.870 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:38:06.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:06.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:06.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:06.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:06.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:06.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:06.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:06.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:06.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:06.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:06.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:06.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:06.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:06.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:06.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:06.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:06.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:06.341 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:38:06.812 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:38:07.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:07.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:07.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:07.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:07.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:07.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:07.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:07.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:07.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:07.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:07.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:07.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:07.282 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:38:07.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:38:07.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:07.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:07.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:07.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:07.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:07.753 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:38:08.227 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:38:08.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:08.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:08.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:08.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:08.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:08.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:08.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:08.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:08.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:08.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:08.633 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:08.633 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:08.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:08.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:08.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:08.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:08.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:08.699 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:38:09.171 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:38:09.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:09.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:09.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:09.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:09.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:09.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:09.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:09.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:09.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:09.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:09.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:09.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:09.642 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:38:09.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:09.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:09.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:09.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:09.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:10.113 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:38:10.587 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:38:10.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:10.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:10.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:10.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:10.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:10.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:10.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:10.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:10.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:10.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:10.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:10.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:10.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:10.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:10.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:10.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:10.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:11.059 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:38:11.530 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:38:11.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:11.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:11.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:11.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:11.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:11.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:11.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:11.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:11.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:11.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:11.703 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:11.703 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:11.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:11.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:11.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:11.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:11.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:12.002 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:38:12.472 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:38:12.943 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:38:13.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:13.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:13.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:13.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:13.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:13.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:13.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:13.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:13.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:13.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:13.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:13.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:13.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:13.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:13.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:13.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:13.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:13.416 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:38:13.889 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:38:14.361 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:38:14.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:14.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:14.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:14.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:14.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:14.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:14.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:14.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:14.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:14.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:14.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:14.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:14.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:14.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:14.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:14.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:14.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:14.832 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:38:15.305 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:38:15.778 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:38:15.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:15.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:15.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:15.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:16.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:16.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:16.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:16.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:16.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:16.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:16.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:16.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:16.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:16.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:16.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:16.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:16.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:16.250 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:38:16.722 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:38:17.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:17.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:17.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:17.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:17.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:17.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:17.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:17.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:17.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:17.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:17.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:17.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:17.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:17.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:17.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:17.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:17.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:17.195 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:38:17.666 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:38:18.138 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:38:18.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:18.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:18.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:18.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:18.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:18.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:18.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:18.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:18.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:18.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:18.573 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:18.573 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:18.609 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 01:38:18.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:18.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:18.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:18.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:18.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:19.080 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 01:38:19.554 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 01:38:19.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:19.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:19.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:19.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:19.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:19.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:19.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:20.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:20.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:20.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:20.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:20.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:20.026 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 01:38:20.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:20.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:20.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:20.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:20.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:20.498 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 01:38:20.969 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 01:38:21.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:21.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:21.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:21.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:21.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:38:21.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:38:21.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:38:21.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:38:21.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:38:21.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:38:21.429 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:38:21.429 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:38:21.429 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:38:21.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:38:21.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:38:21.429 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5406 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:21.429 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5406 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:21.429 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:21.429 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:21.430 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:21.430 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:21.430 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:26.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:38:26.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:38:26.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:38:26.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:38:26.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:38:26.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:38:26.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:38:26.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:38:26.441 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:38:26.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:38:26.442 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:38:26.445 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:38:26.445 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:38:26.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:38:26.446 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:38:26.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:38:26.447 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:38:26.447 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:38:26.447 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:38:26.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:38:26.449 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:38:26.449 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:38:26.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:38:26.449 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:38:26.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:38:26.449 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:38:26.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:38:26.449 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:38:26.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:38:26.452 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:38:26.452 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:38:26.452 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:38:26.452 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:38:26.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:38:26.452 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:38:26.452 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:38:26.452 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:38:26.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:38:26.455 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:38:26.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:38:26.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:38:26.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:38:26.455 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:38:26.456 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:38:26.456 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:38:26.456 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:38:26.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:38:26.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:38:26.461 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:38:26.938 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:38:26.980 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:38:26.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:26.982 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:38:26.984 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:38:27.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:27.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:27.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:27.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:27.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:27.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:27.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:27.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:27.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:38:27.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:27.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:27.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:27.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:27.410 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:38:27.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:38:27.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:38:27.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:38:27.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:38:27.882 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:38:28.355 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:38:28.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:38:28.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:38:28.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:38:28.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:38:28.827 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:38:29.300 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:38:29.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:38:29.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:38:29.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:38:29.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:38:29.773 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:38:30.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:30.246 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:38:30.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:38:30.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:38:30.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:38:30.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:38:30.718 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:38:30.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:30.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:30.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:30.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:30.792 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=936 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:30.792 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=936 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:30.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:30.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:30.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:30.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:30.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:30.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:30.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:38:30.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:30.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:30.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:30.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:31.192 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:38:31.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:38:31.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:38:31.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:38:31.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:38:31.664 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:38:32.137 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:38:32.608 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:38:33.081 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:38:33.554 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:38:33.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:34.026 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:38:34.497 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:38:34.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:34.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:34.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:34.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:34.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:34.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:34.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:34.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:34.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:34.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:34.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:34.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:34.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:38:34.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:34.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:34.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:34.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:34.970 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:38:35.442 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:38:35.915 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:38:36.388 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:38:36.860 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:38:37.333 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:38:37.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:37.804 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:38:38.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:38.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:38.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:38.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:38.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:38.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:38.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:38.259 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:38.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:38.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:38.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:38:38.274 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:38:38.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:38.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:38.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:38.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:38.745 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:38:39.219 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:38:39.691 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:38:40.163 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:38:40.635 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:38:41.108 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:38:41.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:41.581 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:38:42.053 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:38:42.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:42.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:42.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:42.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:42.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:42.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:42.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:42.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:42.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:42.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:42.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:42.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:42.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:38:42.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:42.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:42.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:42.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:42.524 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:38:42.997 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:38:43.469 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:38:43.941 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:38:44.413 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:38:44.886 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:38:45.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:45.359 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:38:45.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:45.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:45.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:45.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:45.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:45.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:45.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:45.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:45.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:45.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:45.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:38:45.830 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:38:45.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:45.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:45.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:45.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:46.303 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:38:46.776 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:38:47.248 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:38:47.719 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:38:48.192 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:38:48.665 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 01:38:48.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:49.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:49.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:49.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:49.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:49.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:49.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:49.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:49.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:49.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:49.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:49.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:49.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:49.136 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 01:38:49.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:38:49.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:49.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:49.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:49.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:49.607 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 01:38:50.081 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 01:38:50.553 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 01:38:51.025 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 01:38:51.496 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 01:38:51.969 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 01:38:52.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:52.442 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 01:38:52.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:52.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:52.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:52.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:52.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:38:52.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:52.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:52.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:52.837 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:38:52.837 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:38:52.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:38:52.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:38:52.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:38:52.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:52.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:52.914 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 01:38:53.387 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 01:38:53.860 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 01:38:54.332 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 01:38:54.803 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 01:38:55.276 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 01:38:55.749 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 01:38:55.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:56.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:38:56.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:38:56.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:38:56.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:38:56.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:38:56.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:38:56.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:38:56.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:38:56.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:38:56.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:38:56.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:38:56.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:38:56.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:38:56.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:38:56.155 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:38:56.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:56.156 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:56.156 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:56.156 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:56.156 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:56.156 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:56.156 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:38:56.156 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:39:01.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:39:01.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:39:01.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:39:01.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:39:01.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:39:01.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:39:01.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:39:01.166 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:39:01.166 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:39:01.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:39:01.167 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:39:01.169 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:39:01.169 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:39:01.170 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:39:01.170 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:39:01.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:39:01.170 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:39:01.171 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:39:01.171 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:39:01.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:39:01.172 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:39:01.172 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:39:01.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:39:01.172 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:39:01.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:39:01.172 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:39:01.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:39:01.172 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:39:01.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:39:01.174 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:39:01.174 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:39:01.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:39:01.174 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:39:01.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:39:01.174 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:39:01.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:39:01.174 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:39:01.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:39:01.176 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:39:01.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:39:01.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:39:01.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:39:01.176 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:39:01.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:39:01.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:39:01.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:39:01.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:39:01.177 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:39:01.177 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:39:01.177 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:01.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:01.181 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:39:01.660 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:39:01.707 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:39:01.709 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:39:01.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:01.712 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:39:01.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:01.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:01.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:01.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:01.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:01.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:01.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:01.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:01.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:01.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:01.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:01.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:01.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:02.131 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:39:02.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:39:02.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:39:02.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:39:02.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:39:02.604 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:39:03.074 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:39:03.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:39:03.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:39:03.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:39:03.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:39:03.548 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:39:04.021 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:39:04.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:39:04.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:39:04.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:39:04.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:39:04.493 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:39:04.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:04.966 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:39:05.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:39:05.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:39:05.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:39:05.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:39:05.439 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:39:05.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:05.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:05.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:05.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:05.515 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:39:05.515 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:39:05.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:05.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:05.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:05.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:05.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:05.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:05.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:05.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:05.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:05.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:05.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:05.911 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:39:06.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:39:06.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:39:06.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:39:06.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:39:06.385 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:39:06.857 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:39:07.330 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:39:07.803 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:39:08.276 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:39:08.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:08.748 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:39:09.222 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:39:09.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:09.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:09.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:09.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:09.367 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=1768 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:39:09.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:09.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:09.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:09.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:09.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:09.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:09.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:09.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:09.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:09.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:09.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:09.695 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:39:10.167 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:39:10.640 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:39:11.113 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:39:11.586 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:39:12.056 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:39:12.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:12.530 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:39:13.002 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:39:13.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:13.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:13.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:13.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:13.226 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=2600 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:39:13.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:13.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:13.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:13.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:13.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:13.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:13.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:13.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:13.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:13.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:13.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:13.475 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:39:13.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:13.948 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:39:14.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:14.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:14.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:14.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:14.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:14.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:14.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:14.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:14.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:14.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:14.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:14.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:14.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:14.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:14.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:14.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:14.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:14.421 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:39:14.893 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:39:15.364 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:39:15.838 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:39:16.310 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:39:16.782 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:39:17.256 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:39:17.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:17.728 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:39:17.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:17.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:17.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:17.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:17.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:17.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:17.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:17.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:17.806 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:17.806 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:17.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:17.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:17.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:17.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:17.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:18.201 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:39:18.672 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:39:19.142 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:39:19.613 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:39:20.084 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:39:20.557 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:39:20.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:21.030 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:39:21.502 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:39:21.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:21.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:21.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:21.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:21.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:21.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:21.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:21.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:21.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:21.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:21.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:21.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:21.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:21.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:21.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:21.975 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:39:22.448 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:39:22.920 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:39:23.391 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 01:39:23.864 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 01:39:24.337 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 01:39:24.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:24.809 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 01:39:25.280 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 01:39:25.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:25.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:25.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:25.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:25.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:25.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:25.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:25.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:25.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:25.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:25.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:25.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:25.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:25.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:25.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:25.751 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 01:39:25.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:26.224 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 01:39:26.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:26.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:26.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:26.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:26.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:26.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:26.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:26.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:26.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:26.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:26.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:26.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:26.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:26.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:26.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:26.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:26.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:26.696 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 01:39:27.168 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 01:39:27.639 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 01:39:28.113 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 01:39:28.585 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 01:39:29.057 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 01:39:29.528 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 01:39:29.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:29.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:29.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:29.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:29.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:29.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:29.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:29.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:29.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:29.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:29.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:29.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:30.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:30.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:30.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:30.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:30.002 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 01:39:30.474 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 01:39:30.946 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 01:39:31.417 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 01:39:31.888 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 01:39:32.359 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 01:39:32.829 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 01:39:33.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:33.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:33.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:33.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:33.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:33.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:33.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:33.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:33.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:33.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:33.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:33.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:33.300 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 01:39:33.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:33.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:33.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:33.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:33.771 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 01:39:34.244 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 01:39:34.717 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 01:39:35.189 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 01:39:35.660 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 01:39:36.131 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 01:39:36.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:36.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:36.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:36.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:36.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:36.569 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=7645 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:39:36.569 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=7645 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:39:36.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:36.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:36.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:36.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:36.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:36.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:36.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:36.601 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 01:39:36.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:36.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:36.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:36.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:37.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:37.074 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 01:39:37.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:37.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:37.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:37.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:37.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:37.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:37.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:37.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:37.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:37.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:37.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:37.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:37.547 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 01:39:37.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:37.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:37.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:37.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:37.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:38.018 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 01:39:38.490 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 01:39:38.963 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 01:39:39.435 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 01:39:39.907 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 01:39:40.379 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 01:39:40.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:40.852 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 01:39:41.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:41.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:41.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:41.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:41.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:41.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:41.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:41.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:41.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:41.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:41.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:41.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:41.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:41.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:41.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:41.324 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 01:39:41.796 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 01:39:42.267 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 01:39:42.741 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 01:39:43.213 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 01:39:43.685 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 01:39:44.156 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 01:39:44.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:44.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:44.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:44.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:44.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:44.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:44.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:44.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:44.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:44.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:44.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:44.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:44.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:44.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:44.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:44.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:44.630 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 01:39:45.102 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 01:39:45.574 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 01:39:46.045 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 01:39:46.518 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 01:39:46.991 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 01:39:47.479 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 01:39:47.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:47.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:47.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:47.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:47.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:47.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:47.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:47.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:47.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:47.875 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:47.875 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:47.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:39:47.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:47.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:47.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:47.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:47.951 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 01:39:48.425 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 01:39:48.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:48.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:48.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:48.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:48.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:48.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:39:48.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:39:48.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:39:48.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:39:48.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:39:48.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:39:48.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:39:48.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:39:48.822 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:39:48.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:39:48.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:39:53.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:39:53.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:39:53.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:39:53.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:39:53.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:39:53.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:39:53.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:39:53.835 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:39:53.835 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:39:53.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:39:53.836 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:39:53.836 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:39:53.837 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:39:53.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:39:53.837 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:39:53.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:39:53.837 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:39:53.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:39:53.837 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:39:53.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:39:53.838 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:39:53.838 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:39:53.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:39:53.838 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:39:53.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:39:53.838 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:39:53.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:39:53.838 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:39:53.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:39:53.839 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:39:53.839 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:39:53.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:39:53.839 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:39:53.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:39:53.839 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:39:53.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:39:53.839 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:39:53.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:53.842 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:39:53.842 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:39:53.842 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:39:53.843 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:53.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:39:53.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:53.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:39:53.847 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:39:54.323 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:39:54.367 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:39:54.368 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:39:54.369 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:39:54.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:39:54.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:39:54.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:39:54.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:39:54.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:39:54.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:39:54.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:39:54.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:39:54.377 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:39:54.790 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:39:54.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:39:54.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:39:54.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:39:54.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:39:55.261 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:39:55.732 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:39:55.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:39:55.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:39:55.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:39:55.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:39:56.204 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:39:56.674 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:39:56.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:39:56.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:39:56.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:39:56.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:39:57.145 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:39:57.616 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:39:57.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:39:57.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:39:57.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:39:57.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:39:58.087 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:39:58.557 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:39:58.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:39:58.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:39:58.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:39:58.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:39:59.028 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:39:59.499 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:39:59.969 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:40:00.440 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:40:00.911 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:40:01.382 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:40:01.853 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:40:02.324 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:40:02.794 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:40:03.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:03.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:03.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:03.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:03.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:03.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:03.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:40:03.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:40:03.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:40:03.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:40:03.156 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:40:03.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:40:03.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:40:03.157 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2018 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:40:03.157 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:40:03.157 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:40:03.157 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:40:03.157 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:40:03.157 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:40:03.157 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:40:08.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:40:08.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:40:08.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:40:08.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:40:08.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:40:08.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:40:08.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:40:08.164 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:40:08.164 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:08.164 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:40:08.164 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:40:08.166 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:40:08.166 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:40:08.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:40:08.166 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:08.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:40:08.167 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:40:08.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:40:08.167 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:40:08.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:08.168 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:40:08.168 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:40:08.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:40:08.168 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:08.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:40:08.169 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:40:08.169 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:40:08.169 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:40:08.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:08.170 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:40:08.170 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:40:08.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:40:08.170 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:08.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:40:08.170 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:40:08.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:40:08.170 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:40:08.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:08.173 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:40:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:40:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:40:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:40:08.173 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:40:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:40:08.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:40:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:40:08.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:40:08.173 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:40:08.174 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:40:08.174 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:40:08.174 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:08.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:08.178 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:40:08.657 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:40:08.700 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:40:08.703 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:40:08.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:08.705 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:40:08.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:08.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:08.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:08.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:08.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:08.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:08.711 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:08.711 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:09.130 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:40:09.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:09.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:09.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:09.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:09.600 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:40:10.072 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:40:10.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:10.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:10.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:10.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:10.542 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:40:11.013 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:40:11.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:11.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:11.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:11.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:11.484 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:40:11.954 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:40:12.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:12.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:12.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:12.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:12.425 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:40:12.896 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:40:13.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:13.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:13.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:13.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:13.366 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:40:13.837 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:40:14.308 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:40:14.778 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:40:15.249 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:40:15.720 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:40:16.191 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:40:16.662 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:40:17.133 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:40:17.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:17.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:17.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:17.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:17.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:17.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:17.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:40:17.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:40:17.504 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:40:17.504 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:40:17.504 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:40:17.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:40:17.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:40:22.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:40:22.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:40:22.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:40:22.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:40:22.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:40:22.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:40:22.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:40:22.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:40:22.518 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:22.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:40:22.519 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:40:22.523 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:40:22.523 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:40:22.523 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:40:22.523 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:22.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:40:22.523 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:40:22.524 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:40:22.524 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:40:22.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:22.528 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:40:22.528 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:40:22.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:40:22.528 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:22.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:40:22.528 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:40:22.529 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:40:22.529 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:40:22.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:22.532 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:40:22.533 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:40:22.533 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:40:22.533 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:22.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:40:22.533 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:40:22.533 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:40:22.533 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:40:22.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:22.538 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:40:22.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:40:22.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:40:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:40:22.539 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:40:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:40:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:40:22.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:40:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:40:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:22.539 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:40:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:22.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:22.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:22.540 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:40:22.540 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:40:22.540 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:40:22.540 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:40:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:22.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:22.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:22.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:22.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:22.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:22.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:22.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:22.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:22.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:22.545 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:40:23.020 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:40:23.071 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:40:23.073 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:40:23.075 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:40:23.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:23.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:23.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:23.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:23.492 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:40:23.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:23.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:23.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:23.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:23.963 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:40:24.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:24.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:24.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:24.082 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:24.082 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:24.437 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:40:24.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:24.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:24.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:24.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:24.910 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:40:25.381 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:40:25.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:25.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:25.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:25.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:25.852 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:40:26.324 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:40:26.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:26.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:26.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:26.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:26.797 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:40:27.269 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:40:27.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:27.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:27.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:27.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:27.741 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:40:28.211 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:40:28.682 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:40:29.152 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:40:29.622 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:40:30.094 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:40:30.564 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:40:31.035 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:40:31.505 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:40:31.976 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:40:32.447 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:40:32.918 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:40:33.389 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:40:33.863 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:40:34.335 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:40:34.807 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:40:35.281 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:40:35.753 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:40:35.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:35.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:35.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:35.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:35.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:35.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:35.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:40:35.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:40:35.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:40:35.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:40:35.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:40:35.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:40:35.920 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:40:40.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:40:40.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:40:40.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:40:40.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:40:40.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:40:40.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:40:40.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:40:40.938 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:40:40.938 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:40.939 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:40:40.939 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:40:40.945 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:40:40.946 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:40:40.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:40:40.946 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:40.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:40:40.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:40:40.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:40:40.947 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:40:40.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:40.953 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:40:40.953 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:40:40.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:40:40.954 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:40.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:40:40.954 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:40:40.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:40:40.954 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:40:40.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:40.958 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:40:40.958 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:40:40.958 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:40:40.958 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:40.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:40:40.958 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:40:40.958 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:40:40.958 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:40:40.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:40.963 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:40.964 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:40:40.964 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:40:40.964 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:40:40.965 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:40:40.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:40.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:40.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:40.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:40:40.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:40.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:40.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:40.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:40.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:40.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:40.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:40.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:40.969 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:40:41.447 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:40:41.495 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:40:41.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:41.498 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:40:41.500 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:40:41.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:41.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:41.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:41.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:41.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:41.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:41.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:41.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:41.919 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:40:41.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:41.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:41.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:41.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:42.390 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:40:42.536 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:40:42.864 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:40:42.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:42.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:42.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:42.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:43.062 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:40:43.336 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:40:43.584 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:40:43.807 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:40:43.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:43.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:43.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:43.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:44.279 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:40:44.752 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:40:44.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:44.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:44.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:44.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:45.224 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:40:45.599 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:40:45.696 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:40:45.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:45.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:45.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:45.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:46.133 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:40:46.167 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:40:46.641 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:40:46.650 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:40:47.113 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:40:47.172 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:40:47.584 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:40:48.056 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:40:48.529 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:40:49.002 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:40:49.178 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:40:49.474 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:40:49.947 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:40:50.420 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:40:50.892 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:40:51.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:51.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:51.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:51.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:51.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:51.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:51.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:40:51.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:40:51.231 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:40:51.231 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:40:51.231 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:40:51.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:40:51.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:40:56.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:40:56.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:40:56.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:40:56.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:40:56.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:40:56.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:40:56.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:40:56.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:40:56.244 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:56.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:40:56.245 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:40:56.247 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:40:56.247 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:40:56.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:40:56.248 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:56.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:40:56.248 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:40:56.249 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:40:56.249 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:40:56.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:56.250 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:40:56.251 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:40:56.251 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:40:56.251 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:56.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:40:56.251 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:40:56.251 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:40:56.251 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:40:56.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:56.254 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:40:56.254 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:40:56.254 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:40:56.254 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:40:56.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:40:56.254 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:40:56.254 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:40:56.254 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:40:56.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:56.258 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:40:56.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:40:56.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:40:56.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:40:56.258 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:40:56.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:40:56.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:40:56.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:56.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:40:56.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:40:56.258 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:40:56.259 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:40:56.259 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:40:56.259 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:56.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:56.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:56.264 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:40:56.741 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:40:56.787 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:40:56.789 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:40:56.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:56.791 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:40:56.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:56.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:56.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:56.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:56.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:56.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:56.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:56.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:56.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:56.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:56.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:56.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:56.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:56.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:56.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:56.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:56.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:56.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:56.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:56.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:56.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:56.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:56.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:56.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:56.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:56.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:56.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:56.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:56.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:56.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:56.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:57.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.173 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:57.173 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:57.211 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:40:57.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:57.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:57.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:57.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:57.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:57.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:57.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.444 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:57.444 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:57.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:57.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.684 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:40:57.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:57.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:57.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:57.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:57.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:57.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:57.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:57.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:57.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:57.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:57.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:57.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:57.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:57.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:57.851 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:57.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:57.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:57.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:57.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:57.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:57.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:57.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:57.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.945 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:57.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:57.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:40:57.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:57.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:57.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:57.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:57.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:57.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:57.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:57.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:57.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:57.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:58.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:58.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:58.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:58.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:58.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:58.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:58.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:58.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:58.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:58.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:58.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:58.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:58.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:58.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:58.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:58.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:58.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:58.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:58.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:58.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:58.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:58.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:58.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:58.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:58.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:58.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:58.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:58.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:58.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:58.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:58.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:58.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.150 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:40:58.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:58.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:58.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:58.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:58.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:58.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:58.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:58.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:58.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:58.239 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:58.239 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:58.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:58.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:58.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:58.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:58.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:58.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:58.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:58.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:58.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:58.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:58.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:58.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:58.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:58.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:58.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:58.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:58.494 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:58.494 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:58.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:58.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:58.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:58.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.622 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:40:58.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:58.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:58.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:58.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:58.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:58.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:58.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:58.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:58.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:58.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:58.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:58.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:58.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:58.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:58.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:58.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:58.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:58.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:58.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:59.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:59.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:59.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:59.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:59.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:59.003 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:59.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:59.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:59.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:59.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:59.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.093 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:40:59.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:59.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:59.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:59.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:59.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:59.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:59.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:59.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:59.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:59.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:59.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:59.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:40:59.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:40:59.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:40:59.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:40:59.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:59.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:59.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:59.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:59.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:59.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:59.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:59.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:59.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:59.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:59.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:59.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:59.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:59.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:59.564 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:40:59.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:59.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:59.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:59.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:59.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:59.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:59.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:59.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:59.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:40:59.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:40:59.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:59.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:59.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:40:59.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:40:59.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:40:59.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:40:59.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:40:59.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:59.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:40:59.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:40:59.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:40:59.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:41:00.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:00.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:00.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:00.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:00.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:00.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:00.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:00.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:00.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:41:00.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:41:00.009 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:41:00.009 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=812 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:00.009 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=812 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:00.009 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=812 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:00.009 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=812 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:05.014 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:41:05.014 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:41:05.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:05.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:05.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:05.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:05.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:05.024 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:41:05.024 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:05.024 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:41:05.024 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:41:05.027 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:41:05.027 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:41:05.027 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:41:05.028 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:05.028 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:05.028 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:41:05.029 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:41:05.029 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:41:05.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:05.031 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:41:05.031 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:41:05.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:41:05.031 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:05.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:05.032 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:41:05.032 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:41:05.032 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:41:05.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:05.033 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:41:05.034 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:41:05.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:41:05.034 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:05.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:05.034 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:41:05.035 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:41:05.035 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:41:05.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:05.036 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:41:05.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:41:05.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:41:05.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:41:05.036 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:41:05.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:41:05.037 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:41:05.037 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:41:05.037 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:05.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:05.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:05.042 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:41:05.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:41:05.559 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:41:05.561 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:41:05.563 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:41:05.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:41:05.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:41:05.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:41:05.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:41:05.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:41:05.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:41:05.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:41:05.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:41:05.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:41:05.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 01:41:05.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:41:05.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:41:05.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:41:05.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:41:05.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:41:05.992 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:41:06.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:06.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:06.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:06.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:06.463 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:41:06.936 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:41:07.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:07.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:07.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:07.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:07.409 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:41:07.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:41:07.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:41:07.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:07.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:07.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:07.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:07.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:07.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:07.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:41:07.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:41:07.687 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:41:07.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:07.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:07.687 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=572 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:07.687 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=572 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:07.687 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=572 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:07.687 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=572 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:07.687 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=572 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:07.687 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=572 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:07.687 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=572 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:12.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:41:12.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:41:12.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:12.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:12.692 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:12.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:12.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:12.697 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:41:12.697 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:12.697 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:41:12.697 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:41:12.699 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:41:12.699 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:41:12.700 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:41:12.700 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:12.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:12.700 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:41:12.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:41:12.701 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:41:12.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:12.702 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:41:12.703 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:41:12.703 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:41:12.703 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:12.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:12.704 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:41:12.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:41:12.704 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:41:12.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:12.705 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:41:12.705 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:41:12.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:41:12.706 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:12.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:12.706 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:41:12.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:41:12.706 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:41:12.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:12.710 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:41:12.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:41:12.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:41:12.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:41:12.710 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:41:12.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:41:12.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:41:12.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:12.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:41:12.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:41:12.710 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:41:12.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:12.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:12.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:12.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:12.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:12.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:12.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:12.711 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:41:12.711 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:41:12.711 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:41:12.711 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:41:12.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:12.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:12.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:12.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:12.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:12.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:12.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:12.712 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:41:12.712 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:41:12.712 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:41:12.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:12.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:12.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:17.720 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:41:17.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:41:17.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:17.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:17.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:17.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:17.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:17.729 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:41:17.729 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:17.729 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:41:17.730 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:41:17.732 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:41:17.732 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:41:17.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:41:17.733 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:17.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:17.733 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:41:17.734 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:41:17.734 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:41:17.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:17.735 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:41:17.735 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:41:17.735 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:41:17.735 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:17.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:17.736 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:41:17.736 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:41:17.736 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:41:17.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:17.738 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:41:17.738 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:41:17.738 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:41:17.738 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:17.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:17.738 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:41:17.738 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:41:17.738 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:41:17.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:17.741 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:41:17.741 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:41:17.741 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:41:17.742 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:17.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:17.746 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:41:18.224 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:41:18.267 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:41:18.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:41:18.271 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:41:18.274 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:41:18.696 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:41:18.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:18.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:18.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:18.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:19.170 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:41:19.642 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:41:19.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:19.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:19.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:19.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:20.114 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:41:20.589 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:41:20.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:20.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:20.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:20.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:21.062 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:41:21.536 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:41:21.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:21.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:21.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:21.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:22.008 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:41:22.484 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:41:22.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:22.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:22.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:22.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:22.955 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:41:23.429 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:41:23.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:23.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:23.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:23.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:23.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:23.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:23.759 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:41:23.759 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:41:23.759 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:41:23.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:23.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:23.759 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1298 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:23.759 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1298 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:23.759 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1298 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:23.759 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1298 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:23.759 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1298 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:23.759 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1298 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:23.759 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1298 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:41:28.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:41:28.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:41:28.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:28.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:28.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:28.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:28.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:28.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:41:28.774 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:28.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:41:28.775 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:41:28.780 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:41:28.780 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:41:28.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:41:28.781 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:28.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:28.781 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:41:28.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:41:28.782 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:41:28.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:28.785 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:41:28.785 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:41:28.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:41:28.785 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:28.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:28.786 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:41:28.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:41:28.786 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:41:28.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:28.789 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:41:28.789 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:41:28.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:41:28.789 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:28.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:28.789 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:41:28.790 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:41:28.790 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:41:28.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:28.793 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:41:28.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:41:28.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:41:28.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:41:28.793 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:41:28.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:41:28.794 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:41:28.794 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:41:28.794 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:28.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:28.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:28.799 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:41:29.277 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:41:29.321 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:41:29.323 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:41:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:41:29.325 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:41:29.749 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:41:29.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:29.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:29.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:29.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:30.225 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:41:30.697 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:41:30.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:30.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:30.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:30.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:31.165 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:41:31.628 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:41:31.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:31.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:31.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:31.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:32.099 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:41:32.563 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:41:32.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:32.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:32.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:32.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:33.031 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:41:33.503 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:41:33.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:33.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:33.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:33.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:33.978 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:41:34.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:34.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:34.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:34.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:34.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:34.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:34.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:34.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:34.335 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:41:34.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:41:34.335 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:41:39.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:41:39.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:41:39.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:39.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:39.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:39.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:39.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:39.347 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:41:39.347 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:39.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:41:39.348 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:41:39.350 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:41:39.350 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:41:39.350 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:41:39.350 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:39.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:39.351 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:41:39.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:41:39.352 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:41:39.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:39.353 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:41:39.353 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:41:39.353 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:41:39.354 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:39.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:39.354 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:41:39.354 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:41:39.354 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:41:39.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:39.356 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:41:39.357 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:41:39.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:41:39.357 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:39.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:39.357 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:41:39.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:41:39.357 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:41:39.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:39.361 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:41:39.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:41:39.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:41:39.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:41:39.361 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:41:39.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:41:39.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:41:39.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:39.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:41:39.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:41:39.361 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:41:39.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:39.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:39.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:39.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:39.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:39.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:39.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:39.362 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:41:39.362 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:41:39.362 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:41:39.362 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:41:39.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:39.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:39.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:39.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:39.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:39.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:39.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:39.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:41:39.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:41:39.363 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:41:39.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:39.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:39.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:44.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:41:44.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:41:44.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:44.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:44.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:44.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:44.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:44.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:41:44.386 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:44.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:41:44.386 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:41:44.389 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:41:44.389 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:41:44.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:41:44.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:44.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:44.390 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:41:44.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:41:44.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:41:44.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:44.392 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:41:44.392 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:41:44.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:41:44.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:44.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:44.393 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:41:44.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:41:44.393 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:41:44.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:44.395 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:41:44.395 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:41:44.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:41:44.395 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:41:44.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:44.395 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:41:44.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:41:44.395 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:41:44.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:44.398 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:41:44.398 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:41:44.399 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:41:44.399 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:41:44.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:41:44.403 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:41:44.882 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:41:44.925 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:41:44.927 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:41:44.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:41:44.929 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:41:44.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:41:44.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:41:44.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:41:45.354 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:41:45.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:45.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:45.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:45.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:45.828 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:41:45.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:41:45.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:41:45.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:41:45.936 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:41:45.936 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:41:46.301 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:41:46.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:46.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:46.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:46.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:46.773 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:41:47.244 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:41:47.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:47.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:47.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:47.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:47.716 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:41:48.190 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:41:48.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:48.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:48.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:48.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:48.662 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:41:49.133 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:41:49.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:49.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:49.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:49.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:49.603 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:41:50.077 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:41:50.549 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:41:51.021 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:41:51.492 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:41:51.963 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:41:52.434 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:41:52.905 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:41:53.376 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:41:53.846 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:41:54.316 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:41:54.785 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:41:55.258 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:41:55.730 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:41:56.201 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:41:56.675 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:41:57.147 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:41:57.619 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:41:58.090 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:41:58.561 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:41:59.034 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:41:59.507 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:41:59.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:41:59.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:41:59.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:41:59.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:41:59.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:41:59.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:41:59.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:41:59.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:41:59.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:41:59.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:41:59.712 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:41:59.712 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:41:59.712 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:42:04.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:42:04.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:42:04.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:42:04.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:42:04.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:42:04.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:42:04.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:42:04.721 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:42:04.721 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:04.722 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:42:04.722 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:42:04.722 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:42:04.722 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:42:04.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:42:04.723 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:04.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:42:04.723 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:42:04.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:42:04.723 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:42:04.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:04.724 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:42:04.724 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:42:04.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:42:04.724 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:04.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:42:04.724 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:42:04.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:42:04.724 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:42:04.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:04.725 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:42:04.725 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:42:04.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:42:04.725 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:04.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:42:04.725 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:42:04.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:42:04.725 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:42:04.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:42:04.727 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:42:04.727 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:42:04.727 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:42:04.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:04.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:04.732 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:42:05.210 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:42:05.250 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:42:05.250 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:42:05.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:42:05.252 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:42:05.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:42:05.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:42:05.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:42:05.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:05.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:42:05.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:42:05.282 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:42:05.282 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:42:05.303 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:42:05.306 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:42:05.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:42:05.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:42:05.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:42:05.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:05.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:05.683 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:42:05.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:05.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:05.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:05.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:06.154 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:42:06.625 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:42:06.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:06.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:06.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:06.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:07.096 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:42:07.569 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:42:07.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:07.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:07.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:07.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:08.042 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:42:08.514 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:42:08.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:08.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:08.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:08.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:08.985 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:42:09.458 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:42:09.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:09.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:09.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:09.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:09.931 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:42:10.403 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:42:10.874 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:42:11.348 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:42:11.820 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:42:12.293 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:42:12.763 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:42:13.234 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:42:13.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:42:13.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:13.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:42:13.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:42:13.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:13.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:13.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:13.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:13.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:42:13.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:42:13.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:42:13.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:42:13.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:42:13.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:42:13.336 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:42:13.336 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:42:13.336 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:42:13.336 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:42:13.336 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:42:13.336 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:42:18.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:42:18.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:42:18.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:42:18.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:42:18.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:42:18.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:42:18.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:42:18.351 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:42:18.351 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:18.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:42:18.352 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:42:18.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:42:18.359 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:42:18.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:42:18.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:18.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:42:18.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:42:18.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:42:18.361 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:42:18.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:18.364 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:42:18.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:42:18.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:42:18.365 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:18.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:42:18.365 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:42:18.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:42:18.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:42:18.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:18.369 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:42:18.369 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:42:18.369 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:42:18.369 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:18.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:42:18.369 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:42:18.369 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:42:18.369 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:42:18.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:18.373 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:42:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:18.374 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:42:18.374 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:42:18.374 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:42:18.374 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:18.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:18.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:18.379 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:42:18.858 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:42:18.904 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:42:18.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:42:18.908 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:42:18.910 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:42:18.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:42:18.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:42:18.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:42:18.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:18.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:42:18.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:42:18.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:42:18.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:42:18.950 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:42:18.953 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:42:18.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:42:18.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:42:18.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:42:18.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:18.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:19.331 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:42:19.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:19.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:19.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:19.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:19.804 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:42:20.277 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:42:20.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:20.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:20.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:20.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:20.749 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:42:21.220 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:42:21.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:21.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:21.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:21.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:21.693 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:42:22.166 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:42:22.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:22.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:22.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:22.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:22.639 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:42:23.112 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:42:23.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:23.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:23.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:23.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:23.585 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:42:24.057 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:42:24.530 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:42:25.003 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:42:25.476 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:42:25.949 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:42:26.422 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:42:26.894 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:42:26.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:42:26.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:26.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:42:26.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:42:26.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:26.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:26.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:26.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:26.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:42:26.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:42:26.979 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:42:26.979 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:42:26.979 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:42:26.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:42:26.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:42:31.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:42:31.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:42:31.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:42:31.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:42:31.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:42:31.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:42:32.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:42:32.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:42:32.012 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:32.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:42:32.013 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:42:32.018 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:42:32.019 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:42:32.019 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:42:32.020 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:32.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:42:32.021 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:42:32.021 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:42:32.021 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:42:32.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:32.025 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:42:32.026 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:42:32.026 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:42:32.026 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:32.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:42:32.027 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:42:32.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:42:32.028 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:42:32.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:32.031 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:42:32.031 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:42:32.032 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:42:32.032 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:32.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:42:32.033 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:42:32.033 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:42:32.033 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:42:32.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:32.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:42:32.038 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:42:32.038 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:42:32.038 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:32.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:32.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:32.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:32.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:32.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:32.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:32.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:32.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:32.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:32.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:32.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:32.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:32.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:32.042 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:42:32.521 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:42:32.563 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:42:32.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:42:32.566 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:42:32.568 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:42:32.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:42:32.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:42:32.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:42:32.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:32.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:42:32.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:42:32.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:42:32.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:42:32.613 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:42:32.617 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:42:32.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:42:32.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:42:32.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:42:32.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:32.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:32.992 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:42:33.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:33.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:33.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:33.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:33.464 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:42:33.936 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:42:34.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:34.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:34.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:34.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:34.408 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:42:34.881 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:42:35.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:35.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:35.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:35.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:35.354 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:42:35.826 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:42:36.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:36.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:36.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:36.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:36.300 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:42:36.772 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:42:37.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:37.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:37.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:37.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:37.244 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:42:37.715 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:42:38.189 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:42:38.661 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:42:39.134 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:42:39.605 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:42:40.075 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:42:40.546 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:42:40.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:42:40.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:40.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:42:40.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:42:40.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:42:40.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:42:40.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:42:40.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:40.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:42:40.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:42:40.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:42:40.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:42:40.682 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:42:40.686 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:42:40.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:42:40.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:42:40.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:42:40.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:40.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:41.017 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:42:41.488 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:42:41.961 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:42:42.434 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:42:42.906 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:42:43.377 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:42:43.850 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:42:44.323 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:42:44.795 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:42:45.266 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:42:45.740 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:42:46.212 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:42:46.685 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:42:47.158 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:42:47.630 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:42:48.103 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:42:48.573 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:42:48.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:42:48.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:48.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:42:48.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:42:48.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:48.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:48.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:48.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:48.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:42:48.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:42:48.720 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:42:48.720 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:42:48.720 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:42:48.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:42:48.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:42:48.720 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:42:48.720 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:42:48.720 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:42:48.720 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:42:48.720 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:42:48.720 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:42:48.720 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:42:53.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:42:53.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:42:53.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:42:53.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:42:53.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:42:53.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:42:53.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:42:53.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:42:53.733 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:53.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:42:53.733 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:42:53.736 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:42:53.737 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:42:53.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:42:53.737 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:53.737 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:42:53.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:42:53.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:42:53.737 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:42:53.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:53.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:42:53.741 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:42:53.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:42:53.742 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:53.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:42:53.742 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:42:53.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:42:53.742 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:42:53.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:53.745 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:42:53.745 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:42:53.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:42:53.745 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:42:53.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:42:53.745 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:42:53.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:42:53.745 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:42:53.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:53.749 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:42:53.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:42:53.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:42:53.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:42:53.749 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:42:53.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:42:53.750 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:42:53.750 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:53.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:42:53.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:53.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:42:53.755 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:42:54.232 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:42:54.275 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:42:54.277 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:42:54.278 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:42:54.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:42:54.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:42:54.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:42:54.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:42:54.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:54.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:42:54.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:42:54.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:42:54.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:42:54.324 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:42:54.325 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:42:54.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:42:54.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:42:54.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:42:54.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:54.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:42:54.703 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:42:54.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:54.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:54.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:54.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:55.176 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:42:55.648 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:42:55.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:55.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:55.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:55.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:56.119 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:42:56.589 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:42:56.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:56.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:56.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:56.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:57.063 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:42:57.535 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:42:57.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:57.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:57.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:57.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:58.008 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:42:58.481 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:42:58.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:42:58.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:42:58.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:42:58.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:42:58.954 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:42:59.426 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:42:59.899 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:43:00.372 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:43:00.844 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:43:01.315 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:43:01.786 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:43:02.257 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:43:02.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:43:02.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:02.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:43:02.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:43:02.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:43:02.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:43:02.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:43:02.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:02.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:43:02.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:43:02.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:43:02.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:43:02.393 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:43:02.397 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:43:02.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:43:02.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:43:02.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:43:02.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:02.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:02.729 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:43:03.203 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:43:03.675 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:43:04.146 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:43:04.616 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:43:05.087 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:43:05.560 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:43:06.033 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:43:06.505 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:43:06.976 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:43:07.450 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:43:07.922 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:43:08.394 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:43:08.865 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:43:09.338 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:43:09.811 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:43:10.283 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:43:10.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:43:10.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:10.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:43:10.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:43:10.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:43:10.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:43:10.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:43:10.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:43:10.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:43:10.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:43:10.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:43:10.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:43:10.429 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:43:10.429 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:43:10.429 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:43:10.430 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:10.430 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:10.430 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:10.430 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:10.430 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:10.430 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:10.430 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:10.430 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:10.430 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:15.432 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:43:15.432 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:43:15.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:43:15.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:43:15.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:43:15.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:43:15.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:43:15.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:43:15.442 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:43:15.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:43:15.442 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:43:15.446 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:43:15.447 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:43:15.447 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:43:15.447 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:43:15.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:43:15.447 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:43:15.447 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:43:15.448 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:43:15.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:43:15.451 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:43:15.451 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:43:15.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:43:15.451 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:43:15.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:43:15.451 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:43:15.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:43:15.451 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:43:15.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:43:15.454 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:43:15.454 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:43:15.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:43:15.454 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:43:15.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:43:15.454 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:43:15.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:43:15.454 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:43:15.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:43:15.457 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:43:15.458 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:43:15.458 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:43:15.458 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:15.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:15.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:15.463 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:43:15.941 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:43:15.983 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:43:15.986 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:43:15.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:43:15.988 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:43:16.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:43:16.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:43:16.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:43:16.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:16.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:43:16.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:43:16.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:43:16.015 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:43:16.034 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:43:16.037 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:43:16.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:43:16.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:43:16.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:43:16.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:16.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:16.414 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:43:16.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:43:16.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:43:16.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:43:16.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:43:16.887 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:43:17.360 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:43:17.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:43:17.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:43:17.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:43:17.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:43:17.832 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:43:18.305 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:43:18.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:43:18.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:43:18.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:43:18.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:43:18.778 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:43:19.250 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:43:19.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:43:19.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:43:19.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:43:19.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:43:19.721 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:43:20.195 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:43:20.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:43:20.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:43:20.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:43:20.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:43:20.667 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:43:21.139 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:43:21.613 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:43:22.085 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:43:22.557 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:43:23.028 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:43:23.499 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:43:23.972 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:43:24.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:43:24.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:24.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:43:24.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:43:24.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:43:24.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:43:24.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:43:24.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:24.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:43:24.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:43:24.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:43:24.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:43:24.106 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:43:24.110 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:43:24.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:43:24.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:43:24.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:43:24.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:24.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:24.445 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:43:24.917 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:43:25.390 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:43:25.863 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:43:26.335 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:43:26.806 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:43:27.277 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:43:27.748 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:43:28.221 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:43:28.694 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:43:29.166 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:43:29.637 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:43:30.111 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:43:30.583 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:43:31.055 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:43:31.526 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:43:31.997 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:43:32.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:43:32.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:32.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:43:32.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:43:32.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:43:32.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:43:32.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:43:32.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:43:32.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:43:32.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:43:32.140 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:43:32.140 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:43:32.140 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:43:32.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:43:32.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:43:32.140 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:32.141 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:32.141 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:32.141 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:32.141 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:32.141 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:32.141 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:43:37.143 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:43:37.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:43:37.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:43:37.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:43:37.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:43:37.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:43:37.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:43:37.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:43:37.153 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:43:37.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:43:37.154 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:43:37.157 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:43:37.158 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:43:37.158 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:43:37.158 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:43:37.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:43:37.159 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:43:37.159 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:43:37.159 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:43:37.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:43:37.161 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:43:37.161 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:43:37.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:43:37.161 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:43:37.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:43:37.162 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:43:37.162 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:43:37.162 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:43:37.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:43:37.164 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:43:37.164 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:43:37.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:43:37.164 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:43:37.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:43:37.164 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:43:37.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:43:37.164 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:43:37.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:43:37.167 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:43:37.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:43:37.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:43:37.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:43:37.167 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:43:37.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:43:37.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:43:37.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:43:37.168 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:43:37.168 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:43:37.168 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:37.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:37.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:37.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:43:37.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:37.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:37.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:37.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:37.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:37.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:37.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:43:37.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:37.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:43:37.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:37.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:43:37.173 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:43:37.651 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:43:37.687 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:43:37.688 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:43:37.690 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:43:37.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:43:37.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:43:37.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:43:37.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:43:37.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:37.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:43:37.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:43:37.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:43:37.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:43:37.743 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:43:37.746 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:43:37.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:43:37.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:43:37.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:43:37.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:37.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:38.123 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:43:38.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:43:38.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:43:38.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:43:38.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:43:38.596 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:43:39.069 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:43:39.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:43:39.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:43:39.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:43:39.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:43:39.542 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:43:40.015 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:43:40.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:43:40.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:43:40.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:43:40.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:43:40.488 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:43:40.960 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:43:41.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:43:41.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:43:41.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:43:41.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:43:41.431 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:43:41.902 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:43:42.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:43:42.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:43:42.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:43:42.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:43:42.375 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:43:42.848 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:43:43.320 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:43:43.794 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:43:44.267 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:43:44.739 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:43:45.210 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:43:45.683 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:43:45.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:43:45.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:45.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:43:45.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:43:45.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:43:45.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:43:45.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:43:45.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:45.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:43:45.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:43:45.786 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:43:45.786 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:43:45.817 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:43:45.822 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:43:45.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:43:45.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:43:45.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:43:45.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:45.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:46.156 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:43:46.628 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:43:47.101 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:43:47.574 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:43:48.046 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:43:48.519 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:43:48.992 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:43:49.465 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:43:49.938 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:43:50.410 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:43:50.883 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:43:51.356 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:43:51.829 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:43:52.301 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:43:52.775 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:43:53.248 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:43:53.720 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:43:53.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:43:53.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:53.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:43:53.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:43:53.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:43:53.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:43:53.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:43:53.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:53.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:43:53.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:43:53.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:43:53.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:43:53.903 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:43:53.908 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:43:53.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:43:53.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:43:53.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:43:53.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:53.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:43:54.191 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:43:54.664 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:43:55.137 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:43:55.609 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:43:56.080 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:43:56.551 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:43:57.022 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:43:57.493 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:43:57.965 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:43:58.439 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:43:58.911 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:43:59.382 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 01:43:59.853 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 01:44:00.326 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 01:44:00.799 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 01:44:01.271 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 01:44:01.744 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 01:44:01.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:44:01.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:01.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:44:01.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:44:01.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:44:01.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:44:01.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:44:01.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:01.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:44:01.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:44:01.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:44:01.946 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:44:01.976 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:44:01.981 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:44:01.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:01.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:44:01.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:44:01.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:44:01.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:01.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:02.217 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 01:44:02.689 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 01:44:03.160 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 01:44:03.633 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 01:44:04.106 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 01:44:04.579 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 01:44:05.052 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 01:44:05.525 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 01:44:05.998 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 01:44:06.471 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 01:44:06.944 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 01:44:07.416 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 01:44:07.892 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 01:44:08.364 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 01:44:08.837 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 01:44:09.310 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 01:44:09.783 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 01:44:09.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:44:10.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:10.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:44:10.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:44:10.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:44:10.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:44:10.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:44:10.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:44:10.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:44:10.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:44:10.009 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:44:10.009 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:44:10.010 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:44:10.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:44:10.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:44:15.017 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:44:15.017 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:44:15.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:44:15.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:44:15.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:44:15.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:44:15.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:44:15.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:44:15.020 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:44:15.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:44:15.020 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:44:15.021 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:44:15.021 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:44:15.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:44:15.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:44:15.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:44:15.022 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:44:15.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:44:15.022 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:44:15.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:44:15.023 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:44:15.023 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:44:15.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:44:15.023 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:44:15.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:44:15.023 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:44:15.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:44:15.023 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:44:15.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:44:15.024 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:44:15.024 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:44:15.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:44:15.024 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:44:15.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:44:15.024 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:44:15.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:44:15.024 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:44:15.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:44:15.026 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:44:15.026 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:44:15.026 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:15.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:15.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:15.031 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:44:15.509 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:44:15.546 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:44:15.547 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:44:15.548 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:44:15.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:44:15.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:44:15.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:44:15.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:44:15.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:15.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:44:15.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:44:15.569 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:44:15.569 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:44:15.601 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:44:15.605 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:44:15.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:44:15.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:44:15.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:44:15.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:15.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:15.980 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:44:16.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:44:16.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:44:16.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:44:16.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:44:16.452 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:44:16.924 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:44:17.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:44:17.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:44:17.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:44:17.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:44:17.395 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:44:17.866 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:44:18.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:44:18.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:44:18.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:44:18.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:44:18.337 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:44:18.808 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:44:19.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:44:19.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:44:19.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:44:19.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:44:19.281 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:44:19.754 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:44:20.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:44:20.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:44:20.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:44:20.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:44:20.226 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:44:20.700 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:44:21.172 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:44:21.644 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:44:22.118 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:44:22.591 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:44:23.063 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:44:23.534 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:44:23.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:44:23.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:23.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:44:23.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:44:23.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:44:23.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:44:23.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:44:23.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:23.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:44:23.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:44:23.642 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:44:23.642 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:44:23.670 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:44:23.674 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:44:23.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:44:23.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:44:23.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:44:23.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:23.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:24.005 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:44:24.478 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:44:24.951 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:44:25.423 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:44:25.894 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:44:26.367 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:44:26.840 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:44:27.312 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:44:27.785 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:44:28.258 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:44:28.730 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:44:29.203 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:44:29.676 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:44:30.149 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:44:30.622 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:44:31.095 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:44:31.567 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:44:31.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:44:31.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:31.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:44:31.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:44:31.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:44:31.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:44:31.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:44:31.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:44:31.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:44:31.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:44:31.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:44:31.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:44:31.702 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:44:31.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:44:31.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:44:36.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:44:36.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:44:36.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:44:36.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:44:36.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:44:36.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:44:36.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:44:36.721 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:44:36.721 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:44:36.722 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:44:36.722 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:44:36.726 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:44:36.727 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:44:36.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:44:36.727 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:44:36.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:44:36.728 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:44:36.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:44:36.728 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:44:36.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:44:36.730 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:44:36.730 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:44:36.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:44:36.730 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:44:36.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:44:36.730 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:44:36.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:44:36.730 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:44:36.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:44:36.732 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:44:36.732 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:44:36.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:44:36.733 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:44:36.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:44:36.733 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:44:36.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:44:36.733 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:44:36.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:44:36.736 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:44:36.736 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:44:36.736 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:36.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:36.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:44:36.741 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:44:37.219 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:44:37.262 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:44:37.264 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:44:37.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:44:37.266 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:44:37.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:44:37.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:44:37.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:44:37.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:37.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:44:37.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:44:37.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:44:37.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:44:37.311 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:44:37.315 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:44:37.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:44:37.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:44:37.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:44:37.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:37.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:37.690 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:44:37.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:44:37.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:44:37.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:44:37.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:44:38.163 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:44:38.635 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:44:38.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:44:38.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:44:38.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:44:38.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:44:39.106 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:44:39.579 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:44:39.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:44:39.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:44:39.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:44:39.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:44:40.052 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:44:40.524 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:44:40.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:44:40.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:44:40.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:44:40.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:44:40.995 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:44:41.468 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:44:41.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:44:41.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:44:41.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:44:41.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:44:41.940 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:44:42.412 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:44:42.884 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:44:43.357 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:44:43.829 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:44:44.301 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:44:44.773 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:44:45.246 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:44:45.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:44:45.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:45.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:44:45.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:44:45.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:44:45.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:44:45.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:44:45.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:45.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:44:45.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:44:45.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:44:45.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:44:45.380 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:44:45.383 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:44:45.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:44:45.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:44:45.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:44:45.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:45.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:45.719 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:44:46.191 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:44:46.662 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:44:47.135 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:44:47.608 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:44:48.080 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:44:48.551 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:44:49.024 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:44:49.497 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:44:49.969 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:44:50.440 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:44:50.913 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:44:51.385 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:44:51.858 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:44:52.328 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:44:52.802 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:44:53.274 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:44:53.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:44:53.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:53.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:44:53.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:44:53.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:44:53.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:44:53.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:44:53.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:53.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:44:53.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:44:53.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:44:53.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:44:53.459 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:44:53.463 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:44:53.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:44:53.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:44:53.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:44:53.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:53.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:44:53.746 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:44:54.217 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:44:54.691 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:44:55.163 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:44:55.635 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:44:56.106 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:44:56.577 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:44:57.048 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:44:57.521 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:44:58.008 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:44:58.480 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:44:58.954 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 01:44:59.426 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 01:44:59.898 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 01:45:00.369 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 01:45:00.842 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 01:45:01.315 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 01:45:01.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:01.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:01.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:45:01.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:45:01.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:45:01.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:45:01.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:45:01.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:01.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:45:01.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:45:01.499 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:45:01.499 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:45:01.549 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:45:01.553 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:45:01.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:01.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:45:01.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:45:01.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:01.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:01.786 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 01:45:02.258 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 01:45:02.731 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 01:45:03.204 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 01:45:03.676 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 01:45:04.149 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 01:45:04.622 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 01:45:05.094 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 01:45:05.565 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 01:45:06.036 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 01:45:06.509 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 01:45:06.982 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 01:45:07.454 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 01:45:07.927 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 01:45:08.400 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 01:45:08.872 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 01:45:09.343 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 01:45:09.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:09.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:09.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:45:09.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:45:09.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:45:09.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:45:09.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:45:09.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:45:09.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:45:09.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:45:09.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:45:09.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:45:09.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:45:09.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:45:09.587 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:45:09.587 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7092 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:45:09.587 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7092 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:45:09.587 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7092 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:45:09.587 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7093 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:45:09.587 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7093 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:45:09.587 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7093 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:45:09.588 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7093 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:45:09.588 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7093 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:45:09.588 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7093 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:45:09.588 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7093 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:45:09.588 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7093 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:45:14.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:45:14.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:45:14.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:45:14.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:45:14.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:45:14.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:45:14.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:45:14.595 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:45:14.595 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:45:14.595 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:45:14.595 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:45:14.596 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:45:14.597 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:45:14.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:45:14.597 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:45:14.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:45:14.598 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:45:14.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:45:14.598 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:45:14.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:45:14.600 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:45:14.600 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:45:14.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:45:14.601 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:45:14.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:45:14.601 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:45:14.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:45:14.601 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:45:14.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:45:14.603 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:45:14.603 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:45:14.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:45:14.604 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:45:14.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:45:14.604 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:45:14.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:45:14.604 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:45:14.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:45:14.608 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:45:14.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:45:14.608 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:45:14.609 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:45:14.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:45:14.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:45:14.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:45:14.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:45:14.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:45:14.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:45:14.613 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:45:15.091 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:45:15.133 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:45:15.135 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:45:15.137 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:45:15.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:15.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:45:15.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:45:15.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:45:15.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:15.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:45:15.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:45:15.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:45:15.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:45:15.183 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:45:15.187 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:45:15.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:15.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:45:15.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:45:15.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:15.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:15.561 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:45:15.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:45:15.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:45:15.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:45:15.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:45:16.033 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:45:16.505 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:45:16.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:45:16.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:45:16.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:45:16.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:45:16.977 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:45:17.448 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:45:17.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:45:17.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:45:17.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:45:17.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:45:17.919 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:45:18.390 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:45:18.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:45:18.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:45:18.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:45:18.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:45:18.863 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:45:19.335 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:45:19.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:45:19.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:45:19.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:45:19.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:45:19.807 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:45:20.278 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:45:20.749 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:45:21.220 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:45:21.693 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:45:22.166 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:45:22.637 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:45:23.109 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:45:23.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:23.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:23.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:45:23.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:45:23.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:45:23.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:45:23.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:45:23.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:23.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:45:23.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:45:23.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:45:23.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:45:23.244 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:45:23.248 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:45:23.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:23.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:45:23.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:45:23.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:23.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:23.579 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:45:24.050 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:45:24.521 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:45:24.995 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:45:25.467 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:45:25.939 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:45:26.410 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:45:26.883 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:45:27.356 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:45:27.827 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:45:28.299 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:45:28.772 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:45:29.244 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:45:29.716 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:45:30.187 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:45:30.658 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:45:31.131 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:45:31.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:31.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:31.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:45:31.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:45:31.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:45:31.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:45:31.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:45:31.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:31.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:45:31.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:45:31.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:45:31.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:45:31.311 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:45:31.314 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:45:31.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:31.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:45:31.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:45:31.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:31.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:31.604 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:45:32.075 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:45:32.546 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:45:33.020 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:45:33.492 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:45:33.964 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:45:34.435 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:45:34.908 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:45:35.381 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:45:35.853 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:45:36.324 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:45:36.797 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 01:45:37.270 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 01:45:37.742 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 01:45:38.213 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 01:45:38.686 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 01:45:39.158 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 01:45:39.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:39.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:39.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:45:39.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:45:39.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:45:39.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:45:39.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:45:39.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:39.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:45:39.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:45:39.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:45:39.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:45:39.393 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:45:39.396 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:45:39.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:39.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:45:39.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:45:39.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:39.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:39.630 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 01:45:40.101 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 01:45:40.575 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 01:45:41.047 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 01:45:41.519 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 01:45:41.990 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 01:45:42.463 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 01:45:42.935 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 01:45:43.408 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 01:45:43.881 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 01:45:44.353 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 01:45:44.825 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 01:45:45.296 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 01:45:45.770 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 01:45:46.242 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 01:45:46.714 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 01:45:47.185 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 01:45:47.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:47.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:47.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:45:47.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:45:47.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:45:47.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:45:47.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:45:47.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:47.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:45:47.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:45:47.434 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:45:47.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:45:47.465 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:45:47.469 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:45:47.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:47.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:45:47.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:45:47.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:47.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:47.656 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 01:45:48.127 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 01:45:48.600 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 01:45:49.072 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 01:45:49.544 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 01:45:50.015 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 01:45:50.489 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 01:45:50.961 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 01:45:51.433 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 01:45:51.907 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 01:45:52.379 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 01:45:52.851 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 01:45:53.322 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 01:45:53.795 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 01:45:54.268 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 01:45:54.740 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 01:45:55.214 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 01:45:55.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:55.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:55.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:45:55.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:45:55.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:45:55.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:45:55.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:45:55.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:55.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:45:55.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:45:55.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:45:55.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:45:55.536 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:45:55.540 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:45:55.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:45:55.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:45:55.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:45:55.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:55.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:45:55.685 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 01:45:56.157 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 01:45:56.628 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 01:45:57.102 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 01:45:57.574 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 01:45:58.047 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 01:45:58.520 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 01:45:58.992 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 01:45:59.464 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 01:45:59.936 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 01:46:00.409 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 01:46:00.881 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 01:46:01.353 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 01:46:01.824 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 01:46:02.297 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 01:46:02.770 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-03 01:46:03.242 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-03 01:46:03.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:46:03.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:03.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:46:03.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:46:03.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:46:03.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:46:03.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:46:03.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:03.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:46:03.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:46:03.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:46:03.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:46:03.614 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:46:03.619 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:46:03.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:46:03.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:46:03.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:46:03.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:03.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:03.713 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-03 01:46:04.184 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-03 01:46:04.654 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-03 01:46:05.128 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-03 01:46:05.600 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-03 01:46:06.072 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-03 01:46:06.543 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-03 01:46:07.016 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-03 01:46:07.489 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-03 01:46:07.961 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-03 01:46:08.432 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-03 01:46:08.905 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-03 01:46:09.378 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-03 01:46:09.850 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-03 01:46:10.321 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-03 01:46:10.794 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-03 01:46:11.267 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-03 01:46:11.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:46:11.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:11.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:46:11.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:46:11.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:46:11.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:46:11.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:46:11.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:11.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:46:11.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:46:11.659 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:46:11.659 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:46:11.687 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:46:11.691 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:46:11.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:46:11.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:46:11.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:46:11.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:11.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:11.738 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-03 01:46:12.210 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-03 01:46:12.682 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-03 01:46:13.151 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-03 01:46:13.624 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-03 01:46:14.097 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-03 01:46:14.569 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-03 01:46:15.042 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-03 01:46:15.515 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-03 01:46:15.987 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-03 01:46:16.458 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-03 01:46:16.931 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-03 01:46:17.403 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-03 01:46:17.875 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-03 01:46:18.346 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-03 01:46:18.819 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-03 01:46:19.292 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-03 01:46:19.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:46:19.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:19.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:46:19.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:46:19.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:19.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:19.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:19.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:19.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:46:19.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:46:19.730 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:46:19.730 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:46:19.730 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:46:19.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:46:19.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:46:24.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:46:24.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:46:24.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:46:24.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:46:24.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:46:24.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:46:24.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:46:24.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:46:24.744 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:46:24.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:46:24.744 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:46:24.752 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:46:24.752 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:46:24.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:46:24.752 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:46:24.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:46:24.753 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:46:24.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:46:24.753 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:46:24.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:24.759 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:46:24.759 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:46:24.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:46:24.759 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:46:24.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:46:24.760 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:46:24.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:46:24.760 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:46:24.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:24.765 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:46:24.765 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:46:24.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:46:24.765 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:46:24.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:46:24.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:46:24.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:46:24.766 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:46:24.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:24.770 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:46:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:46:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:46:24.771 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:46:24.771 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:46:24.771 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:24.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:24.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:24.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:46:25.255 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:46:25.299 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:46:25.301 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:46:25.303 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:46:25.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:46:25.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:46:25.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:46:25.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:46:25.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:25.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:46:25.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:46:25.336 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:46:25.336 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:46:25.347 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:46:25.349 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:46:25.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:46:25.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:46:25.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:46:25.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:25.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:25.726 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:46:25.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:25.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:25.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:25.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:26.198 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:46:26.669 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:46:26.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:26.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:26.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:26.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:27.142 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:46:27.615 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:46:27.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:27.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:27.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:27.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:28.087 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:46:28.558 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:46:28.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:28.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:28.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:28.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:29.031 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:46:29.504 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:46:29.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:29.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:29.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:29.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:29.976 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:46:30.447 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:46:30.920 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:46:31.393 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:46:31.864 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:46:32.336 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:46:32.809 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:46:33.282 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:46:33.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:46:33.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:33.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:46:33.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:46:33.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:46:33.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:46:33.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:46:33.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:33.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:46:33.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:46:33.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:46:33.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:46:33.419 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:46:33.423 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:46:33.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:46:33.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:46:33.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:46:33.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:33.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:33.753 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:46:34.225 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:46:34.698 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:46:35.171 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:46:35.643 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:46:36.116 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:46:36.589 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:46:37.061 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:46:37.532 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:46:38.005 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:46:38.478 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:46:38.950 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:46:39.423 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:46:39.896 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:46:40.368 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:46:40.839 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:46:41.310 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:46:41.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:46:41.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:41.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:46:41.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:46:41.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:41.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:41.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:41.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:41.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:46:41.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:46:41.454 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:46:41.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:46:41.454 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:46:41.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:46:41.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:46:41.454 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:46:41.454 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:46:41.454 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:46:41.454 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:46:41.454 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:46:41.454 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:46:41.454 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3603 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:46:46.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:46:46.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:46:46.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:46:46.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:46:46.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:46:46.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:46:46.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:46:46.465 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:46:46.466 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:46:46.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:46:46.466 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:46:46.469 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:46:46.469 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:46:46.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:46:46.469 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:46:46.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:46:46.470 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:46:46.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:46:46.470 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:46:46.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:46.472 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:46:46.472 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:46:46.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:46:46.472 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:46:46.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:46:46.473 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:46:46.473 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:46:46.473 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:46:46.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:46.474 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:46:46.474 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:46:46.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:46:46.474 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:46:46.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:46:46.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:46:46.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:46:46.474 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:46:46.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:46:46.477 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:46:46.477 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:46:46.477 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:46.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:46.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:46:46.482 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:46:46.961 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:46:47.001 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:46:47.004 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:46:47.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:46:47.006 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:46:47.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:46:47.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:46:47.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:46:47.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:47.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:46:47.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:46:47.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:46:47.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:46:47.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:46:47.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:46:47.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:46:47.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:47.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:47.433 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:46:47.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:47.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:47.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:47.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:47.904 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:46:48.375 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:46:48.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:48.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:48.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:48.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:48.848 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:46:49.321 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:46:49.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:49.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:49.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:49.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:49.794 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:46:50.267 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:46:50.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:50.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:50.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:50.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:50.740 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:46:51.212 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:46:51.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:51.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:51.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:51.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:51.685 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:46:52.158 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:46:52.631 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:46:53.104 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:46:53.577 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:46:54.049 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:46:54.522 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:46:54.995 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:46:55.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:46:55.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:46:55.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:46:55.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:46:55.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:46:55.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:46:55.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:46:55.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:46:55.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:46:55.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:46:55.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:46:55.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:46:55.092 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:46:55.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:46:55.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:46:55.093 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:46:55.093 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:46:55.093 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:46:55.093 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:46:55.093 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:46:55.093 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:46:55.093 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:47:00.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:47:00.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:47:00.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:47:00.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:47:00.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:47:00.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:00.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:00.106 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:47:00.106 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:00.106 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:47:00.107 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:47:00.110 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:47:00.111 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:47:00.111 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:47:00.111 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:00.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:47:00.112 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:47:00.113 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:47:00.113 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:47:00.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:00.114 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:47:00.115 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:47:00.115 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:47:00.115 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:00.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:47:00.116 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:47:00.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:47:00.116 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:47:00.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:00.118 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:47:00.118 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:47:00.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:47:00.118 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:00.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:47:00.118 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:47:00.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:47:00.118 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:47:00.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:00.121 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:47:00.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:47:00.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:47:00.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:47:00.121 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:47:00.122 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:47:00.122 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:47:00.122 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:00.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:00.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:00.127 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:47:00.605 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:47:00.650 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:47:00.653 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:47:00.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:47:00.655 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:47:00.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:47:00.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:47:00.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:47:00.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:47:00.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:47:00.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:47:00.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:47:00.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:47:00.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:47:00.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:47:00.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:47:00.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:47:00.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:47:01.077 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:47:01.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:01.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:01.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:01.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:01.548 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:47:02.019 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:47:02.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:02.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:02.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:02.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:02.492 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:47:02.965 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:47:03.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:03.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:03.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:03.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:03.437 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:47:03.908 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:47:04.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:04.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:04.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:04.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:04.382 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:47:04.854 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:47:05.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:05.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:05.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:05.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:05.327 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:47:05.800 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:47:06.273 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:47:06.745 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:47:07.219 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:47:07.691 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:47:08.163 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:47:08.634 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:47:08.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:47:08.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:47:08.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:47:08.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:47:08.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:08.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:08.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:08.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:08.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:08.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:47:08.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:47:08.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:47:08.717 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:47:08.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:47:08.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:47:13.725 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:47:13.725 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:47:13.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:47:13.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:13.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:47:13.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:47:13.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:13.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:47:13.732 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:13.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:47:13.732 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:47:13.735 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:47:13.736 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:47:13.736 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:47:13.736 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:13.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:47:13.736 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:47:13.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:47:13.737 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:47:13.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:13.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:47:13.741 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:47:13.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:47:13.741 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:13.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:47:13.741 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:47:13.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:47:13.741 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:47:13.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:13.745 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:47:13.746 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:47:13.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:47:13.746 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:13.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:47:13.746 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:47:13.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:47:13.746 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:47:13.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:13.751 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:47:13.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:13.752 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:47:13.752 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:47:13.752 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:47:13.753 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:47:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:13.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:47:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:13.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:13.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:13.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:13.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:13.757 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:47:14.235 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:47:14.283 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:47:14.287 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:47:14.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:47:14.290 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:47:14.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:47:14.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:47:14.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:47:14.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:47:14.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:47:14.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:47:14.326 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:47:14.326 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:47:14.707 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:47:14.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:14.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:14.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:14.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:15.178 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:47:15.651 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:47:15.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:15.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:15.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:15.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:16.124 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:47:16.596 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:47:16.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:16.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:16.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:16.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:17.067 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:47:17.540 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:47:17.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:17.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:17.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:17.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:18.012 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:47:18.484 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:47:18.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:18.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:18.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:18.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:18.955 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:47:19.428 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:47:19.901 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:47:20.372 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:47:20.843 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:47:20.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:47:20.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:47:20.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:20.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:20.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:20.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:20.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:20.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:47:20.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:47:20.976 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:47:20.976 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:47:20.976 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:47:20.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:47:20.976 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1561 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:47:20.977 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1561 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:47:20.977 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1561 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:47:20.977 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1561 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:47:20.977 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1561 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:47:20.977 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1561 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:47:20.977 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1561 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:47:25.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:47:25.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:47:25.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:47:25.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:47:25.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:47:25.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:25.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:25.992 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:47:25.992 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:25.993 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:47:25.993 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:47:25.997 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:47:25.997 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:47:25.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:47:25.998 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:25.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:47:25.999 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:47:25.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:47:25.999 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:47:25.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:26.001 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:47:26.001 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:47:26.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:47:26.001 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:26.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:47:26.001 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:47:26.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:47:26.001 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:47:26.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:26.004 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:47:26.004 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:47:26.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:47:26.004 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:26.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:47:26.004 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:47:26.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:47:26.005 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:47:26.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:26.008 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:47:26.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:47:26.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:47:26.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:47:26.008 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:47:26.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:47:26.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:47:26.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:47:26.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:26.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:47:26.009 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:47:26.009 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:47:26.009 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:26.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:26.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:26.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:26.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:26.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:26.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:26.013 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:47:26.491 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:47:26.536 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:47:26.537 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:47:26.537 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:47:26.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:47:26.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:47:26.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:47:26.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:47:26.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:47:26.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:47:26.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:47:26.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:47:26.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:47:26.963 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:47:27.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:27.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:27.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:27.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:27.435 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:47:27.908 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:47:28.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:28.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:28.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:28.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:28.380 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:47:28.852 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:47:29.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:29.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:29.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:29.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:29.323 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:47:29.797 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:47:30.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:30.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:30.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:30.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:30.269 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:47:30.741 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:47:31.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:31.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:31.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:31.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:31.212 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:47:31.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:31.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:31.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:31.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:31.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:31.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:47:31.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:47:31.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:47:31.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:47:31.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:47:31.692 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:47:32.172 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:47:32.652 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:47:33.131 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:47:33.612 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:47:34.093 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:47:34.573 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:47:35.053 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:47:35.532 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:47:36.011 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:47:36.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:47:36.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:47:36.241 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:47:36.242 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:47:36.242 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:47:36.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:47:36.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:47:36.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:47:36.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:36.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:36.246 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:47:36.246 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:36.246 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:47:36.246 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:47:36.247 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:47:36.247 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:47:36.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:47:36.247 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:36.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:47:36.248 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:47:36.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:47:36.248 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:47:36.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:36.249 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:47:36.249 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:47:36.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:47:36.249 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:36.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:47:36.249 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:47:36.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:47:36.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:47:36.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:36.250 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:47:36.250 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:47:36.250 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:47:36.250 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:36.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:47:36.250 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:47:36.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:47:36.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:47:36.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:36.252 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:47:36.253 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:47:36.253 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:47:36.253 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:36.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:36.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:47:36.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:47:36.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:47:36.254 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:47:36.254 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:47:36.254 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:47:41.263 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:47:41.263 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:47:41.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:47:41.263 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:47:41.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:47:41.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:41.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:41.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:47:41.276 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:41.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:47:41.276 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:47:41.278 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:47:41.278 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:47:41.278 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:47:41.278 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:41.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:47:41.279 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:47:41.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:47:41.279 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:47:41.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:41.280 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:47:41.280 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:47:41.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:47:41.280 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:41.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:47:41.280 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:47:41.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:47:41.280 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:47:41.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:41.281 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:47:41.281 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:47:41.281 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:47:41.281 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:47:41.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:47:41.281 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:47:41.281 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:47:41.281 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:47:41.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:41.283 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:47:41.283 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:47:41.283 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:47:41.284 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:47:41.288 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:47:41.766 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:47:41.808 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:47:41.810 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:47:41.812 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:47:41.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:47:41.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:47:41.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:47:41.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:47:41.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:47:41.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:47:41.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:47:41.838 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:47:41.838 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:47:42.239 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:47:42.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:42.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:42.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:42.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:42.710 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:47:43.183 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:47:43.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:43.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:43.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:43.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:43.655 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:47:44.127 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:47:44.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:44.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:44.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:44.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:44.601 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:47:45.072 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:47:45.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:45.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:45.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:45.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:45.544 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:47:46.015 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:47:46.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:46.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:47:46.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:47:46.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:47:46.489 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:47:46.961 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:47:47.433 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:47:47.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:47.904 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:47:48.378 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:47:48.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:48.850 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:47:49.322 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:47:49.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:49.793 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:47:50.266 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:47:50.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:50.739 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:47:51.211 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:47:51.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:51.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:51.684 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:47:52.156 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:47:52.628 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:47:53.103 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:47:53.575 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:47:54.049 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:47:54.521 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:47:54.993 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:47:55.469 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:47:55.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:47:55.941 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:47:56.414 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:47:56.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:56.886 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:47:57.359 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:47:57.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:57.832 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:47:58.304 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:47:58.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:58.776 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:47:59.247 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:47:59.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:47:59.721 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:48:00.193 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:48:00.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:48:00.665 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:48:01.136 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:48:01.609 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:48:02.082 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:48:02.553 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:48:02.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:48:02.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:48:02.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:48:02.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:48:02.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:48:02.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:48:02.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:48:02.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:48:02.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:48:02.697 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:48:02.697 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:48:02.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:48:02.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:48:02.698 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4623 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:02.698 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4623 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:02.698 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4623 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:02.698 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4623 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:02.698 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4623 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:02.698 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4623 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:02.698 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4623 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:07.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:48:07.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:48:07.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:48:07.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:48:07.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:48:07.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:48:07.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:48:07.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:48:07.711 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:48:07.711 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:48:07.711 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:48:07.715 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:48:07.716 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:48:07.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:48:07.716 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:48:07.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:48:07.717 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:48:07.718 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:48:07.718 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:48:07.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:48:07.719 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:48:07.719 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:48:07.720 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:48:07.720 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:48:07.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:48:07.720 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:48:07.720 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:48:07.720 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:48:07.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:48:07.722 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:48:07.722 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:48:07.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:48:07.723 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:48:07.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:48:07.723 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:48:07.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:48:07.723 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:48:07.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:07.726 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:48:07.726 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:48:07.726 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:48:07.727 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:07.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:07.731 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:48:08.209 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:48:08.255 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:48:08.258 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:48:08.260 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:48:08.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:48:08.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:48:08.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:48:08.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:48:08.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:08.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:48:08.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:48:08.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:48:08.290 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:48:08.301 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:48:08.304 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:48:08.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 01:48:08.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:48:08.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:48:08.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:08.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:08.681 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:48:08.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:48:08.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:48:08.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:48:08.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:48:09.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 01:48:09.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:09.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:48:09.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:48:09.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:48:09.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:48:09.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:48:09.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:48:09.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:48:09.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:48:09.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:48:09.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:48:09.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:48:09.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:48:09.131 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:48:09.131 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=303 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:09.132 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:09.132 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:09.132 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:09.132 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:09.132 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:09.132 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:14.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:48:14.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:48:14.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:48:14.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:48:14.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:48:14.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:48:14.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:48:14.141 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:48:14.141 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:48:14.142 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:48:14.142 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:48:14.145 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:48:14.146 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:48:14.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:48:14.146 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:48:14.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:48:14.146 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:48:14.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:48:14.147 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:48:14.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:48:14.149 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:48:14.150 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:48:14.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:48:14.150 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:48:14.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:48:14.151 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:48:14.151 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:48:14.151 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:48:14.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:48:14.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:48:14.153 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:48:14.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:48:14.153 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:48:14.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:48:14.153 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:48:14.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:48:14.153 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:48:14.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:48:14.156 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:48:14.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:48:14.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:48:14.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:48:14.156 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:48:14.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:48:14.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:48:14.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:14.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:48:14.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:48:14.156 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:48:14.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:14.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:48:14.157 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:48:14.157 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:48:14.157 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:14.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:14.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:14.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:14.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:14.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:14.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:14.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:14.162 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:48:14.640 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:48:14.682 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:48:14.684 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:48:14.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:48:14.687 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:48:14.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:48:14.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:48:14.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:48:14.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:14.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:48:14.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:48:14.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:48:14.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:48:14.733 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:48:14.737 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:48:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 01:48:14.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:48:14.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:48:14.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:14.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:15.112 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:48:15.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:48:15.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:48:15.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:48:15.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:48:15.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 01:48:15.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:15.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:48:15.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:48:15.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:48:15.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:48:15.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:48:15.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:48:15.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:48:15.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:48:15.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:48:15.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:48:15.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:48:15.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:48:15.561 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:48:15.562 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=303 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:15.562 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:15.562 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:15.562 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:15.562 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:15.562 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:15.562 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:48:20.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:48:20.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:48:20.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:48:20.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:48:20.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:48:20.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:48:20.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:48:20.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:48:20.575 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:48:20.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:48:20.576 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:48:20.582 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:48:20.582 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:48:20.582 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:48:20.583 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:48:20.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:48:20.583 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:48:20.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:48:20.584 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:48:20.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:48:20.587 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:48:20.587 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:48:20.587 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:48:20.587 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:48:20.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:48:20.588 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:48:20.588 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:48:20.588 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:48:20.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:48:20.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:48:20.591 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:48:20.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:48:20.591 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:48:20.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:48:20.591 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:48:20.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:48:20.591 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:48:20.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:48:20.595 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:48:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:48:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:48:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:48:20.595 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:48:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:48:20.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:48:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:48:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:48:20.595 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:48:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:48:20.596 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:48:20.596 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:48:20.596 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:20.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:20.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:20.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:20.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:20.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:48:20.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:20.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:20.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:20.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:20.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:20.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:48:20.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:20.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:48:20.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:48:20.600 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:48:21.078 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:48:21.121 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:48:21.123 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:48:21.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:48:21.126 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:48:21.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:48:21.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:48:21.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:48:21.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:21.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:48:21.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:48:21.152 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:48:21.152 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:48:21.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:48:21.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:48:21.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:48:21.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:21.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:21.549 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:48:21.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:48:21.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:48:21.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:48:21.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:48:22.017 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:48:22.488 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:48:22.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:48:22.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:48:22.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:48:22.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:48:22.961 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:48:23.434 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:48:23.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:48:23.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:48:23.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:48:23.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:48:23.907 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:48:24.380 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:48:24.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:48:24.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:48:24.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:48:24.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:48:24.852 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:48:25.325 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:48:25.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:48:25.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:48:25.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:48:25.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:48:25.796 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:48:26.269 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:48:26.742 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:48:27.214 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:48:27.685 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:48:28.158 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:48:28.631 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:48:29.103 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:48:29.574 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:48:30.047 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:48:30.520 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:48:30.992 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:48:31.464 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:48:31.937 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:48:32.410 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:48:32.882 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:48:33.355 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:48:33.828 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:48:34.300 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:48:34.774 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:48:35.247 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:48:35.719 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:48:36.190 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:48:36.663 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:48:36.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:48:36.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:36.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:48:36.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:48:36.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:48:36.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:48:36.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:48:36.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:36.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:48:36.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:48:36.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:48:36.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:48:37.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:48:37.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:48:37.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:48:37.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:37.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:37.136 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:48:37.608 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:48:38.082 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:48:38.554 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:48:39.027 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:48:39.500 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:48:39.973 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:48:40.445 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:48:40.919 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:48:41.391 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:48:41.863 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:48:42.334 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:48:42.808 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 01:48:43.280 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 01:48:43.753 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 01:48:44.226 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 01:48:44.699 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 01:48:45.171 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 01:48:45.645 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 01:48:46.117 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 01:48:46.590 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 01:48:47.063 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 01:48:47.536 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 01:48:48.008 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 01:48:48.481 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 01:48:48.954 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 01:48:49.426 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 01:48:49.900 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 01:48:50.373 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 01:48:50.845 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 01:48:51.319 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 01:48:51.791 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 01:48:52.263 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 01:48:52.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:48:52.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:52.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:48:52.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:48:52.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:48:52.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:48:52.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:48:52.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:52.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:48:52.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:48:52.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:48:52.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:48:52.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:48:52.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:48:52.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:48:52.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:52.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:48:52.734 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 01:48:53.208 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 01:48:53.680 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 01:48:54.153 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 01:48:54.626 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 01:48:55.099 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 01:48:55.572 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 01:48:56.045 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 01:48:56.517 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 01:48:56.990 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 01:48:57.463 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 01:48:57.936 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 01:48:58.409 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 01:48:58.882 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 01:48:59.355 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 01:48:59.827 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 01:49:00.298 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 01:49:00.771 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 01:49:01.244 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 01:49:01.717 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 01:49:02.190 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 01:49:02.663 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 01:49:03.135 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 01:49:03.608 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 01:49:04.081 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 01:49:04.554 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 01:49:05.027 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 01:49:05.500 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 01:49:05.972 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 01:49:06.443 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 01:49:06.916 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 01:49:07.389 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 01:49:07.862 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 01:49:07.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:49:07.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:49:07.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:49:07.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:49:07.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:49:07.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:49:07.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:49:07.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:49:07.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:49:07.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:49:07.954 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:49:07.954 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:49:08.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:08.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:49:08.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:49:08.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:49:08.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:49:08.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:49:08.334 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 01:49:08.807 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-03 01:49:09.280 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-03 01:49:09.753 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-03 01:49:10.226 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-03 01:49:10.698 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-03 01:49:11.171 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-03 01:49:11.644 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-03 01:49:12.117 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-03 01:49:12.590 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-03 01:49:13.063 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-03 01:49:13.535 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-03 01:49:14.009 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-03 01:49:14.482 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-03 01:49:14.955 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-03 01:49:15.428 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-03 01:49:15.900 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-03 01:49:16.374 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-03 01:49:16.846 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-03 01:49:17.319 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-03 01:49:17.792 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-03 01:49:18.264 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-03 01:49:18.737 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-03 01:49:19.208 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-03 01:49:19.681 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-03 01:49:20.154 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-03 01:49:20.626 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-03 01:49:21.097 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-03 01:49:21.570 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-03 01:49:22.043 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-03 01:49:22.516 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-03 01:49:22.989 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-03 01:49:23.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:49:23.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:49:23.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:49:23.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:49:23.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:23.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:23.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:23.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:23.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:49:23.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:49:23.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:49:23.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:49:23.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:49:23.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:49:23.433 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:49:23.433 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:23.433 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:23.433 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:23.433 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13563 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:23.434 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:23.434 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:23.434 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:23.434 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:23.434 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:23.434 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:23.434 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:28.435 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:49:28.435 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:49:28.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:49:28.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:49:28.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:49:28.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:49:28.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:49:28.444 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:49:28.444 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:49:28.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:49:28.445 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:49:28.447 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:49:28.448 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:49:28.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:49:28.448 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:49:28.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:49:28.449 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:49:28.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:49:28.449 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:49:28.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:28.450 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:49:28.451 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:49:28.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:49:28.451 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:49:28.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:49:28.451 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:49:28.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:49:28.451 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:49:28.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:28.453 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:49:28.453 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:49:28.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:49:28.453 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:49:28.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:49:28.453 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:49:28.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:49:28.453 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:49:28.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:49:28.456 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:49:28.456 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:49:28.456 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:28.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:28.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:49:28.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:28.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:28.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:28.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:49:28.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:49:28.457 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:49:28.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:28.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:28.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:33.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:49:33.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:49:33.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:49:33.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:49:33.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:49:33.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:49:33.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:49:33.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:49:33.473 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:49:33.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:49:33.474 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:49:33.477 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:49:33.478 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:49:33.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:49:33.478 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:49:33.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:49:33.479 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:49:33.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:49:33.479 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:49:33.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:33.482 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:49:33.482 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:49:33.483 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:49:33.483 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:49:33.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:49:33.484 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:49:33.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:49:33.484 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:49:33.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:33.486 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:49:33.486 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:49:33.486 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:49:33.486 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:49:33.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:49:33.487 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:49:33.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:49:33.487 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:49:33.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:33.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:33.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:33.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:33.493 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:49:33.493 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:49:33.493 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:49:33.493 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:49:33.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:33.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:33.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:33.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:49:33.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:33.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:33.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:33.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:33.498 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:49:33.975 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:49:34.027 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:49:34.029 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:49:34.031 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:49:34.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:49:34.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:49:34.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:49:34.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:49:34.050 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:49:34.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:49:34.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:49:34.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:49:34.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:49:34.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:49:34.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:49:34.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:49:34.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:49:34.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:49:34.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:49:34.448 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:49:34.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:34.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:34.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:34.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:34.919 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:49:35.390 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:49:35.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:35.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:35.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:35.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:35.863 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:49:36.336 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:49:36.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:36.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:36.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:36.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:36.808 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:49:37.279 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:49:37.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:37.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:37.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:37.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:37.750 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:49:38.223 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:49:38.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:38.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:38.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:38.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:38.696 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:49:39.168 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:49:39.641 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:49:40.114 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:49:40.587 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:49:41.060 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:49:41.528 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:49:42.002 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:49:42.474 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:49:42.946 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:49:43.417 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:49:43.888 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:49:44.362 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:49:44.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:49:44.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:49:44.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:49:44.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:49:44.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:44.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:44.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:44.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:44.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:49:44.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:49:44.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:49:44.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:49:44.477 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:49:44.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:49:44.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:49:44.477 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2372 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:44.477 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2372 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:44.477 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2372 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:44.478 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2372 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:44.478 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2372 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:44.478 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2372 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:44.478 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2372 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:49:49.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:49:49.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:49:49.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:49:49.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:49:49.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:49:49.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:49:49.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:49:49.489 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:49:49.489 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:49:49.489 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:49:49.489 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:49:49.494 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:49:49.495 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:49:49.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:49:49.495 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:49:49.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:49:49.496 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:49:49.496 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:49:49.496 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:49:49.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:49.498 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:49:49.498 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:49:49.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:49:49.498 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:49:49.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:49:49.498 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:49:49.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:49:49.499 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:49:49.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:49.501 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:49:49.501 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:49:49.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:49:49.501 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:49:49.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:49:49.501 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:49:49.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:49:49.501 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:49:49.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:49.504 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:49:49.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:49:49.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:49:49.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:49:49.504 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:49:49.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:49:49.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:49:49.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:49.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:49:49.505 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:49:49.505 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:49:49.505 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:49.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:49.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:49.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:49.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:49:49.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:49.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:49.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:49.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:49.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:49.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:49:49.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:49.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:49:49.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:49:49.510 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:49:49.987 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:49:50.030 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:49:50.033 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:49:50.035 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:49:50.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:49:50.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:49:50.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:49:50.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:49:50.076 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:49:50.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:49:50.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:49:50.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:49:50.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:49:50.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:49:50.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:49:50.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:49:50.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:49:50.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:49:50.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:49:50.457 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:49:50.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:50.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:50.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:50.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:50.931 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:49:51.403 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:49:51.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:51.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:51.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:51.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:51.876 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:49:52.349 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:49:52.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:52.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:52.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:52.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:52.821 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:49:53.295 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:49:53.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:53.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:53.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:53.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:53.768 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:49:54.240 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:49:54.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:49:54.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:49:54.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:49:54.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:49:54.711 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:49:55.184 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:49:55.657 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:49:56.129 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:49:56.603 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:49:57.076 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:49:57.548 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:49:58.019 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:49:58.492 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:49:58.965 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:49:59.437 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:49:59.908 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:50:00.382 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:50:00.854 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:50:00.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:50:00.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:50:00.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:50:00.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:50:00.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:00.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:00.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:00.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:00.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:50:00.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:50:00.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:50:00.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:50:00.956 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:50:00.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:50:00.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:50:00.956 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2472 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:50:00.956 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2472 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:50:00.956 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2472 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:50:00.956 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2472 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:50:00.956 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2472 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:50:00.956 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2472 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:50:00.956 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2472 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:50:05.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:50:05.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:50:05.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:50:05.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:50:05.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:50:05.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:50:05.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:50:05.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:50:05.965 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:50:05.966 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:50:05.966 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:50:05.966 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:50:05.967 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:50:05.967 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:50:05.967 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:50:05.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:50:05.967 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:50:05.967 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:50:05.967 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:50:05.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:05.968 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:50:05.968 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:50:05.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:50:05.968 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:50:05.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:50:05.968 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:50:05.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:50:05.968 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:50:05.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:05.969 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:50:05.969 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:50:05.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:50:05.969 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:50:05.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:50:05.969 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:50:05.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:50:05.969 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:50:05.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:05.971 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:50:05.971 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:50:05.971 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:50:05.971 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:05.976 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:50:06.453 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:50:06.484 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:50:06.485 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:50:06.486 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:50:06.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:50:06.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:50:06.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:50:06.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:50:06.509 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:50:06.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:50:06.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:50:06.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:50:06.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:50:06.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:50:06.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:50:06.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:50:06.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:50:06.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:50:06.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:50:06.925 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:50:06.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:06.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:06.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:06.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:07.396 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:50:07.410 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 01:50:07.870 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:50:07.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:07.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:07.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:07.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:08.342 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:50:08.815 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:50:08.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:08.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:08.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:08.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:09.288 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:50:09.761 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:50:09.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:09.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:09.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:09.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:10.233 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:50:10.704 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:50:10.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:10.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:10.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:10.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:11.175 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:50:11.648 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:50:12.121 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:50:12.593 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:50:13.064 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:50:13.537 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:50:14.010 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:50:14.483 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:50:14.954 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:50:15.427 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:50:15.900 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:50:16.372 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:50:16.843 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:50:17.316 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:50:17.789 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:50:18.261 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:50:18.732 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:50:19.205 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:50:19.678 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:50:20.151 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:50:20.624 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:50:21.097 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:50:21.569 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:50:22.043 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:50:22.515 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:50:22.988 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:50:23.461 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:50:23.934 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:50:24.405 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:50:24.878 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:50:25.351 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:50:25.823 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:50:26.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:50:26.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:50:26.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:50:26.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:50:26.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:26.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:26.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:26.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:26.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:50:26.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:50:26.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:50:26.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:50:26.155 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:50:26.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:50:26.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:50:26.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4358 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:50:26.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4358 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:50:26.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4358 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:50:26.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4358 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:50:26.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4358 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:50:26.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4358 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:50:26.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4358 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:50:31.159 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:50:31.159 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:50:31.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:50:31.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:50:31.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:50:31.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:50:31.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:50:31.166 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:50:31.166 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:50:31.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:50:31.167 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:50:31.172 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:50:31.172 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:50:31.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:50:31.173 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:50:31.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:50:31.174 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:50:31.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:50:31.174 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:50:31.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:31.176 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:50:31.177 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:50:31.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:50:31.177 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:50:31.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:50:31.178 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:50:31.178 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:50:31.178 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:50:31.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:31.180 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:50:31.180 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:50:31.180 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:50:31.180 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:50:31.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:50:31.181 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:50:31.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:50:31.181 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:50:31.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:31.184 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:50:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:50:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:50:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:50:31.184 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:50:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:50:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:50:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:50:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:50:31.184 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:50:31.185 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:50:31.185 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:50:31.185 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:31.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:31.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:31.190 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:50:31.667 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:50:31.715 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:50:31.717 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:50:31.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:50:31.720 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:50:31.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:50:31.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:50:31.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:50:31.758 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:50:31.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:50:31.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:50:31.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:50:31.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:50:31.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:50:31.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:50:31.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:50:31.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:50:31.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:50:31.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:50:32.139 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:50:32.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:32.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:32.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:32.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:32.612 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:50:33.085 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:50:33.111 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 01:50:33.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:33.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:33.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:33.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:33.558 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:50:34.031 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:50:34.071 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 01:50:34.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:34.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:34.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:34.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:34.504 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:50:34.976 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:50:35.037 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 01:50:35.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:35.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:35.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:35.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:35.447 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:50:35.920 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:50:35.997 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 01:50:36.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:36.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:36.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:36.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:36.393 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:50:36.865 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:50:36.963 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 01:50:37.336 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:50:37.810 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:50:37.923 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 01:50:38.283 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:50:38.755 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:50:38.889 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 01:50:39.228 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:50:39.701 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:50:39.855 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 01:50:40.174 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:50:40.647 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:50:40.815 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 01:50:41.120 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:50:41.592 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:50:41.782 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 01:50:42.066 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:50:42.538 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:50:42.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:50:42.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:50:42.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:50:42.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:50:42.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:42.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:42.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:42.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:42.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:50:42.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:50:42.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:50:42.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:50:42.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:50:42.643 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:50:42.643 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:50:47.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:50:47.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:50:47.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:50:47.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:50:47.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:50:47.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:50:47.661 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:50:47.663 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:50:47.663 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:50:47.663 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:50:47.663 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:50:47.669 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:50:47.669 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:50:47.670 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:50:47.670 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:50:47.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:50:47.671 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:50:47.671 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:50:47.671 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:50:47.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:47.674 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:50:47.674 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:50:47.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:50:47.674 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:50:47.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:50:47.675 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:50:47.675 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:50:47.675 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:50:47.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:47.678 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:50:47.678 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:50:47.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:50:47.678 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:50:47.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:50:47.678 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:50:47.679 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:50:47.679 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:50:47.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:47.682 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:50:47.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:50:47.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:50:47.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:50:47.682 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:50:47.683 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:50:47.683 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:50:47.683 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:47.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:50:47.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:50:47.688 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:50:48.166 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:50:48.210 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:50:48.212 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:50:48.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:50:48.214 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:50:48.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:50:48.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:50:48.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:50:48.237 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:50:48.238 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:50:48.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:50:48.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:50:48.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:50:48.240 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:50:48.240 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:50:48.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:50:48.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:50:48.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:50:48.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:50:48.267 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:50:48.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:50:48.638 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:50:48.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:48.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:48.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:48.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:49.110 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:50:49.124 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 01:50:49.581 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:50:49.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:49.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:49.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:49.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:50.054 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:50:50.527 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:50:50.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:50.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:50.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:50.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:50.999 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:50:51.470 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:50:51.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:51.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:51.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:51.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:51.941 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:50:52.414 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:50:52.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:50:52.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:50:52.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:50:52.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:50:52.887 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:50:53.359 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:50:53.830 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:50:54.303 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:50:54.776 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:50:55.248 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:50:55.721 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:50:56.194 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:50:56.667 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:50:57.140 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:50:57.613 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:50:58.085 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:50:58.559 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:50:58.756 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:50:59.032 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:50:59.504 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:50:59.975 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:51:00.446 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:51:00.919 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:51:01.392 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:51:01.864 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:51:02.338 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:51:02.810 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:51:03.283 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:51:03.753 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:51:04.224 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:51:04.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:04.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:04.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:04.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:04.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:04.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:04.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:04.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:04.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:04.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:04.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:51:04.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:51:04.542 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:51:04.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:04.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:09.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:51:09.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:51:09.548 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:09.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:09.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:09.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:09.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:09.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:51:09.552 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:09.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:51:09.552 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:51:09.552 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:51:09.553 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:51:09.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:51:09.553 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:09.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:09.553 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:51:09.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:51:09.553 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:51:09.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:09.554 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:51:09.554 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:51:09.554 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:51:09.554 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:09.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:09.554 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:51:09.554 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:51:09.554 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:51:09.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:09.555 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:51:09.555 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:51:09.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:51:09.555 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:09.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:09.555 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:51:09.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:51:09.555 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:51:09.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:09.557 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:51:09.557 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:51:09.557 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:51:09.558 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:09.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:09.562 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:51:10.040 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:51:10.082 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:51:10.083 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:51:10.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:10.084 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:51:10.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:10.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:10.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:51:10.109 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:51:10.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:10.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:10.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:10.112 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:51:10.112 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:51:10.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:10.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:10.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:10.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:10.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:10.512 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:51:10.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:10.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:10.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:10.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:10.986 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:51:10.997 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 01:51:11.458 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:51:11.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:11.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:11.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:11.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:11.931 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:51:12.405 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:51:12.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:12.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:12.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:12.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:12.877 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:51:13.349 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:51:13.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:13.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:13.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:13.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:13.820 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:51:14.294 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:51:14.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:14.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:14.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:14.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:14.766 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:51:15.239 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:51:15.709 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:51:16.183 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:51:16.656 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:51:17.129 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:51:17.602 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:51:18.074 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:51:18.545 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:51:19.016 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:51:19.487 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:51:19.957 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:51:20.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:20.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:20.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:20.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:20.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:20.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:20.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:20.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:20.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:20.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:20.166 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:51:20.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:51:20.166 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:51:20.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:20.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:25.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:51:25.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:51:25.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:25.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:25.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:25.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:25.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:25.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:51:25.174 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:25.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:51:25.174 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:51:25.175 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:51:25.175 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:51:25.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:51:25.175 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:25.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:25.176 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:51:25.176 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:51:25.176 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:51:25.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:25.177 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:51:25.177 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:51:25.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:51:25.177 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:25.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:25.177 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:51:25.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:51:25.177 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:51:25.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:25.178 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:51:25.178 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:51:25.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:51:25.178 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:25.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:25.178 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:51:25.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:51:25.178 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:51:25.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:51:25.180 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:51:25.180 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:51:25.180 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:25.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:25.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:25.185 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:51:25.663 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:51:25.707 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:51:25.709 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:51:25.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:25.712 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:51:25.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:25.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:25.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:51:25.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:25.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:25.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:25.740 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:51:25.740 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:51:25.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:25.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:25.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:25.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:25.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:26.135 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:51:26.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:26.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:26.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:26.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:26.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:26.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:26.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:51:26.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:26.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:26.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:26.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:51:26.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:51:26.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:26.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:26.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:26.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:26.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:26.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:26.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:26.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:26.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:26.606 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:51:26.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:26.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:26.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:26.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:26.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:26.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:26.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:51:26.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:26.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:26.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:26.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:51:26.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:51:26.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:26.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:26.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:26.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:26.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:27.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:27.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:27.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:27.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:27.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:27.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:27.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:51:27.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:27.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:27.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:27.061 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:51:27.061 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:51:27.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:27.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:27.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:27.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:27.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:27.079 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:51:27.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:27.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:27.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:27.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:27.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:27.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:27.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:27.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:27.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:27.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:27.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:27.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:27.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:27.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:27.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:27.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:27.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:51:27.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:51:27.487 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:51:27.487 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=499 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:51:27.487 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=499 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:51:27.487 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=499 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:51:27.488 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=499 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:51:27.488 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=499 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:51:27.488 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=499 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:51:27.488 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=499 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:51:32.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:51:32.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:51:32.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:32.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:32.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:32.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:32.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:32.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:51:32.495 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:32.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:51:32.495 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:51:32.500 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:51:32.500 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:51:32.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:51:32.500 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:32.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:32.500 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:51:32.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:51:32.501 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:51:32.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:32.504 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:51:32.504 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:51:32.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:51:32.505 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:32.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:32.505 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:51:32.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:51:32.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:51:32.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:32.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:51:32.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:51:32.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:51:32.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:32.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:32.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:51:32.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:51:32.508 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:51:32.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:32.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:51:32.513 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:51:32.513 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:51:32.513 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:32.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:32.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:32.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:32.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:32.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:32.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:32.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:32.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:32.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:32.517 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:51:32.995 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:51:33.041 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:51:33.044 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:51:33.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:33.046 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:51:33.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:33.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:33.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:51:33.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:33.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:33.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:33.073 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:51:33.073 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:51:33.087 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:51:33.091 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 01:51:33.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:33.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:33.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:33.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:33.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:33.467 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:51:33.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:33.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:33.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:33.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:33.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:33.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:33.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:33.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:33.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:33.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:33.492 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:51:33.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:51:33.492 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:51:33.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:33.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:33.492 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:51:33.492 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:51:33.492 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:51:33.492 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:51:33.492 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:51:33.492 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:51:33.492 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:51:38.497 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:51:38.497 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:51:38.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:38.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:38.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:38.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:38.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:38.503 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:51:38.503 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:38.503 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:51:38.504 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:51:38.507 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:51:38.507 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:51:38.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:51:38.507 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:38.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:38.507 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:51:38.508 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:51:38.508 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:51:38.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:38.510 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:51:38.510 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:51:38.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:51:38.510 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:38.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:38.511 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:51:38.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:51:38.511 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:51:38.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:38.513 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:51:38.513 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:51:38.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:51:38.513 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:38.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:38.513 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:51:38.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:51:38.513 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:51:38.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:38.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:51:38.517 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:51:38.517 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:51:38.517 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:38.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:38.521 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:51:38.999 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:51:39.041 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:51:39.061 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:51:39.064 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:51:39.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:39.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:39.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:39.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:51:39.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:39.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:39.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:39.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:51:39.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:51:39.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:39.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:39.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:39.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:39.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:39.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:39.469 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:51:39.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:39.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:39.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:39.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:39.942 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:51:40.415 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:51:40.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:40.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:40.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:40.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:40.888 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:51:41.361 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:51:41.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:41.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:41.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:41.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:41.833 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:51:42.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:42.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:42.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:42.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:42.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:42.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:42.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:51:42.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:42.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:42.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:42.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:51:42.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:51:42.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:42.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:42.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:42.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:42.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:42.304 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:51:42.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:42.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:42.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:42.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:42.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:42.775 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:51:43.248 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:51:43.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:43.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:43.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:43.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:43.721 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:51:44.193 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:51:44.664 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:51:45.137 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:51:45.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:45.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:45.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:45.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:45.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:45.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:45.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:51:45.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:45.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:45.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:45.496 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:51:45.496 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:51:45.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:45.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:45.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:45.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:45.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:45.610 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:51:45.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:46.082 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:51:46.553 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:51:47.023 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:51:47.494 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:51:47.965 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:51:48.436 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:51:48.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:48.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:48.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:48.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:48.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:48.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:48.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:51:48.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:48.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:48.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:48.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:51:48.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:51:48.909 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:51:48.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:48.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:48.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:48.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:48.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:49.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:49.381 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:51:49.853 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:51:50.325 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:51:50.798 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:51:51.270 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:51:51.742 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:51:52.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:52.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:52.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:52.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:52.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:52.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:52.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:52.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:52.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:52.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:52.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:51:52.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:51:52.082 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:51:52.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:52.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:57.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:51:57.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:51:57.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:57.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:57.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:57.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:57.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:51:57.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:51:57.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:57.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:51:57.096 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:51:57.099 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:51:57.099 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:51:57.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:51:57.099 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:57.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:51:57.099 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:51:57.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:51:57.100 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:51:57.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:57.102 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:51:57.103 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:51:57.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:51:57.103 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:57.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:51:57.103 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:51:57.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:51:57.103 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:51:57.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:57.106 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:51:57.106 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:51:57.106 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:51:57.106 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:51:57.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:51:57.106 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:51:57.106 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:51:57.106 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:51:57.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:57.109 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:51:57.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:51:57.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:51:57.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:51:57.109 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:51:57.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:51:57.110 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:51:57.110 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:51:57.110 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:57.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:57.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:51:57.115 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:51:57.594 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:51:57.637 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:51:57.639 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:51:57.640 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:51:57.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:51:57.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:51:57.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:51:57.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:51:57.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:51:57.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:51:57.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:51:57.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:51:57.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:51:58.066 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:51:58.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:58.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:58.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:58.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:58.537 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:51:59.010 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:51:59.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:51:59.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:51:59.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:51:59.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:51:59.483 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:51:59.955 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:52:00.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:00.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:00.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:00.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:00.426 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:52:00.899 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:52:01.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:01.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:01.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:01.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:01.372 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:52:01.843 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:52:02.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:02.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:02.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:02.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:02.315 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:52:02.788 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:52:03.260 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:52:03.733 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:52:04.203 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:52:04.676 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:52:05.149 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:52:05.621 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:52:06.092 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:52:06.565 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:52:07.038 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:52:07.510 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:52:07.984 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:52:08.456 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:52:08.928 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:52:09.399 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:52:09.873 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:52:10.345 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:52:10.817 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:52:11.290 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:52:11.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:52:11.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:52:11.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:11.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:11.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:11.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:11.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:52:11.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:52:11.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:52:11.583 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:52:11.583 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:52:11.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:52:11.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:52:11.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:52:11.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:52:11.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:52:11.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:52:11.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:52:11.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:52:11.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:52:16.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:52:16.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:52:16.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:52:16.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:52:16.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:52:16.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:52:16.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:52:16.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:52:16.596 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:52:16.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:52:16.596 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:52:16.601 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:52:16.601 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:52:16.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:52:16.602 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:52:16.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:52:16.602 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:52:16.603 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:52:16.603 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:52:16.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:16.604 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:52:16.605 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:52:16.605 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:52:16.605 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:52:16.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:52:16.605 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:52:16.605 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:52:16.605 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:52:16.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:16.608 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:52:16.608 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:52:16.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:52:16.608 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:52:16.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:52:16.608 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:52:16.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:52:16.608 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:52:16.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:16.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:52:16.612 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:52:16.612 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:52:16.612 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:16.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:16.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:16.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:16.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:16.616 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:52:17.095 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:52:17.139 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:52:17.142 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:52:17.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:52:17.144 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:52:17.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:52:17.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:52:17.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:52:17.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:52:17.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:52:17.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:52:17.176 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:52:17.176 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:52:17.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:52:17.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:52:17.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:52:17.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:52:17.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:52:17.567 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:52:17.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:17.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:17.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:17.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:18.038 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:52:18.512 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:52:18.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:18.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:18.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:18.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:18.984 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:52:19.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:52:19.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:52:19.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:52:19.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:52:19.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:52:19.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:52:19.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:52:19.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:52:19.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:52:19.456 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:52:19.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:19.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:19.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:19.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:19.927 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:52:20.400 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:52:20.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:20.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:20.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:20.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:20.872 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:52:21.344 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:52:21.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:21.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:21.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:21.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:21.815 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:52:22.286 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:52:22.759 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:52:23.232 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:52:23.704 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:52:24.177 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:52:24.650 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:52:25.122 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:52:25.593 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:52:26.067 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:52:26.539 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:52:27.011 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:52:27.485 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:52:27.957 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:52:28.429 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:52:28.900 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:52:29.373 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:52:29.846 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:52:30.318 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:52:30.791 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:52:31.264 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:52:31.736 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:52:32.209 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:52:32.682 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:52:33.153 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:52:33.625 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:52:33.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:52:33.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:52:33.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:52:33.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:33.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:33.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:33.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:33.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:52:33.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:52:33.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:52:33.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:52:33.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:52:33.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:52:33.928 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:52:38.932 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:52:38.932 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:52:38.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:52:38.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:52:38.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:52:38.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:52:38.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:52:38.939 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:52:38.939 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:52:38.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:52:38.940 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:52:38.943 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:52:38.944 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:52:38.944 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:52:38.944 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:52:38.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:52:38.945 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:52:38.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:52:38.945 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:52:38.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:38.948 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:52:38.948 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:52:38.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:52:38.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:52:38.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:52:38.949 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:52:38.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:52:38.949 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:52:38.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:38.954 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:52:38.954 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:52:38.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:52:38.955 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:52:38.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:52:38.955 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:52:38.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:52:38.955 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:52:38.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:38.962 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:52:38.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:52:38.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:52:38.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:52:38.962 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:52:38.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:52:38.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:52:38.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:38.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:52:38.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:52:38.963 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:52:38.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:38.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:38.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:38.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:38.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:38.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:38.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:38.964 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:52:38.964 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:52:38.964 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:52:38.964 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:52:38.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:38.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:38.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:38.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:52:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:38.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:38.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:38.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:38.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:38.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:52:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:38.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:52:38.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:38.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:52:38.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:38.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:52:38.969 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:52:39.448 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:52:39.503 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:52:39.506 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:52:39.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:52:39.508 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:52:39.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:52:39.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:52:39.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:52:39.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:52:39.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:52:39.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:52:39.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:52:39.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:52:39.920 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:52:39.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:39.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:39.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:39.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:40.391 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:52:40.864 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:52:40.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:40.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:40.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:40.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:41.337 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:52:41.809 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:52:41.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:41.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:41.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:41.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:42.280 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:52:42.753 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:52:42.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:42.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:42.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:42.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:43.226 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:52:43.698 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:52:43.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:52:43.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:52:43.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:52:43.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:52:44.169 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:52:44.642 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:52:45.115 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:52:45.587 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:52:46.060 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:52:46.533 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:52:47.005 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:52:47.476 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:52:47.949 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:52:48.422 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:52:48.894 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:52:49.367 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:52:49.840 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:52:50.312 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:52:50.783 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:52:51.256 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:52:51.728 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:52:52.200 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:52:52.674 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:52:53.146 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:52:53.618 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:52:54.089 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:52:54.563 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:52:55.035 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:52:55.508 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:52:55.981 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:52:56.454 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:52:56.925 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:52:57.397 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:52:57.870 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:52:58.342 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:52:58.815 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:52:59.285 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:52:59.759 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:53:00.231 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:53:00.703 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:53:00.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:53:00.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:53:00.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:53:00.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:53:00.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:53:00.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:53:00.993 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:53:00.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:53:00.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:53:00.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:53:00.993 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:53:00.993 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:53:00.993 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:53:00.993 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4756 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:53:00.993 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4756 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:53:00.993 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4756 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:53:00.993 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:53:00.993 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:53:00.993 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:53:00.993 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:53:00.993 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:53:00.993 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:53:00.993 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:53:00.993 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:53:05.999 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:53:05.999 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:53:05.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:53:06.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:53:06.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:53:06.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:53:06.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:53:06.011 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:53:06.011 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:53:06.012 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:53:06.012 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:53:06.013 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:53:06.014 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:53:06.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:53:06.014 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:53:06.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:53:06.015 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:53:06.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:53:06.015 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:53:06.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:53:06.016 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:53:06.016 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:53:06.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:53:06.016 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:53:06.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:53:06.016 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:53:06.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:53:06.016 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:53:06.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:53:06.018 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:53:06.018 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:53:06.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:53:06.018 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:53:06.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:53:06.018 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:53:06.018 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:53:06.018 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:53:06.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:53:06.021 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:53:06.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:53:06.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:53:06.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:53:06.021 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:53:06.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:53:06.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:53:06.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:06.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:53:06.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:53:06.022 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:53:06.022 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:53:06.022 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:06.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:06.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:06.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:06.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:06.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:06.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:06.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:06.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:06.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:06.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:06.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:06.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:06.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:06.027 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:53:06.504 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:53:06.549 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:53:06.551 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:53:06.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:53:06.554 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:53:06.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:53:06.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:53:06.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:53:06.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:53:06.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:53:06.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:53:06.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:53:06.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:53:06.977 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:53:07.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:53:07.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:53:07.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:53:07.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:53:07.447 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:53:07.921 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:53:08.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:53:08.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:53:08.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:53:08.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:53:08.393 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:53:08.865 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:53:09.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:53:09.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:53:09.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:53:09.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:53:09.336 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:53:09.810 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:53:10.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:53:10.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:53:10.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:53:10.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:53:10.282 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:53:10.754 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:53:11.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:53:11.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:53:11.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:53:11.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:53:11.225 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:53:11.698 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:53:12.170 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:53:12.642 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:53:13.113 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:53:13.584 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:53:14.055 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:53:14.528 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:53:15.001 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:53:15.473 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:53:15.944 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:53:16.417 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:53:16.890 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:53:17.362 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:53:17.833 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:53:18.304 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:53:18.777 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:53:19.249 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:53:19.721 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:53:20.194 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:53:20.667 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:53:21.139 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:53:21.610 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:53:22.083 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:53:22.556 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:53:23.028 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:53:23.499 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:53:23.971 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:53:24.444 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:53:24.916 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:53:25.387 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:53:25.861 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:53:26.333 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:53:26.805 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:53:27.276 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:53:27.750 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:53:28.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:53:28.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:53:28.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:53:28.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:53:28.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:53:28.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:53:28.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:53:28.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:53:28.040 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:53:28.040 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:53:28.040 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:53:28.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:53:28.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:53:33.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:53:33.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:53:33.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:53:33.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:53:33.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:53:33.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:53:33.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:53:33.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:53:33.055 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:53:33.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:53:33.055 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:53:33.057 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:53:33.058 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:53:33.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:53:33.058 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:53:33.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:53:33.058 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:53:33.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:53:33.059 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:53:33.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:53:33.060 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:53:33.060 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:53:33.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:53:33.060 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:53:33.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:53:33.060 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:53:33.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:53:33.060 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:53:33.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:53:33.062 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:53:33.062 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:53:33.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:53:33.062 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:53:33.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:53:33.062 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:53:33.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:53:33.062 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:53:33.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:53:33.064 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:53:33.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:53:33.065 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:53:33.065 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:53:33.065 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:33.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:33.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:33.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:33.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:53:33.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:33.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:33.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:33.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:33.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:53:33.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:53:33.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:53:33.070 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:53:33.547 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:53:33.589 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:53:33.591 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:53:33.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:53:33.593 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:53:33.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:53:33.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:53:33.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:53:33.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:53:33.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:53:33.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:53:33.596 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:53:33.596 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:53:34.019 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:53:34.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:53:34.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:53:34.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:53:34.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:53:34.490 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:53:34.961 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:53:35.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:53:35.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:53:35.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:53:35.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:53:35.435 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:53:35.907 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:53:36.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:53:36.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:53:36.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:53:36.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:53:36.379 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:53:36.850 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:53:37.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:53:37.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:53:37.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:53:37.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:53:37.324 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:53:37.796 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:53:38.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:53:38.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:53:38.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:53:38.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:53:38.268 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:53:38.741 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:53:39.214 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:53:39.686 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:53:40.157 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:53:40.631 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:53:41.103 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:53:41.575 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:53:42.046 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:53:42.519 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:53:42.992 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:53:43.464 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:53:43.935 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:53:44.408 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:53:44.881 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:53:45.353 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:53:45.824 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:53:46.297 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:53:46.769 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:53:47.241 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:53:47.712 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:53:48.186 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:53:48.658 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:53:49.130 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:53:49.604 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:53:50.076 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:53:50.549 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:53:51.022 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:53:51.494 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:53:51.966 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:53:52.437 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:53:52.910 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:53:53.383 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:53:53.855 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:53:54.328 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:53:54.801 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:53:55.273 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 01:53:55.744 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 01:53:56.217 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 01:53:56.689 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 01:53:57.161 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 01:53:57.632 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 01:53:58.106 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 01:53:58.578 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 01:53:59.050 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 01:53:59.521 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 01:53:59.995 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 01:54:00.467 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 01:54:00.939 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 01:54:01.410 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 01:54:01.883 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 01:54:02.356 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 01:54:02.828 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 01:54:03.299 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 01:54:03.772 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 01:54:04.245 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 01:54:04.717 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 01:54:05.188 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 01:54:05.661 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 01:54:06.133 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 01:54:06.605 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 01:54:07.076 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 01:54:07.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:54:07.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:54:07.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:54:07.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:54:07.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:54:07.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:54:07.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:54:07.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:54:07.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:54:07.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:54:07.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:54:07.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:54:07.089 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:54:07.089 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7349 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:07.089 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7349 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:07.089 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7349 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:07.089 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7349 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:07.089 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7349 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:07.089 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7349 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:07.089 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7349 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:12.095 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:54:12.095 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:54:12.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:54:12.095 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:54:12.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:54:12.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:54:12.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:54:12.103 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:54:12.103 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:12.103 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:54:12.104 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:54:12.107 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:54:12.107 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:54:12.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:54:12.107 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:12.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:54:12.108 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:54:12.108 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:54:12.108 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:54:12.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:54:12.111 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:54:12.111 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:54:12.111 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:54:12.111 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:12.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:54:12.111 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:54:12.111 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:54:12.111 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:54:12.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:54:12.114 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:54:12.115 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:54:12.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:54:12.115 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:12.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:54:12.115 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:54:12.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:54:12.115 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:54:12.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:54:12.119 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:12.120 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:54:12.120 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:54:12.120 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:54:12.121 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:54:12.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:12.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:12.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:12.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:54:12.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:12.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:12.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:12.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:12.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:12.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:12.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:12.125 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:54:12.603 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:54:12.648 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:54:12.650 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:54:12.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:54:12.651 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:54:12.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:54:12.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:54:12.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:54:12.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:54:12.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:54:12.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:54:12.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:54:12.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:54:13.074 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:54:13.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:54:13.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:54:13.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:54:13.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:54:13.546 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:54:14.018 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:54:14.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:54:14.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:54:14.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:54:14.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:54:14.489 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:54:14.963 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:54:15.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:54:15.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:54:15.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:54:15.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:54:15.435 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:54:15.907 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:54:16.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:54:16.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:54:16.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:54:16.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:54:16.378 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:54:16.851 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:54:17.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:54:17.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:54:17.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:54:17.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:54:17.324 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:54:17.796 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:54:18.267 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:54:18.740 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:54:19.213 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:54:19.684 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:54:20.156 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:54:20.629 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:54:21.102 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:54:21.574 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:54:22.045 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:54:22.517 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:54:22.990 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:54:23.462 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:54:23.933 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:54:24.406 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:54:24.879 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:54:25.351 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:54:25.825 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:54:26.297 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:54:26.769 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:54:27.240 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:54:27.713 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:54:28.186 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:54:28.658 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:54:29.129 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:54:29.600 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:54:30.073 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:54:30.545 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:54:31.017 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:54:31.488 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:54:31.961 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:54:32.434 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:54:32.906 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:54:33.377 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:54:33.850 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:54:34.323 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 01:54:34.794 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 01:54:35.266 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 01:54:35.739 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 01:54:36.212 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 01:54:36.683 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 01:54:37.155 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 01:54:37.625 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 01:54:38.099 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 01:54:38.571 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 01:54:39.043 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 01:54:39.514 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 01:54:39.987 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 01:54:40.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:54:40.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:54:40.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:54:40.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:54:40.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:54:40.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:54:40.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:54:40.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:54:40.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:54:40.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:54:40.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:54:40.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:54:40.144 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:54:45.150 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:54:45.150 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:54:45.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:54:45.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:54:45.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:54:45.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:54:45.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:54:45.162 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:54:45.162 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:45.162 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:54:45.162 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:54:45.164 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:54:45.164 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:54:45.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:54:45.165 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:45.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:54:45.166 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:54:45.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:54:45.166 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:54:45.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:54:45.167 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:54:45.167 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:54:45.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:54:45.167 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:45.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:54:45.168 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:54:45.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:54:45.168 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:54:45.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:54:45.170 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:54:45.170 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:54:45.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:54:45.170 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:45.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:54:45.170 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:54:45.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:54:45.170 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:54:45.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:54:45.173 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:45.174 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:54:45.174 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:54:45.174 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:54:45.174 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:45.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:45.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:45.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:45.179 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:54:45.657 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:54:45.707 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:54:45.710 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:54:45.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:54:45.711 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:54:45.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:54:45.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:54:45.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:54:45.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:54:45.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:54:45.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:54:45.727 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:54:45.727 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:54:45.727 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:54:45.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:54:45.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:54:45.728 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:45.728 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:45.728 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:45.728 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:45.728 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:45.728 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:45.728 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:50.731 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:54:50.731 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:54:50.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:54:50.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:54:50.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:54:50.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:54:50.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:54:50.740 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:54:50.741 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:50.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:54:50.741 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:54:50.744 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:54:50.745 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:54:50.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:54:50.745 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:50.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:54:50.746 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:54:50.747 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:54:50.747 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:54:50.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:54:50.749 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:54:50.750 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:54:50.750 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:54:50.750 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:50.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:54:50.750 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:54:50.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:54:50.751 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:54:50.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:54:50.754 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:54:50.754 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:54:50.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:54:50.755 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:50.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:54:50.755 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:54:50.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:54:50.755 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:54:50.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:54:50.761 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:54:50.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:54:50.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:54:50.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:54:50.761 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:54:50.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:54:50.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:54:50.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:50.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:54:50.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:54:50.761 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:54:50.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:50.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:50.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:50.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:54:50.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:50.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:50.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:50.762 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:54:50.762 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:54:50.762 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:54:50.762 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:54:50.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:50.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:50.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:50.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:50.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:50.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:50.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:50.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:50.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:50.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:50.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:50.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:50.767 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:54:51.244 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:54:51.285 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:54:51.285 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:54:51.286 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:54:51.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:54:51.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:54:51.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:54:51.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:54:51.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:54:51.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:54:51.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:54:51.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:54:51.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:54:51.302 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:54:51.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:54:51.302 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:54:51.302 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:51.302 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:51.302 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:51.302 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:54:56.307 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:54:56.307 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:54:56.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:54:56.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:54:56.307 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:54:56.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:54:56.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:54:56.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:54:56.316 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:56.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:54:56.316 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:54:56.319 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:54:56.320 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:54:56.320 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:54:56.320 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:56.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:54:56.321 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:54:56.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:54:56.321 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:54:56.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:54:56.322 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:54:56.322 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:54:56.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:54:56.323 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:56.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:54:56.323 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:54:56.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:54:56.323 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:54:56.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:54:56.325 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:54:56.325 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:54:56.325 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:54:56.325 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:54:56.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:54:56.325 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:54:56.325 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:54:56.325 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:54:56.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:54:56.328 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:54:56.328 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:54:56.328 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:54:56.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:54:56.333 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:54:56.810 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:54:56.850 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:54:56.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:54:56.852 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:54:56.853 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:54:56.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:54:56.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:54:56.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:54:56.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:54:56.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:54:56.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:54:56.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:54:56.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:54:56.861 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:54:56.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:54:56.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:54:56.861 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:01.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:55:01.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:55:01.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:55:01.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:55:01.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:55:01.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:55:01.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:55:01.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:55:01.882 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:01.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:55:01.883 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:55:01.884 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:55:01.884 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:55:01.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:55:01.884 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:01.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:55:01.885 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:55:01.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:55:01.885 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:55:01.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:01.886 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:55:01.886 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:55:01.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:55:01.886 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:01.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:55:01.886 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:55:01.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:55:01.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:55:01.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:01.887 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:55:01.887 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:55:01.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:55:01.887 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:01.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:55:01.887 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:55:01.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:55:01.887 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:55:01.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:55:01.889 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:55:01.889 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:55:01.889 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:01.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:01.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:01.894 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:55:02.370 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:55:02.411 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:55:02.412 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:55:02.413 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:55:02.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:55:02.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:55:02.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:55:02.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:55:02.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:55:02.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:55:02.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:55:02.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:55:02.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:55:02.841 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:55:02.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:02.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:02.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:02.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:03.313 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:55:03.786 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:55:03.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:03.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:03.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:03.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:04.259 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:55:04.731 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:55:04.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:04.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:04.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:04.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:05.202 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:55:05.675 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:55:05.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:05.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:05.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:05.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:06.147 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:55:06.619 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:55:06.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:06.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:06.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:06.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:07.090 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:55:07.564 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:55:08.036 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:55:08.508 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:55:08.981 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:55:09.454 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:55:09.926 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:55:10.399 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:55:10.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:55:10.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:55:10.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:10.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:10.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:10.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:10.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:55:10.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:55:10.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:55:10.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:55:10.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:55:10.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:55:10.478 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:55:10.479 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:10.479 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:10.479 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:10.479 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:10.479 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:10.479 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:10.479 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:10.479 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:10.479 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:10.480 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:10.480 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:10.480 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:15.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:55:15.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:55:15.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:55:15.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:55:15.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:55:15.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:55:15.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:55:15.492 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:55:15.492 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:15.492 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:55:15.492 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:55:15.494 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:55:15.494 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:55:15.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:55:15.494 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:15.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:55:15.494 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:55:15.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:55:15.495 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:55:15.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:15.496 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:55:15.496 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:55:15.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:55:15.496 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:15.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:55:15.496 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:55:15.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:55:15.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:55:15.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:15.497 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:55:15.497 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:55:15.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:55:15.497 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:15.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:55:15.497 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:55:15.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:55:15.497 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:55:15.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:15.499 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:55:15.500 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:55:15.500 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:55:15.500 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:15.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:15.504 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:55:15.982 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:55:16.019 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:55:16.020 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:55:16.022 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:55:16.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:55:16.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:55:16.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:55:16.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:55:16.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:55:16.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:55:16.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:55:16.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:55:16.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:55:16.454 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:55:16.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:16.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:16.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:16.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:16.925 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:55:17.396 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:55:17.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:17.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:17.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:17.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:17.869 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:55:18.341 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:55:18.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:18.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:18.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:18.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:18.813 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:55:19.285 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:55:19.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:19.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:19.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:19.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:19.758 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:55:20.230 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:55:20.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:20.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:20.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:20.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:20.702 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:55:21.173 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:55:21.646 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:55:22.118 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:55:22.591 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:55:23.064 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:55:23.537 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:55:24.008 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:55:24.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:55:24.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:55:24.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:24.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:24.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:24.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:24.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:55:24.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:55:24.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:55:24.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:55:24.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:55:24.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:55:24.042 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:55:24.042 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1845 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:24.042 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1845 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:24.042 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1845 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:24.042 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1845 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:24.042 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1845 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:24.042 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1845 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:24.042 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1845 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:29.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:55:29.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:55:29.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:55:29.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:55:29.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:55:29.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:55:29.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:55:29.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:55:29.049 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:29.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:55:29.050 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:55:29.053 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:55:29.053 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:55:29.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:55:29.053 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:29.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:55:29.053 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:55:29.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:55:29.053 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:55:29.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:29.056 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:55:29.057 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:55:29.057 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:55:29.057 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:29.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:55:29.057 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:55:29.057 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:55:29.057 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:55:29.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:29.060 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:55:29.060 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:55:29.060 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:55:29.060 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:29.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:55:29.060 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:55:29.060 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:55:29.060 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:55:29.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:29.064 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:29.065 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:55:29.065 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:55:29.066 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:55:29.066 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:55:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:29.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:55:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:29.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:29.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:29.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:29.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:29.070 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:55:29.546 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:55:29.595 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:55:29.599 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:55:29.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:55:29.602 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:55:29.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:55:29.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:55:29.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:55:29.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:55:29.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:55:29.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:55:29.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:55:29.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:55:30.018 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:55:30.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:30.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:30.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:30.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:30.489 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:55:30.962 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:55:31.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:31.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:31.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:31.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:31.435 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:55:31.907 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:55:32.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:32.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:32.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:32.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:32.378 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:55:32.851 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:55:33.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:33.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:33.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:33.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:33.324 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:55:33.796 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:55:34.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:34.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:34.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:34.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:34.269 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:55:34.742 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:55:35.214 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:55:35.685 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:55:36.158 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:55:36.630 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:55:37.102 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:55:37.573 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:55:37.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:55:37.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:55:37.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:37.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:37.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:37.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:37.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:55:37.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:55:37.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:55:37.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:55:37.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:55:37.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:55:37.648 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:55:37.648 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:37.648 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:37.648 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:55:42.652 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:55:42.652 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:55:42.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:55:42.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:55:42.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:55:42.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:55:42.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:55:42.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:55:42.659 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:42.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:55:42.659 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:55:42.662 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:55:42.662 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:55:42.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:55:42.663 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:42.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:55:42.663 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:55:42.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:55:42.663 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:55:42.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:42.667 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:55:42.668 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:55:42.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:55:42.668 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:42.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:55:42.668 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:55:42.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:55:42.668 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:55:42.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:42.672 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:55:42.672 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:55:42.673 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:55:42.673 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:42.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:55:42.673 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:55:42.673 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:55:42.673 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:55:42.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:42.678 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:55:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:55:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:55:42.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:55:42.678 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:55:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:55:42.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:55:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:55:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:55:42.679 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:55:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:42.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:42.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:42.679 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:55:42.680 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:55:42.680 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:55:42.680 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:55:42.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:42.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:42.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:42.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:55:42.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:42.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:42.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:42.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:42.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:42.684 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:55:43.163 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:55:43.208 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:55:43.209 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:55:43.210 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:55:43.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:55:43.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:55:43.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:55:43.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:55:43.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:55:43.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:55:43.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:55:43.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:55:43.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:55:43.635 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:55:43.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:43.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:43.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:43.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:44.106 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:55:44.577 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:55:44.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:44.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:44.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:44.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:45.048 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:55:45.521 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:55:45.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:45.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:45.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:45.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:45.994 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:55:46.465 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:55:46.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:46.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:46.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:46.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:46.936 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:55:47.407 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:55:47.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:47.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:47.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:47.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:47.878 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:55:48.349 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:55:48.822 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:55:49.295 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:55:49.767 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:55:50.238 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:55:50.711 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:55:51.184 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:55:51.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:55:51.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:55:51.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:51.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:51.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:51.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:51.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:55:51.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:55:51.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:55:51.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:55:51.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:55:51.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:55:51.265 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:55:56.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:55:56.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:55:56.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:55:56.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:55:56.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:55:56.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:55:56.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:55:56.281 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:55:56.281 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:56.281 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:55:56.281 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:55:56.286 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:55:56.286 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:55:56.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:55:56.287 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:56.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:55:56.287 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:55:56.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:55:56.287 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:55:56.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:56.291 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:55:56.292 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:55:56.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:55:56.292 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:56.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:55:56.292 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:55:56.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:55:56.292 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:55:56.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:56.296 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:55:56.296 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:55:56.296 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:55:56.296 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:55:56.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:55:56.297 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:55:56.297 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:55:56.297 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:55:56.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:56.302 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:55:56.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:55:56.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:55:56.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:55:56.302 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:55:56.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:55:56.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:55:56.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:55:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:55:56.303 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:55:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:56.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:56.303 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:55:56.303 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:55:56.303 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:55:56.303 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:55:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:56.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:56.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:56.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:55:56.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:56.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:56.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:56.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:56.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:56.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:56.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:56.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:56.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:56.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:56.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:56.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:55:56.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:56.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:56.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:56.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:56.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:56.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:55:56.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:55:56.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:56.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:56.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:55:56.308 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:55:56.786 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:55:56.835 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:55:56.838 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:55:56.840 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:55:56.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:55:56.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:55:56.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:55:56.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:55:56.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:55:56.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:55:56.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:55:56.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:55:56.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:55:57.258 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:55:57.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:57.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:57.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:57.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:57.729 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:55:58.203 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:55:58.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:58.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:58.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:58.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:58.675 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:55:59.147 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:55:59.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:55:59.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:55:59.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:55:59.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:55:59.618 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:56:00.091 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:56:00.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:00.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:00.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:00.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:00.563 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:56:01.035 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:56:01.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:01.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:01.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:01.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:01.506 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:56:01.980 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:56:02.452 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:56:02.924 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:56:03.395 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:56:03.869 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:56:04.341 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:56:04.813 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:56:04.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:56:04.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:56:04.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:04.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:04.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:04.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:04.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:56:04.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:56:04.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:56:04.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:56:04.893 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:56:04.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:56:04.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:56:04.894 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:04.894 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:04.894 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:04.894 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:04.894 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:04.894 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:04.894 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:09.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:56:09.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:56:09.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:56:09.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:56:09.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:56:09.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:56:09.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:56:09.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:56:09.906 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:56:09.907 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:56:09.907 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:56:09.911 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:56:09.911 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:56:09.912 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:56:09.912 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:56:09.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:56:09.912 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:56:09.912 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:56:09.912 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:56:09.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:09.916 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:56:09.916 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:56:09.916 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:56:09.916 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:56:09.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:56:09.916 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:56:09.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:56:09.917 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:56:09.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:09.920 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:56:09.920 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:56:09.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:56:09.920 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:56:09.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:56:09.920 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:56:09.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:56:09.921 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:56:09.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:09.925 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:56:09.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:56:09.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:56:09.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:56:09.925 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:56:09.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:56:09.926 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:56:09.926 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:56:09.926 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:09.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:09.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:09.931 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:56:10.407 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:56:10.450 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:56:10.451 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:56:10.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:56:10.453 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:56:10.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:56:10.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:56:10.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:56:10.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:56:10.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:56:10.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:56:10.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:56:10.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:56:10.879 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:56:10.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:10.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:10.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:10.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:11.351 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:56:11.821 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:56:11.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:11.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:11.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:11.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:12.295 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:56:12.767 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:56:12.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:12.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:12.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:12.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:13.239 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:56:13.710 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:56:13.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:13.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:13.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:13.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:14.184 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:56:14.656 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:56:14.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:14.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:14.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:14.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:15.128 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:56:15.602 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:56:16.074 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:56:16.546 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:56:17.017 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:56:17.491 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:56:17.963 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:56:18.435 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:56:18.906 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:56:19.377 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:56:19.851 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:56:20.323 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:56:20.795 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:56:21.266 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:56:21.739 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:56:22.211 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:56:22.684 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:56:23.154 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:56:23.625 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:56:24.099 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:56:24.571 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:56:25.042 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:56:25.514 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:56:25.987 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:56:26.460 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:56:26.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:56:26.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:56:26.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:26.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:26.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:26.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:26.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:56:26.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:56:26.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:56:26.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:56:26.524 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:56:26.524 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:56:26.525 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:56:26.525 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3585 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:26.525 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3585 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:26.525 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3585 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:26.525 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3585 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:26.526 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3586 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:26.526 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3586 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:26.526 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3586 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:26.526 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3586 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:26.526 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3586 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:26.526 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3586 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:26.526 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3586 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:26.526 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3586 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:31.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:56:31.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:56:31.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:56:31.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:56:31.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:56:31.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:56:31.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:56:31.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:56:31.536 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:56:31.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:56:31.536 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:56:31.538 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:56:31.538 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:56:31.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:56:31.539 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:56:31.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:56:31.539 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:56:31.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:56:31.539 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:56:31.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:31.541 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:56:31.541 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:56:31.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:56:31.541 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:56:31.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:56:31.541 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:56:31.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:56:31.541 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:56:31.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:31.543 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:56:31.543 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:56:31.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:56:31.543 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:56:31.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:56:31.543 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:56:31.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:56:31.543 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:56:31.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:31.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:56:31.546 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:56:31.546 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:56:31.546 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:31.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:31.550 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:56:32.028 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:56:32.066 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:56:32.067 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:56:32.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:56:32.069 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:56:32.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:56:32.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:56:32.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:56:32.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:56:32.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:56:32.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:56:32.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:56:32.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:56:32.500 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:56:32.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:32.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:32.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:32.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:32.972 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:56:33.443 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:56:33.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:33.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:33.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:33.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:33.916 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:56:34.388 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:56:34.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:34.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:34.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:34.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:34.860 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:56:35.331 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:56:35.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:35.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:35.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:35.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:35.804 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:56:36.276 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:56:36.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:36.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:36.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:36.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:36.748 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:56:37.219 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:56:37.693 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:56:38.165 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:56:38.637 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:56:39.108 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:56:39.582 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:56:40.054 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:56:40.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:56:40.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:56:40.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:40.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:40.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:40.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:40.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:56:40.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:56:40.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:56:40.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:56:40.133 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:56:40.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:56:40.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:56:40.133 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:40.133 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:40.133 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:40.133 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:40.133 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:40.133 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:40.133 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:56:45.140 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:56:45.140 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:56:45.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:56:45.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:56:45.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:56:45.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:56:45.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:56:45.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:56:45.148 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:56:45.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:56:45.148 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:56:45.150 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:56:45.151 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:56:45.151 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:56:45.151 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:56:45.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:56:45.152 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:56:45.152 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:56:45.152 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:56:45.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:45.153 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:56:45.153 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:56:45.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:56:45.153 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:56:45.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:56:45.154 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:56:45.154 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:56:45.154 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:56:45.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:45.156 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:56:45.156 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:56:45.156 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:56:45.156 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:56:45.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:56:45.156 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:56:45.156 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:56:45.156 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:56:45.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:45.158 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:56:45.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:56:45.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:56:45.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:56:45.158 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:56:45.159 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:56:45.159 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:56:45.159 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:45.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:45.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:45.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:45.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:45.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:45.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:56:45.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:45.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:45.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:45.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:56:45.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:56:45.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:45.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:45.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:45.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:56:45.164 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:56:45.641 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:56:45.671 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:56:45.672 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:56:45.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:56:45.673 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:56:45.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:56:45.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:56:45.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:56:45.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:56:45.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:56:45.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:56:45.677 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:56:45.677 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:56:46.113 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:56:46.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:46.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:46.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:46.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:46.585 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:56:47.058 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:56:47.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:47.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:47.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:47.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:47.530 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:56:48.002 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:56:48.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:48.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:48.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:48.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:48.473 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:56:48.947 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:56:49.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:49.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:49.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:49.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:49.419 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:56:49.890 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:56:50.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:56:50.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:56:50.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:56:50.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:56:50.361 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:56:50.832 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:56:51.306 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:56:51.778 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:56:52.250 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:56:52.721 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:56:53.194 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:56:53.666 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:56:54.138 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:56:54.612 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:56:55.084 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:56:55.556 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:56:56.027 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:56:56.501 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:56:56.973 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:56:57.445 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:56:57.916 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:56:58.389 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:56:58.862 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:56:59.333 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:56:59.805 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:57:00.278 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:57:00.751 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:57:01.223 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:57:01.694 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:57:01.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:57:01.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:57:01.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:01.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:01.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:01.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:01.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:01.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:01.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:01.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:01.711 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:57:01.711 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:57:01.712 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:57:01.712 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3576 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:01.712 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3576 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:01.712 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3576 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:01.712 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3576 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:01.712 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3576 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:01.712 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3576 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:01.712 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3576 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:06.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:57:06.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:57:06.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:06.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:06.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:06.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:06.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:06.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:57:06.725 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:06.726 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:57:06.726 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:57:06.729 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:57:06.729 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:57:06.730 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:57:06.730 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:06.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:06.731 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:57:06.731 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:57:06.731 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:57:06.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:06.733 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:57:06.733 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:57:06.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:57:06.733 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:06.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:06.733 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:57:06.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:57:06.733 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:57:06.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:06.736 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:57:06.736 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:57:06.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:57:06.736 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:06.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:06.736 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:57:06.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:57:06.736 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:57:06.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:06.739 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:57:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:57:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:57:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:57:06.739 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:57:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:57:06.740 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:57:06.740 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:57:06.740 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:06.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:06.745 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:57:07.223 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:57:07.263 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:57:07.265 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:57:07.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:57:07.267 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:57:07.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:57:07.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:57:07.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:57:07.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:07.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:07.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:07.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:07.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:07.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:07.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:57:07.315 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:57:07.315 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:57:07.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:07.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:07.316 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:07.316 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:07.316 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:07.316 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:07.316 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:07.316 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:07.316 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:12.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:57:12.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:57:12.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:12.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:12.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:12.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:12.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:12.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:57:12.333 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:12.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:57:12.333 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:57:12.334 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:57:12.334 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:57:12.335 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:57:12.335 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:12.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:12.335 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:57:12.335 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:57:12.335 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:57:12.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:12.337 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:57:12.337 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:57:12.337 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:57:12.337 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:12.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:12.337 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:57:12.337 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:57:12.337 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:57:12.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:12.338 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:57:12.338 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:57:12.338 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:57:12.339 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:12.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:12.339 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:57:12.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:57:12.339 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:57:12.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:57:12.341 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:57:12.341 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:57:12.341 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:12.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:12.346 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:57:12.824 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:57:12.861 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:57:12.862 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:57:12.863 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:57:12.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:57:12.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:57:12.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:57:12.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:57:12.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:12.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:12.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:12.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:12.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:12.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:12.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:57:12.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:57:12.926 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:57:12.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:12.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:17.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:57:17.929 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:57:17.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:17.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:17.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:17.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:17.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:17.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:57:17.943 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:17.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:57:17.943 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:57:17.945 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:57:17.945 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:57:17.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:57:17.946 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:17.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:17.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:57:17.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:57:17.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:57:17.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:17.947 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:57:17.947 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:57:17.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:57:17.947 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:17.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:17.947 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:57:17.948 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:57:17.948 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:57:17.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:17.949 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:57:17.949 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:57:17.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:57:17.949 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:17.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:17.949 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:57:17.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:57:17.949 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:57:17.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:17.951 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:57:17.951 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:57:17.951 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:57:17.952 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:17.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:17.956 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:57:18.434 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:57:18.475 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:57:18.477 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:57:18.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:57:18.479 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:57:18.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:57:18.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:57:18.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:57:18.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:18.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:18.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:18.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:18.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:18.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:18.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:18.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:18.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:57:18.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:57:18.519 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:57:18.520 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:18.520 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:18.520 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:18.520 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:18.520 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:18.520 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:18.520 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:23.522 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:57:23.522 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:57:23.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:23.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:23.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:23.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:23.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:23.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:57:23.525 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:23.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:57:23.526 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:57:23.526 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:57:23.526 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:57:23.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:57:23.527 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:23.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:23.527 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:57:23.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:57:23.527 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:57:23.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:23.528 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:57:23.528 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:57:23.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:57:23.528 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:23.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:23.528 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:57:23.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:57:23.528 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:57:23.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:23.529 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:57:23.529 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:57:23.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:57:23.529 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:23.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:23.529 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:57:23.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:57:23.529 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:57:23.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:57:23.531 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:57:23.531 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:57:23.531 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:23.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:23.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:23.536 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:57:24.013 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:57:24.049 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:57:24.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:57:24.051 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:57:24.052 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:57:24.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:57:24.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:57:24.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:57:24.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:24.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:24.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:24.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:24.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:24.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:24.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:24.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:24.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:57:24.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:57:24.125 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:57:24.125 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:24.125 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:24.125 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:24.125 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:24.125 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:24.125 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:24.125 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:57:29.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:57:29.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:57:29.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:29.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:29.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:29.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:29.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:29.141 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:57:29.141 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:29.142 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:57:29.142 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:57:29.144 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:57:29.145 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:57:29.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:57:29.145 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:29.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:29.146 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:57:29.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:57:29.147 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:57:29.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:29.149 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:57:29.149 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:57:29.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:57:29.150 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:29.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:29.151 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:57:29.151 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:57:29.151 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:57:29.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:29.153 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:57:29.153 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:57:29.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:57:29.153 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:29.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:29.153 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:57:29.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:57:29.153 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:57:29.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:29.157 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:57:29.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:57:29.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:57:29.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:57:29.157 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:57:29.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:57:29.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:57:29.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:29.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:57:29.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:57:29.157 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:57:29.158 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:57:29.158 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:57:29.158 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:29.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:29.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:29.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:29.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:29.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:29.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:29.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:29.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:29.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:29.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:29.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:29.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:29.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:29.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:29.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:29.163 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:57:29.638 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:57:29.689 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:57:29.692 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:57:29.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:57:29.693 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:57:29.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:57:29.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:57:29.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:57:29.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:57:29.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:57:29.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:57:29.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:29.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:29.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:29.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:29.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:29.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:29.729 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:57:29.729 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:57:29.729 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:57:29.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:29.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:34.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:57:34.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:57:34.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:34.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:34.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:34.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:34.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:34.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:57:34.747 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:34.748 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:57:34.748 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:57:34.753 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:57:34.754 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:57:34.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:57:34.755 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:34.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:34.756 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:57:34.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:57:34.756 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:57:34.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:34.758 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:57:34.759 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:57:34.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:57:34.759 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:34.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:34.760 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:57:34.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:57:34.760 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:57:34.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:34.762 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:57:34.762 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:57:34.762 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:57:34.762 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:34.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:34.763 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:57:34.763 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:57:34.763 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:57:34.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:34.766 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:57:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:57:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:57:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:57:34.766 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:57:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:57:34.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:57:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:57:34.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:57:34.766 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:57:34.767 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:57:34.767 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:57:34.767 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:34.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:34.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:34.772 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:57:35.250 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:57:35.295 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:57:35.297 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:57:35.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:57:35.300 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:57:35.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:57:35.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:57:35.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:57:35.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:57:35.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:57:35.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:57:35.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:35.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:35.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:35.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:35.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:35.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:35.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:57:35.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:57:35.351 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:57:35.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:35.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:40.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:57:40.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:57:40.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:40.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:40.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:40.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:40.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:57:40.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:57:40.366 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:40.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:57:40.366 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:57:40.369 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:57:40.370 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:57:40.370 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:57:40.370 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:40.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:57:40.371 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:57:40.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:57:40.372 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:57:40.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:40.373 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:57:40.374 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:57:40.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:57:40.374 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:40.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:57:40.375 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:57:40.375 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:57:40.375 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:57:40.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:40.377 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:57:40.377 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:57:40.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:57:40.377 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:57:40.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:57:40.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:57:40.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:57:40.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:57:40.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:40.382 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:57:40.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:57:40.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:57:40.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:57:40.382 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:57:40.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:57:40.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:57:40.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:40.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:57:40.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:57:40.382 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:57:40.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:40.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:40.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:40.383 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:57:40.383 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:57:40.383 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:57:40.383 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:57:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:40.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:57:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:40.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:57:40.388 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:57:40.864 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:57:40.915 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:57:40.918 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:57:40.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:57:40.921 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:57:40.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:57:40.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:57:40.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:57:40.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:57:40.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:57:40.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:57:40.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:57:40.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:57:41.336 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:57:41.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:41.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:41.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:41.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:41.808 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:57:42.281 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:57:42.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:42.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:42.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:42.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:42.753 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:57:43.225 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:57:43.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:43.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:43.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:43.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:43.696 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:57:44.185 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:57:44.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:44.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:44.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:44.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:44.656 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:57:45.128 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:57:45.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:57:45.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:57:45.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:57:45.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:57:45.601 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:57:46.073 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:57:46.545 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:57:47.016 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:57:47.489 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:57:47.962 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:57:48.434 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:57:48.905 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:57:49.376 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 01:57:49.849 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 01:57:50.322 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 01:57:50.793 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 01:57:51.264 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 01:57:51.736 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 01:57:52.209 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 01:57:52.681 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 01:57:53.154 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 01:57:53.627 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 01:57:54.099 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 01:57:54.572 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 01:57:55.042 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 01:57:55.513 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 01:57:55.987 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 01:57:56.459 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 01:57:56.931 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 01:57:57.402 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 01:57:57.873 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 01:57:58.346 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 01:57:58.819 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 01:57:59.291 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 01:57:59.762 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 01:58:00.235 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 01:58:00.707 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 01:58:01.179 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 01:58:01.651 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 01:58:02.124 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 01:58:02.597 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 01:58:03.069 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 01:58:03.540 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 01:58:04.013 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 01:58:04.485 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 01:58:04.957 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 01:58:05.428 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 01:58:05.902 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 01:58:06.374 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 01:58:06.846 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 01:58:07.319 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 01:58:07.792 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 01:58:08.264 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 01:58:08.735 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 01:58:09.210 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 01:58:09.682 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 01:58:10.153 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 01:58:10.626 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 01:58:11.099 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 01:58:11.571 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 01:58:12.042 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 01:58:12.515 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 01:58:12.987 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 01:58:13.460 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 01:58:13.930 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 01:58:14.404 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 01:58:14.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:58:14.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:58:14.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:14.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:14.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:14.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:14.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:58:14.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:58:14.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:58:14.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:58:14.411 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:58:14.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:58:14.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:58:19.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:58:19.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:58:19.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:58:19.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:58:19.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:58:19.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:58:19.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:58:19.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:58:19.426 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:19.427 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:58:19.427 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:58:19.430 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:58:19.430 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:58:19.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:58:19.431 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:19.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:58:19.432 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:58:19.432 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:58:19.432 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:58:19.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:19.434 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:58:19.434 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:58:19.434 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:58:19.434 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:19.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:58:19.434 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:58:19.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:58:19.435 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:58:19.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:19.437 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:58:19.437 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:58:19.438 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:58:19.438 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:19.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:58:19.438 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:58:19.438 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:58:19.438 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:58:19.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:19.441 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:58:19.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:58:19.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:58:19.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:58:19.441 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:58:19.442 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:58:19.442 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:58:19.442 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:19.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:19.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:19.447 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:58:19.924 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:58:19.971 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:58:19.973 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:58:19.975 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:58:19.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:58:20.396 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:58:20.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:20.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:20.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:20.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:20.872 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:58:21.347 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:58:21.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:21.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:21.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:21.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:21.819 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:58:22.291 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:58:22.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:22.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:22.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:22.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:22.765 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:58:23.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:58:23.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:23.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:23.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:23.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:23.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:58:23.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:58:23.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:58:23.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:58:23.011 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:58:23.011 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:58:23.011 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:58:23.011 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=770 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:23.011 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=770 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:23.011 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=770 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:23.011 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=770 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:28.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:58:28.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:58:28.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:58:28.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:58:28.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:58:28.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:58:28.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:58:28.025 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:58:28.025 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:28.025 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:58:28.026 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:58:28.029 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:58:28.029 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:58:28.029 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:58:28.029 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:28.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:58:28.030 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:58:28.030 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:58:28.030 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:58:28.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:28.033 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:58:28.033 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:58:28.034 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:58:28.034 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:28.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:58:28.034 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:58:28.035 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:58:28.035 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:58:28.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:28.036 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:58:28.036 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:58:28.036 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:58:28.036 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:28.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:58:28.037 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:58:28.037 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:58:28.037 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:58:28.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:28.040 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:58:28.040 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:58:28.040 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:58:28.041 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:28.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:28.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:28.045 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:58:28.521 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:58:28.569 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:58:28.571 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:58:28.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:58:28.573 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:58:28.993 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:58:29.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:29.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:29.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:29.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:29.469 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:58:29.941 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:58:30.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:30.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:30.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:30.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:30.415 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:58:30.887 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:58:31.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:31.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:31.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:31.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:31.361 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:58:31.834 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:58:32.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:32.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:32.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:32.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:32.306 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:58:32.781 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:58:33.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:33.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:33.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:33.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:33.253 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:58:33.728 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:58:34.200 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:58:34.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:34.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:34.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:34.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:34.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:58:34.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:58:34.587 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:58:34.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:58:34.587 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:58:34.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:58:34.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:58:34.587 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:34.587 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1412 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:34.587 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:34.587 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1412 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:34.587 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1412 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:34.587 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1412 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:34.587 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1412 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:39.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:58:39.592 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:58:39.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:58:39.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:58:39.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:58:39.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:58:39.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:58:39.601 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:58:39.602 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:39.602 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:58:39.602 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:58:39.604 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:58:39.605 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:58:39.605 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:58:39.605 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:39.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:58:39.606 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:58:39.606 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:58:39.606 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:58:39.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:39.607 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:58:39.607 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:58:39.608 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:58:39.608 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:39.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:58:39.608 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:58:39.608 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:58:39.608 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:58:39.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:39.610 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:58:39.610 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:58:39.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:58:39.610 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:39.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:58:39.610 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:58:39.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:58:39.610 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:58:39.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:39.612 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:58:39.613 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:58:39.613 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:39.613 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:39.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:39.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:39.618 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:58:40.096 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:58:40.135 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:58:40.137 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:58:40.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:58:40.139 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:58:40.568 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:58:40.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:40.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:40.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:40.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:41.044 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:58:41.516 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:58:41.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:41.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:41.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:41.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:41.991 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:58:42.463 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:58:42.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:42.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:42.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:42.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:42.937 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:58:43.409 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:58:43.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:43.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:43.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:43.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:43.881 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:58:44.356 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:58:44.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:44.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:44.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:44.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:44.828 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:58:45.299 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:58:45.773 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:58:46.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:46.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:46.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:46.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:46.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:58:46.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:58:46.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:58:46.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:58:46.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:58:46.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:58:46.158 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:58:46.158 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:46.159 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1412 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:46.159 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:46.159 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1412 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:46.159 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1412 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:46.159 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1412 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:46.159 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1412 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:51.160 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:58:51.160 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:58:51.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:58:51.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:58:51.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:58:51.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:58:51.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:58:51.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:58:51.167 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:51.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:58:51.167 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:58:51.169 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:58:51.170 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:58:51.170 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:58:51.170 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:51.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:58:51.170 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:58:51.170 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:58:51.170 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:58:51.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:51.173 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:58:51.173 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:58:51.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:58:51.173 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:51.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:58:51.173 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:58:51.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:58:51.173 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:58:51.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:51.176 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:58:51.176 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:58:51.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:58:51.176 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:58:51.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:58:51.176 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:58:51.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:58:51.176 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:58:51.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:51.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:58:51.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:58:51.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:58:51.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:58:51.180 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:58:51.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:58:51.181 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:58:51.181 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:58:51.181 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:51.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:51.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:58:51.186 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:58:51.665 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:58:51.719 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:58:51.722 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:58:51.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:58:51.725 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:58:52.137 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:58:52.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:52.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:52.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:52.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:52.612 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:58:53.084 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:58:53.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:53.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:53.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:53.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:53.555 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:58:54.029 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:58:54.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:54.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:54.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:54.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:54.501 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:58:54.973 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:58:55.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:55.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:55.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:55.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:55.448 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:58:55.920 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:58:56.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:56.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:56.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:56.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:56.396 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:58:56.868 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:58:57.343 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:58:57.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:58:57.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:58:57.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:58:57.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:58:57.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:58:57.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:58:57.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:58:57.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:58:57.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:58:57.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:58:57.741 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:58:57.741 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1414 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:57.741 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:57.741 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:57.741 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:57.741 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:57.741 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:58:57.741 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:02.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:59:02.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:59:02.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:02.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:02.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:02.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:02.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:02.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:59:02.753 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:02.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:59:02.754 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:59:02.757 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:59:02.758 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:59:02.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:59:02.758 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:02.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:02.759 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:59:02.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:59:02.760 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:59:02.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:02.761 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:59:02.762 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:59:02.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:59:02.762 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:02.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:02.762 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:59:02.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:59:02.763 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:59:02.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:02.764 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:59:02.764 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:59:02.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:59:02.765 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:02.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:02.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:59:02.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:59:02.765 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:59:02.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:59:02.768 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:59:02.768 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:59:02.768 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:59:02.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:02.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:02.773 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:59:03.251 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:59:03.288 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:59:03.289 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:59:03.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:59:03.290 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:59:03.723 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:59:03.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:03.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:03.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:03.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:04.197 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:59:04.669 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:59:04.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:04.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:04.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:04.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:05.141 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:59:05.612 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:59:05.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:05.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:05.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:05.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:06.087 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:59:06.559 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:59:06.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:06.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:06.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:06.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:07.034 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:59:07.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:59:07.506 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 01:59:07.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:07.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:07.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:07.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:07.979 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 01:59:08.452 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 01:59:08.924 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 01:59:09.398 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 01:59:09.870 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 01:59:10.342 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 01:59:10.813 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 01:59:11.288 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 01:59:11.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:11.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:11.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:11.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:11.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:11.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:11.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:59:11.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:59:11.325 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:59:11.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:11.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:16.332 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:59:16.332 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:59:16.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:16.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:16.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:16.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:16.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:16.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:59:16.340 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:16.341 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:59:16.341 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:59:16.344 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:59:16.345 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:59:16.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:59:16.345 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:16.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:16.345 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:59:16.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:59:16.346 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:59:16.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:16.349 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:59:16.349 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:59:16.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:59:16.350 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:16.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:16.350 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:59:16.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:59:16.350 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:59:16.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:16.354 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:59:16.354 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:59:16.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:59:16.354 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:16.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:16.354 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:59:16.355 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:59:16.355 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:59:16.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:16.359 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:16.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:16.361 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:59:16.361 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:59:16.361 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:59:16.361 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:59:16.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:16.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:16.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:16.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:59:16.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:16.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:16.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:16.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:16.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:16.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:16.365 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:59:16.843 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:59:16.886 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:59:16.887 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:59:16.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:59:16.890 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:59:17.315 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:59:17.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:17.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:17.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:17.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:17.791 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:59:18.263 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:59:18.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:18.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:18.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:18.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:18.737 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:59:19.209 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:59:19.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:19.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:19.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:19.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:19.683 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:59:20.155 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:59:20.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:20.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:20.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:20.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:20.627 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:59:20.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:20.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:20.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:20.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:20.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:20.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:20.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:20.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:20.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:59:20.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:59:20.907 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:59:25.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:59:25.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:59:25.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:25.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:25.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:25.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:25.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:25.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:59:25.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:25.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:59:25.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:59:25.921 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:59:25.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:59:25.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:59:25.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:25.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:25.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:59:25.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:59:25.922 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:59:25.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:25.924 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:59:25.924 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:59:25.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:59:25.924 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:25.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:25.924 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:59:25.925 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:59:25.925 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:59:25.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:25.927 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:59:25.927 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:59:25.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:59:25.927 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:25.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:25.927 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:59:25.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:59:25.927 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:59:25.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:25.930 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:59:25.930 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:59:25.930 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:59:25.930 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:25.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:25.935 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:59:26.412 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:59:26.455 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:59:26.457 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:59:26.459 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:59:26.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:59:26.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:26.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:26.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:26.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:26.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:26.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:26.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:59:26.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:59:26.481 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:59:26.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:26.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:26.481 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:26.482 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:26.482 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:26.482 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:26.482 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:26.482 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:26.482 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:31.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:59:31.484 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:59:31.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:31.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:31.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:31.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:31.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:31.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:59:31.491 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:31.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:59:31.491 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:59:31.494 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:59:31.495 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:59:31.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:59:31.495 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:31.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:31.496 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:59:31.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:59:31.497 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:59:31.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:31.499 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:59:31.500 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:59:31.500 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:59:31.500 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:31.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:31.501 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:59:31.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:59:31.501 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:59:31.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:31.504 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:59:31.504 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:59:31.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:59:31.504 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:31.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:31.505 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:59:31.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:59:31.505 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:59:31.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:31.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:31.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:31.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:31.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:31.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:59:31.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:59:31.511 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:59:31.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:59:31.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:31.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:31.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:31.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:59:31.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:31.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:31.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:31.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:31.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:59:31.994 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:59:32.040 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:59:32.041 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:59:32.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:59:32.042 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:59:32.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:59:32.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:32.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:32.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:32.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:32.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:32.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:32.055 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:59:32.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:59:32.055 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:59:32.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:32.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:32.055 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:32.055 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:32.055 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:32.055 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:32.055 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:32.055 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:32.055 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:37.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:59:37.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:59:37.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:37.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:37.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:37.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:37.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:37.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:59:37.072 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:37.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:59:37.073 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:59:37.076 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:59:37.077 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:59:37.077 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:59:37.077 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:37.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:37.078 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:59:37.078 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:59:37.079 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:59:37.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:37.080 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:59:37.081 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:59:37.081 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:59:37.081 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:37.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:37.081 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:59:37.082 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:59:37.082 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:59:37.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:37.084 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:59:37.084 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:59:37.084 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:59:37.084 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:37.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:37.085 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:59:37.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:59:37.085 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:59:37.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:37.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:59:37.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:37.089 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:59:37.089 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:59:37.089 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:59:37.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:37.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:37.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:37.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:37.094 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:59:37.572 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:59:37.618 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:59:37.620 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:59:37.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:59:37.621 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:59:37.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:37.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:37.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:37.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:37.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:37.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:37.639 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:59:37.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:59:37.639 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:59:37.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:37.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:37.639 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:37.639 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:37.639 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:37.639 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:37.639 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:37.639 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:37.639 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:42.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:59:42.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:59:42.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:42.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:42.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:42.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:42.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:42.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:59:42.653 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:42.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:59:42.654 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:59:42.658 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:59:42.658 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:59:42.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:59:42.659 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:42.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:42.660 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:59:42.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:59:42.660 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:59:42.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:42.662 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:59:42.662 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:59:42.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:59:42.663 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:42.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:42.663 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:59:42.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:59:42.663 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:59:42.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:42.665 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:59:42.665 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:59:42.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:59:42.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:42.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:42.665 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:59:42.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:59:42.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:59:42.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:59:42.669 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:59:42.669 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:59:42.669 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:59:42.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:42.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:42.674 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:59:43.151 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:59:43.194 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:59:43.195 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:59:43.196 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:59:43.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:59:43.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:59:43.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:59:43.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:59:43.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:59:43.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:59:43.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:59:43.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:59:43.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:59:43.623 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:59:43.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:43.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:43.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:43.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:44.094 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:59:44.565 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:59:44.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:44.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:44.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:44.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:45.039 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:59:45.511 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:59:45.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:45.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:45.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:45.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:45.983 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:59:46.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:59:46.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:59:46.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:59:46.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:59:46.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:59:46.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:59:46.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:59:46.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:46.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:46.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:46.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:46.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:46.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:46.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:46.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:46.321 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:59:46.321 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:59:46.321 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:59:46.321 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:46.321 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:46.321 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:46.321 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:46.321 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:46.321 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:46.322 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 01:59:51.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:59:51.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:59:51.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:51.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:51.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:51.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:51.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:51.334 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:59:51.334 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:51.334 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 01:59:51.334 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 01:59:51.338 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 01:59:51.338 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 01:59:51.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:59:51.339 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:51.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:51.339 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 01:59:51.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 01:59:51.339 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 01:59:51.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:51.343 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 01:59:51.343 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 01:59:51.344 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:59:51.344 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:51.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:51.344 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 01:59:51.344 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 01:59:51.344 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 01:59:51.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:51.348 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 01:59:51.348 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 01:59:51.348 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:59:51.348 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 01:59:51.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 01:59:51.348 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 01:59:51.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 01:59:51.349 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 01:59:51.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:51.354 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 01:59:51.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 01:59:51.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 01:59:51.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 01:59:51.354 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 01:59:51.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 01:59:51.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 01:59:51.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:51.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 01:59:51.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 01:59:51.354 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 01:59:51.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:51.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:51.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:51.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:51.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:51.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:51.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:51.355 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 01:59:51.355 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 01:59:51.355 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 01:59:51.355 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 01:59:51.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:51.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:51.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:51.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:51.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:51.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 01:59:51.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 01:59:51.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:51.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:51.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 01:59:51.360 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 01:59:51.838 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 01:59:51.883 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 01:59:51.884 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 01:59:51.886 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 01:59:51.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:59:51.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:59:51.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:59:51.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 01:59:51.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:59:51.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:59:51.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:59:51.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 01:59:51.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 01:59:52.309 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 01:59:52.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:52.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:52.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:52.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:52.781 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 01:59:53.254 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 01:59:53.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:53.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:53.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:53.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:53.727 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 01:59:54.199 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 01:59:54.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:54.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:54.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:54.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:54.670 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 01:59:54.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 01:59:54.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 01:59:54.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:59:54.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 01:59:55.143 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 01:59:55.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:55.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:55.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:55.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:55.616 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 01:59:55.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 01:59:55.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 01:59:55.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 01:59:55.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 01:59:55.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 01:59:55.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 01:59:55.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 01:59:55.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 01:59:55.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 01:59:55.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 01:59:55.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 01:59:55.636 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 01:59:55.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 01:59:55.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:00.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:00:00.643 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:00:00.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:00.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:00.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:00.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:00.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:00.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:00:00.653 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:00.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:00:00.654 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:00:00.658 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:00:00.658 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:00:00.658 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:00:00.659 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:00.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:00.659 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:00:00.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:00:00.660 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:00:00.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:00.661 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:00:00.661 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:00:00.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:00:00.662 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:00.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:00.662 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:00:00.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:00:00.662 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:00:00.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:00.664 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:00:00.664 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:00:00.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:00:00.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:00.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:00.665 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:00:00.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:00:00.665 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:00:00.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:00.668 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:00:00.668 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:00:00.668 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:00:00.669 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:00.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:00.673 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:00:01.151 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:00:01.193 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:00:01.196 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:00:01.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:00:01.198 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:00:01.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:00:01.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:00:01.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:00:01.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:01.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:00:01.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:00:01.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:00:01.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:00:01.623 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:00:01.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:01.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:01.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:01.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:02.095 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:00:02.568 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:00:02.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:02.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:02.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:02.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:03.041 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:00:03.512 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:00:03.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:03.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:03.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:03.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:03.984 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:00:04.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:00:04.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:00:04.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:04.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:04.456 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:00:04.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:04.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:04.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:04.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:04.929 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:00:05.402 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:00:05.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:05.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:05.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:05.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:05.875 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:00:06.348 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:00:06.820 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:00:07.293 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:00:07.766 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:00:08.238 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:00:08.709 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:00:09.182 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:00:09.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:00:09.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:00:09.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:00:09.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:09.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:09.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:09.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:09.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:09.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:09.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:00:09.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:00:09.292 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:00:09.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:09.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:09.292 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:09.292 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:09.292 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:09.292 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:09.293 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:09.293 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:09.293 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:14.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:00:14.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:00:14.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:14.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:14.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:14.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:14.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:14.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:00:14.304 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:14.304 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:00:14.304 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:00:14.308 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:00:14.308 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:00:14.308 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:00:14.308 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:14.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:14.309 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:00:14.309 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:00:14.309 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:00:14.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:14.313 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:00:14.313 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:00:14.313 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:00:14.313 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:14.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:14.314 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:00:14.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:00:14.314 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:00:14.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:14.317 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:00:14.317 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:00:14.317 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:00:14.317 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:14.317 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:14.318 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:00:14.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:00:14.318 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:00:14.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:14.321 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:00:14.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:00:14.322 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:00:14.322 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:00:14.322 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:00:14.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:14.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:14.327 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:00:14.804 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:00:14.857 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:00:14.860 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:00:14.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:00:14.861 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:00:14.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:00:14.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:00:14.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:00:14.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:14.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:00:14.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:00:14.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:00:14.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:00:15.276 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:00:15.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:15.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:15.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:15.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:15.747 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:00:16.218 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:00:16.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:16.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:16.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:16.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:16.692 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:00:17.164 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:00:17.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:17.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:17.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:17.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:17.636 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:00:17.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:00:17.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:00:17.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:17.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:18.109 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:00:18.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:18.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:18.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:18.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:18.582 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:00:19.054 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:00:19.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:19.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:19.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:19.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:19.525 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:00:19.996 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:00:20.469 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:00:20.941 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:00:21.413 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:00:21.884 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:00:22.358 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:00:22.830 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:00:22.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:00:22.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:00:22.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:00:22.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:22.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:22.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:22.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:22.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:22.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:22.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:00:22.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:00:22.943 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:00:22.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:22.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:22.943 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:22.943 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:22.943 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:22.943 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:22.943 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:22.943 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:22.943 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:27.948 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:00:27.948 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:00:27.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:27.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:27.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:27.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:27.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:27.974 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:00:27.974 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:27.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:00:27.975 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:00:27.982 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:00:27.982 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:00:27.983 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:00:27.983 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:27.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:27.983 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:00:27.984 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:00:27.984 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:00:27.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:27.989 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:00:27.989 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:00:27.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:00:27.990 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:27.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:27.990 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:00:27.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:00:27.990 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:00:27.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:27.996 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:00:27.996 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:00:27.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:00:27.996 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:27.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:27.997 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:00:27.997 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:00:27.997 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:00:27.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:28.003 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:00:28.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:00:28.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:00:28.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:00:28.003 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:28.004 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:00:28.004 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:00:28.005 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:00:28.005 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:00:28.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:28.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:28.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:28.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:00:28.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:28.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:28.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:28.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:28.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:28.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:28.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:28.009 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:00:28.487 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:00:28.538 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:00:28.540 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:00:28.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:00:28.543 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:00:28.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:00:28.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:00:28.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:00:28.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:28.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:00:28.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:00:28.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:00:28.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:00:28.958 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:00:29.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:29.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:29.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:29.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:29.430 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:00:29.904 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:00:30.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:30.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:30.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:30.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:30.376 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:00:30.848 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:00:31.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:31.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:31.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:31.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:31.319 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:00:31.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:00:31.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:00:31.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:31.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:31.792 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:00:32.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:32.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:32.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:32.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:32.265 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:00:32.737 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:00:33.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:33.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:33.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:33.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:33.208 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:00:33.681 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:00:34.154 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:00:34.626 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:00:35.099 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:00:35.572 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:00:36.044 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:00:36.515 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:00:36.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:00:36.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:00:36.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:00:36.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:36.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:36.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:36.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:36.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:36.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:36.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:00:36.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:00:36.626 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:00:36.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:36.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:36.626 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:36.626 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:36.626 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:36.626 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:36.626 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:36.626 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:36.626 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:00:41.631 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:00:41.631 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:00:41.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:41.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:41.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:41.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:41.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:41.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:00:41.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:41.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:00:41.643 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:00:41.645 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:00:41.645 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:00:41.646 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:00:41.646 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:41.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:41.646 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:00:41.646 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:00:41.646 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:00:41.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:41.647 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:00:41.647 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:00:41.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:00:41.647 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:41.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:41.647 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:00:41.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:00:41.647 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:00:41.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:41.649 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:00:41.649 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:00:41.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:00:41.649 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:41.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:41.649 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:00:41.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:00:41.649 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:00:41.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:00:41.651 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:00:41.651 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:00:41.651 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:41.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:41.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:41.656 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:00:42.134 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:00:42.173 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:00:42.174 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:00:42.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:00:42.175 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:00:42.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:00:42.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:00:42.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:00:42.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:42.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:00:42.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:00:42.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:00:42.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:00:42.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:00:42.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:00:42.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:42.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:42.606 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:00:42.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:42.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:42.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:42.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:43.077 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:00:43.548 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:00:43.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:43.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:43.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:43.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:44.022 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:00:44.494 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:00:44.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:44.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:44.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:44.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:44.966 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:00:45.440 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:00:45.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:45.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:45.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:45.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:45.912 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:00:46.384 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:00:46.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:46.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:46.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:46.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:46.855 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:00:47.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:00:47.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:00:47.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:47.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:47.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:47.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:47.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:47.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:47.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:47.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:47.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:00:47.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:00:47.240 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:00:52.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:00:52.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:00:52.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:52.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:52.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:52.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:52.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:52.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:00:52.257 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:52.257 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:00:52.258 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:00:52.262 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:00:52.263 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:00:52.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:00:52.263 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:52.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:52.264 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:00:52.264 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:00:52.264 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:00:52.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:52.268 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:00:52.268 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:00:52.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:00:52.269 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:52.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:52.270 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:00:52.270 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:00:52.270 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:00:52.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:52.274 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:00:52.275 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:00:52.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:00:52.275 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:00:52.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:00:52.276 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:00:52.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:00:52.276 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:00:52.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:52.280 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:00:52.280 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:00:52.281 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:00:52.281 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:52.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:00:52.285 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:00:52.763 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:00:52.803 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:00:52.804 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:00:52.806 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:00:52.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:00:52.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:00:52.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:00:52.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:00:52.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:52.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:00:52.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:00:52.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:00:52.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:00:53.236 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:00:53.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:53.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:53.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:53.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:53.707 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:00:54.180 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:00:54.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:54.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:54.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:54.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:54.652 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:00:55.124 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:00:55.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:55.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:55.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:55.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:55.595 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:00:55.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:00:55.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:00:55.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:55.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:00:56.069 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:00:56.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:56.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:56.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:56.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:56.541 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:00:57.013 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:00:57.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:57.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:57.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:57.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:57.484 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:00:57.957 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:00:58.430 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:00:58.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:00:58.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:00:58.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:00:58.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:00:58.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:00:58.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:00:58.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:00:58.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:00:58.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:00:58.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:00:58.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:00:58.488 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:00:58.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:00:58.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:03.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:01:03.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:01:03.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:03.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:03.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:03.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:03.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:03.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:01:03.494 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:03.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:01:03.494 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:01:03.495 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:01:03.496 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:01:03.496 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:01:03.496 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:03.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:03.496 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:01:03.496 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:01:03.496 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:01:03.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:03.497 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:01:03.497 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:01:03.497 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:01:03.497 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:03.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:03.497 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:01:03.497 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:01:03.497 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:01:03.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:03.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:01:03.498 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:01:03.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:01:03.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:03.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:03.498 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:01:03.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:01:03.498 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:01:03.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:01:03.500 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:01:03.500 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:01:03.500 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:03.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:03.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:03.505 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:01:03.971 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:01:04.015 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:01:04.015 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:01:04.016 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:01:04.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:01:04.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:01:04.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:01:04.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:01:04.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:01:04.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:01:04.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:01:04.018 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:01:04.018 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:01:04.436 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:01:04.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:04.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:04.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:04.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:04.905 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:01:05.376 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:01:05.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:05.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:05.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:05.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:05.847 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:01:06.318 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:01:06.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:06.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:06.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:06.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:06.790 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:01:07.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:01:07.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:01:07.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:01:07.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:07.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:07.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:07.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:07.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:07.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:07.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:07.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:07.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:01:07.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:01:07.115 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:01:07.116 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:07.116 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:07.116 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:07.116 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:07.116 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:07.116 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:07.116 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:07.117 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:07.117 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:07.117 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:07.117 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:07.117 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:07.117 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:12.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:01:12.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:01:12.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:12.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:12.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:12.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:12.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:12.135 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:01:12.135 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:12.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:01:12.136 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:01:12.139 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:01:12.139 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:01:12.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:01:12.139 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:12.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:12.140 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:01:12.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:01:12.140 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:01:12.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:12.142 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:01:12.142 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:01:12.142 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:01:12.142 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:12.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:12.143 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:01:12.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:01:12.143 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:01:12.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:12.144 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:01:12.144 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:01:12.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:01:12.145 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:12.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:12.145 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:01:12.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:01:12.145 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:01:12.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:12.149 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:01:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:01:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:01:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:01:12.149 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:01:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:01:12.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:01:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:01:12.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:01:12.150 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:01:12.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:12.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:12.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:12.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:12.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:12.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:12.150 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:01:12.150 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:01:12.150 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:01:12.150 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:01:12.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:12.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:12.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:12.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:12.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:12.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:12.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:12.155 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:01:12.626 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:01:12.670 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:01:12.671 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:01:12.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:01:12.671 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:01:12.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:01:12.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:01:12.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:01:12.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:01:12.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:01:12.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:01:12.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:01:12.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:01:13.091 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:01:13.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:13.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:13.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:13.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:13.555 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:01:14.018 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:01:14.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:14.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:14.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:14.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:14.485 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:01:14.950 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:01:15.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:15.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:15.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:15.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:15.417 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:01:15.885 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:01:16.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:16.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:16.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:16.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:16.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:01:16.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:01:16.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:01:16.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:16.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:16.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:16.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:16.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:16.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:16.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:01:16.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:01:16.207 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:01:16.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:16.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:21.213 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:01:21.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:01:21.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:21.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:21.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:21.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:21.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:21.230 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:01:21.230 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:21.230 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:01:21.230 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:01:21.237 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:01:21.237 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:01:21.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:01:21.237 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:21.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:21.238 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:01:21.238 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:01:21.238 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:01:21.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:21.241 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:01:21.241 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:01:21.241 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:01:21.241 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:21.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:21.241 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:01:21.242 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:01:21.242 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:01:21.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:21.245 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:01:21.245 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:01:21.245 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:01:21.245 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:21.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:21.245 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:01:21.245 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:01:21.245 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:01:21.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:21.249 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:01:21.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:01:21.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:01:21.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:01:21.249 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:01:21.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:01:21.250 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:01:21.250 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:01:21.250 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:21.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:21.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:21.255 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:01:21.723 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:01:21.772 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:01:21.774 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:01:21.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:01:21.775 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:01:21.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:01:21.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:01:21.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:01:21.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:01:21.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:01:21.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:01:21.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:01:21.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:01:22.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:01:22.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:01:22.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:22.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:22.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:22.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:22.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:22.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:22.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:01:22.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:01:22.047 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:01:22.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:22.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:22.048 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:22.048 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:22.048 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:22.048 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:22.048 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:22.048 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:22.048 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:27.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:01:27.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:01:27.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:27.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:27.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:27.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:27.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:27.068 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:01:27.068 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:27.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:01:27.069 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:01:27.071 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:01:27.071 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:01:27.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:01:27.071 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:27.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:27.071 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:01:27.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:01:27.072 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:01:27.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:27.074 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:01:27.074 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:01:27.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:01:27.074 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:27.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:27.074 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:01:27.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:01:27.074 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:01:27.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:27.076 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:01:27.076 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:01:27.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:01:27.076 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:27.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:27.076 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:01:27.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:01:27.076 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:01:27.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:01:27.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:01:27.079 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:01:27.079 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:27.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:27.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:27.084 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:01:27.549 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:01:27.595 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:01:27.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:01:27.596 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:01:27.596 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:01:27.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:01:27.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:01:27.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:01:27.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:01:27.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:01:27.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:01:27.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:01:27.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:01:27.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:01:27.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:01:27.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:27.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:27.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:27.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:27.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:27.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:27.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:27.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:27.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:01:27.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:01:27.830 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:01:27.830 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=164 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:27.830 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=164 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:27.830 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=164 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:27.830 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=164 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:27.830 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:27.830 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:27.830 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:01:32.828 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:01:32.828 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:01:32.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:32.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:32.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:32.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:32.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:32.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:01:32.831 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:32.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:01:32.831 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:01:32.832 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:01:32.832 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:01:32.832 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:01:32.832 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:32.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:32.832 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:01:32.832 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:01:32.832 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:01:32.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:32.834 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:01:32.834 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:01:32.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:01:32.834 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:32.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:32.834 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:01:32.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:01:32.834 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:01:32.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:32.835 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:01:32.835 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:01:32.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:01:32.835 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:32.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:32.835 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:01:32.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:01:32.835 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:01:32.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:01:32.837 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:01:32.837 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:01:32.837 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:01:32.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:32.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:32.842 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:01:33.308 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:01:33.349 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:01:33.350 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:01:33.350 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:01:33.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:01:33.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:01:33.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:01:33.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:01:33.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:01:33.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:01:33.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:01:33.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:01:33.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:01:33.772 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:01:33.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:33.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:33.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:33.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:34.239 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:01:34.706 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:01:34.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:34.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:34.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:34.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:35.173 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:01:35.638 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:01:35.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:35.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:35.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:35.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:36.102 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:01:36.568 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:01:36.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:36.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:36.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:36.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:37.034 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:01:37.500 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:01:37.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:37.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:37.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:37.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:37.970 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:01:38.442 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:01:38.913 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:01:39.379 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:01:39.846 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:01:40.311 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:01:40.776 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:01:41.246 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:01:41.719 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:01:42.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:01:42.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:01:42.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:42.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:42.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:42.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:42.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:42.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:42.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:01:42.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:01:42.063 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:01:42.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:42.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:47.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:01:47.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:01:47.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:47.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:47.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:47.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:47.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:47.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:01:47.086 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:47.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:01:47.086 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:01:47.088 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:01:47.088 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:01:47.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:01:47.088 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:47.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:47.088 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:01:47.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:01:47.088 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:01:47.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:47.090 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:01:47.090 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:01:47.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:01:47.090 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:47.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:47.090 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:01:47.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:01:47.090 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:01:47.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:47.092 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:01:47.092 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:01:47.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:01:47.093 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:01:47.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:01:47.093 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:01:47.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:01:47.093 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:01:47.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:47.096 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:01:47.096 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:01:47.096 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:01:47.097 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:01:47.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:01:47.101 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:01:47.570 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:01:47.618 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:01:47.619 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:01:47.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:01:47.620 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:01:47.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:01:47.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:01:47.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:01:47.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:01:47.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:01:47.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:01:47.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:01:47.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:01:48.038 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:01:48.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:48.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:48.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:48.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:48.506 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:01:48.970 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:01:49.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:49.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:49.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:49.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:49.437 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:01:49.900 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:01:50.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:50.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:50.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:50.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:50.369 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:01:50.838 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:01:51.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:51.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:51.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:51.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:51.310 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:01:51.782 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:01:52.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:52.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:52.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:52.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:52.256 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:01:52.728 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:01:53.200 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:01:53.671 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:01:54.144 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:01:54.617 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:01:55.089 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:01:55.560 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:01:56.034 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:01:56.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:01:56.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:01:56.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:01:56.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:01:56.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:01:56.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:01:56.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:01:56.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:01:56.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:01:56.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:01:56.373 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:01:56.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:01:56.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:01.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:02:01.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:02:01.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:01.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:01.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:01.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:01.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:01.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:02:01.382 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:01.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:02:01.382 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:02:01.383 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:02:01.384 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:02:01.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:02:01.384 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:01.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:01.384 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:02:01.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:02:01.384 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:02:01.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:01.385 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:02:01.385 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:02:01.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:02:01.385 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:01.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:01.385 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:02:01.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:02:01.385 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:02:01.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:01.386 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:02:01.386 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:02:01.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:02:01.386 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:01.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:01.386 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:02:01.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:02:01.386 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:02:01.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:01.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:02:01.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:02:01.388 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:02:01.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:01.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:01.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:02:01.871 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:02:01.908 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:02:01.909 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:02:01.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:02:01.910 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:02:01.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:02:01.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:02:01.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:02:01.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:02:01.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:02:01.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:02:01.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:02:01.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:02:02.340 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:02:02.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:02.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:02.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:02.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:02.806 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:02:03.270 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:02:03.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:03.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:03.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:03.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:03.733 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:02:04.197 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:02:04.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:04.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:04.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:04.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:04.660 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:02:04.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:02:04.978 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:02:04.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:02:04.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:02:04.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:02:05.029 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:02:05.066 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:02:05.107 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:02:05.124 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:02:05.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:05.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:05.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:05.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:05.588 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:02:06.050 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:02:06.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:02:06.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:02:06.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:02:06.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:06.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:06.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:06.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:06.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:06.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:06.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:02:06.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:02:06.129 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:02:06.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:06.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:11.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:02:11.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:02:11.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:11.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:11.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:11.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:11.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:11.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:02:11.150 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:11.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:02:11.150 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:02:11.152 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:02:11.152 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:02:11.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:02:11.153 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:11.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:11.153 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:02:11.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:02:11.154 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:02:11.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:11.155 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:02:11.155 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:02:11.155 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:02:11.155 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:11.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:11.155 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:02:11.155 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:02:11.155 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:02:11.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:11.156 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:02:11.156 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:02:11.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:02:11.157 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:11.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:11.157 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:02:11.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:02:11.157 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:02:11.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:11.158 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:02:11.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:02:11.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:02:11.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:02:11.159 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:02:11.159 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:02:11.159 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:11.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:11.163 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:02:11.638 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:02:11.680 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:02:11.682 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:02:11.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:02:11.683 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:02:12.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:12.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:12.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:12.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:12.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:12.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:12.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:12.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:12.055 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:02:12.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:02:12.055 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:02:12.055 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=194 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:02:12.055 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=194 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:02:12.055 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=194 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:02:12.056 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=194 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:02:12.056 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=194 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:02:12.056 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=194 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:02:12.056 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=194 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:02:17.053 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:02:17.053 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:02:17.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:17.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:17.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:17.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:17.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:17.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:02:17.056 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:17.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:02:17.056 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:02:17.057 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:02:17.057 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:02:17.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:02:17.057 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:17.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:17.057 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:02:17.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:02:17.058 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:02:17.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:17.058 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:02:17.058 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:02:17.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:02:17.059 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:17.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:17.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:02:17.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:02:17.059 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:02:17.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:17.060 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:02:17.060 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:02:17.060 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:02:17.060 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:17.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:17.060 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:02:17.060 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:02:17.060 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:02:17.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:02:17.062 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:02:17.062 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:02:17.062 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:17.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:17.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:17.067 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:02:17.533 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:02:17.573 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:02:17.574 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:02:17.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:02:17.575 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:02:17.997 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:02:18.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:18.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:18.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:18.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:18.463 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:02:18.929 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:02:19.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:19.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:19.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:19.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:19.396 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:02:19.863 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:02:20.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:20.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:20.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:20.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:20.329 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:02:20.794 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:02:21.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:21.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:21.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:21.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:21.256 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:02:21.721 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:02:22.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:22.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:22.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:22.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:22.187 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:02:22.654 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:02:23.121 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:02:23.588 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:02:24.055 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:02:24.522 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:02:24.989 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:02:25.456 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:02:25.923 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:02:26.390 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:02:26.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:02:26.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:26.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:26.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:26.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:26.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:26.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:26.587 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:02:26.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:02:26.587 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:02:26.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:26.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:31.589 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:02:31.589 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:02:31.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:31.589 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:31.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:31.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:31.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:31.592 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:02:31.593 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:31.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:02:31.593 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:02:31.594 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:02:31.594 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:02:31.594 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:02:31.594 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:31.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:31.594 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:02:31.594 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:02:31.594 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:02:31.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:31.595 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:02:31.595 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:02:31.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:02:31.595 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:31.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:31.595 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:02:31.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:02:31.595 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:02:31.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:31.597 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:02:31.597 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:02:31.597 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:02:31.597 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:31.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:31.597 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:02:31.597 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:02:31.597 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:02:31.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:31.599 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:02:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:02:31.599 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:02:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:02:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:02:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:02:31.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:02:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:02:31.599 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:02:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:02:31.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:31.599 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:02:31.599 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:02:31.600 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:02:31.600 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:31.604 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:02:32.070 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:02:32.118 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:02:32.119 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:02:32.120 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:02:32.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:02:32.534 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:02:32.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:32.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:32.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:32.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:32.998 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:02:33.463 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:02:33.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:33.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:33.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:33.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:33.928 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:02:34.392 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:02:34.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:34.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:34.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:34.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:34.858 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:02:35.325 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:02:35.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:35.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:35.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:35.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:35.790 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:02:36.256 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:02:36.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:36.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:36.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:36.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:36.723 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:02:37.190 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:02:37.654 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:02:38.125 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:02:38.597 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:02:39.069 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:02:39.543 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:02:40.015 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:02:40.487 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:02:40.960 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:02:41.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:02:41.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:41.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:41.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:41.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:41.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:41.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:41.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:02:41.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:02:41.148 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:02:41.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:41.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:46.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:02:46.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:02:46.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:46.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:46.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:46.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:46.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:46.163 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:02:46.163 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:46.163 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:02:46.163 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:02:46.165 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:02:46.166 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:02:46.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:02:46.166 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:46.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:46.167 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:02:46.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:02:46.167 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:02:46.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:46.168 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:02:46.168 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:02:46.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:02:46.168 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:46.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:46.168 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:02:46.169 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:02:46.169 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:02:46.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:46.170 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:02:46.170 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:02:46.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:02:46.170 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:46.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:46.171 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:02:46.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:02:46.171 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:02:46.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:46.173 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:02:46.173 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:02:46.173 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:02:46.173 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:46.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:46.178 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:02:46.655 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:02:46.698 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:02:46.700 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:02:46.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:02:46.702 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:02:47.127 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:02:47.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:47.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:47.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:47.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:47.603 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:02:48.075 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:02:48.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:48.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:48.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:48.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:48.550 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:02:49.022 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:02:49.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:49.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:49.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:49.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:49.496 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:02:49.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:02:49.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:49.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:49.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:49.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:49.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:49.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:49.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:02:49.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:02:49.728 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:02:49.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:49.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:49.728 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=767 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:02:49.728 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=767 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:02:49.728 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=767 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:02:49.728 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=767 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:02:49.728 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=767 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:02:49.728 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=767 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:02:49.728 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=767 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:02:54.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:02:54.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:02:54.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:54.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:54.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:54.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:54.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:54.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:02:54.746 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:54.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:02:54.747 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:02:54.753 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:02:54.754 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:02:54.755 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:02:54.755 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:54.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:54.756 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:02:54.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:02:54.757 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:02:54.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:54.760 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:02:54.760 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:02:54.761 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:02:54.761 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:54.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:54.761 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:02:54.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:02:54.762 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:02:54.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:54.765 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:02:54.765 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:02:54.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:02:54.765 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:02:54.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:02:54.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:02:54.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:02:54.766 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:02:54.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:54.770 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:02:54.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:02:54.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:02:54.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:02:54.770 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:02:54.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:02:54.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:02:54.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:54.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:02:54.771 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:02:54.771 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:02:54.771 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:54.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:54.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:02:54.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:02:55.254 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:02:55.300 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:02:55.302 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:02:55.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:02:55.305 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:02:55.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:02:55.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:02:55.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:02:55.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:02:55.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:02:55.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:02:55.332 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:02:55.332 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:02:55.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:02:55.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:02:55.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:02:55.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:02:55.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:02:55.726 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:02:55.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:02:55.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:02:55.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:02:55.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:02:55.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:02:55.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:02:55.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:02:55.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:02:55.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:02:55.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:02:55.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:02:55.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:02:55.748 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:02:55.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:02:55.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:00.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:00.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:00.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:00.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:00.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:00.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:00.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:00.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:00.763 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:00.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:00.763 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:03:00.766 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:03:00.766 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:03:00.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:00.766 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:00.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:00.766 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:03:00.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:00.767 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:03:00.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:00.769 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:03:00.770 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:03:00.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:00.770 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:00.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:00.770 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:03:00.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:00.770 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:03:00.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:00.773 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:03:00.773 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:03:00.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:00.773 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:00.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:00.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:03:00.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:00.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:03:00.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:00.777 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:03:00.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:03:00.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:03:00.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:03:00.777 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:03:00.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:03:00.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:03:00.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:03:00.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:00.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:03:00.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:00.777 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:03:00.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:00.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:03:00.778 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:03:00.778 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:03:00.778 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:00.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:00.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:00.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:00.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:00.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:00.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:00.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:00.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:00.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:00.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:00.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:00.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:00.782 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:03:01.261 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:03:01.302 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:03:01.303 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:03:01.304 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:03:01.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:03:01.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:01.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:01.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:01.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:01.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:01.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:01.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:01.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:01.320 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:03:01.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:01.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:06.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:06.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:06.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:06.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:06.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:06.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:06.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:06.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:06.335 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:06.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:06.336 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:03:06.341 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:03:06.341 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:03:06.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:06.342 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:06.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:06.343 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:03:06.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:06.343 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:03:06.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:06.346 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:03:06.346 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:03:06.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:06.346 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:06.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:06.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:03:06.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:06.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:03:06.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:06.350 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:03:06.350 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:03:06.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:06.350 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:06.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:06.351 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:03:06.351 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:06.351 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:03:06.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:06.354 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:06.355 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:03:06.355 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:03:06.355 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:03:06.355 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:06.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:06.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:06.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:06.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:06.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:06.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:06.360 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:03:06.838 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:03:06.879 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:03:06.879 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:03:06.881 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:03:06.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:03:07.310 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:03:07.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:07.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:07.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:07.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:07.784 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:03:08.256 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:03:08.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:08.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:08.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:08.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:08.728 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:03:08.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:08.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:08.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:08.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:08.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:08.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:08.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:08.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:08.898 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:03:08.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:08.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:13.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:13.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:13.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:13.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:13.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:13.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:13.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:13.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:13.914 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:13.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:13.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:03:13.918 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:03:13.918 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:03:13.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:13.919 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:13.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:13.920 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:03:13.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:13.920 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:03:13.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:13.922 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:03:13.922 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:03:13.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:13.922 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:13.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:13.922 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:03:13.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:13.922 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:03:13.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:13.924 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:03:13.924 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:03:13.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:13.925 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:13.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:13.925 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:03:13.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:13.925 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:03:13.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:03:13.928 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:03:13.928 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:03:13.928 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:03:13.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:13.933 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:03:14.411 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:03:14.451 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:03:14.453 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:03:14.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:03:14.455 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:03:14.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:03:14.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:03:14.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:03:14.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:03:14.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:03:14.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:03:14.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:03:14.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:03:14.883 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:03:14.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:14.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:14.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:14.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:15.355 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:03:15.828 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:03:15.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:15.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:15.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:15.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:16.300 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:03:16.772 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:03:16.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:16.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:16.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:16.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:17.243 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:03:17.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:03:17.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:03:17.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:17.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:17.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:17.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:17.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:17.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:17.269 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:17.269 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:17.269 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:03:17.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:17.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:22.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:22.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:22.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:22.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:22.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:22.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:22.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:22.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:22.276 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:22.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:22.276 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:03:22.277 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:03:22.277 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:03:22.277 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:22.277 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:22.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:22.277 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:03:22.277 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:22.277 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:03:22.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:22.278 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:03:22.278 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:03:22.278 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:22.278 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:22.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:22.278 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:03:22.278 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:22.278 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:03:22.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:22.279 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:03:22.279 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:03:22.280 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:22.280 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:22.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:22.280 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:03:22.280 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:22.280 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:03:22.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:22.281 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:03:22.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:03:22.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:03:22.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:03:22.281 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:03:22.282 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:03:22.282 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:03:22.282 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:22.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:22.286 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:03:22.765 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:03:22.803 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:03:22.804 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:03:22.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:03:22.806 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:03:22.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:03:22.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:03:22.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:03:22.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:03:22.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:03:22.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:03:22.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:03:22.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:03:23.237 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:03:23.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:23.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:23.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:23.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:23.709 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:03:24.181 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:03:24.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:24.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:24.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:24.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:24.654 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:03:24.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:03:24.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:03:24.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:24.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:24.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:24.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:24.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:24.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:24.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:24.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:24.918 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:03:24.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:24.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:24.919 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:24.919 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:24.919 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:24.919 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:24.919 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:24.919 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:24.919 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:29.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:29.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:29.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:29.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:29.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:29.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:29.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:29.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:29.932 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:29.933 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:29.933 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:03:29.936 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:03:29.936 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:03:29.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:29.937 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:29.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:29.937 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:03:29.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:29.938 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:03:29.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:29.939 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:03:29.939 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:03:29.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:29.940 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:29.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:29.940 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:03:29.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:29.940 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:03:29.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:29.942 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:03:29.942 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:03:29.942 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:29.942 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:29.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:29.942 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:03:29.943 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:29.943 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:03:29.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:29.945 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:03:29.946 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:03:29.946 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:03:29.946 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:29.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:29.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:29.951 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:03:30.429 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:03:30.467 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:03:30.470 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:03:30.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:03:30.472 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:03:30.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:03:30.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:03:30.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:03:30.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:03:30.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:03:30.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:03:30.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:03:30.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:03:30.901 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:03:30.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:30.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:30.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:30.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:31.372 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:03:31.846 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:03:31.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:31.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:31.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:31.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:32.318 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:03:32.790 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:03:32.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:32.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:32.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:32.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:33.261 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:03:33.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:03:33.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:03:33.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:33.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:33.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:33.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:33.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:33.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:33.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:33.288 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:33.288 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:03:33.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:33.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:33.288 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=722 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:33.288 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:33.288 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:33.288 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:33.288 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:33.288 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:33.288 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:38.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:38.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:38.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:38.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:38.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:38.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:38.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:38.300 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:38.300 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:38.301 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:38.301 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:03:38.304 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:03:38.305 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:03:38.305 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:38.305 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:38.305 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:38.306 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:03:38.306 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:38.306 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:03:38.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:38.307 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:03:38.308 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:03:38.308 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:38.308 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:38.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:38.308 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:03:38.308 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:38.308 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:03:38.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:38.310 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:03:38.311 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:03:38.311 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:38.311 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:38.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:38.311 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:03:38.311 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:38.311 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:03:38.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:38.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:03:38.315 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:03:38.315 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:03:38.315 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:38.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:38.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:38.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:38.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:38.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:38.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:38.319 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:03:38.798 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:03:38.838 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:03:38.839 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:03:38.841 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:03:38.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:03:38.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:03:38.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:03:38.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:03:38.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:03:38.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:03:38.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:03:38.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:03:38.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:03:39.269 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:03:39.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:39.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:39.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:39.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:39.741 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:03:40.214 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:03:40.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:40.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:40.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:40.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:40.687 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:03:40.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:03:40.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:03:40.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:40.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:40.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:40.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:40.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:40.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:40.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:40.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:40.950 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:03:40.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:40.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:40.951 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:40.951 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:40.951 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:40.951 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:40.951 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:40.951 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:40.951 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:45.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:45.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:45.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:45.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:45.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:45.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:45.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:45.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:45.965 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:45.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:45.965 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:03:45.968 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:03:45.968 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:03:45.968 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:45.969 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:45.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:45.969 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:03:45.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:45.969 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:03:45.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:45.971 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:03:45.971 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:03:45.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:45.971 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:45.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:45.971 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:03:45.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:45.971 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:03:45.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:45.973 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:03:45.973 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:03:45.973 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:45.973 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:45.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:45.973 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:03:45.973 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:45.973 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:03:45.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:03:45.976 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:03:45.976 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:03:45.976 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:45.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:45.981 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:03:46.458 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:03:46.497 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:03:46.497 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:03:46.498 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:03:46.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:03:46.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:03:46.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:03:46.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:03:46.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:03:46.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:03:46.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:03:46.507 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:03:46.507 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:03:46.930 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:03:46.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:46.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:46.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:46.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:47.402 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:03:47.875 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:03:47.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:47.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:47.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:47.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:48.347 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:03:48.819 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:03:48.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:48.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:48.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:48.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:49.290 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:03:49.764 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:03:49.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:49.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:49.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:49.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:50.236 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:03:50.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:03:50.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:03:50.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:50.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:50.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:50.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:50.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:50.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:50.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:50.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:50.260 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:50.260 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:50.260 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:03:55.267 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:55.267 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:55.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:55.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:55.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:55.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:55.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:55.277 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:55.277 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:55.277 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:03:55.277 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:03:55.279 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:03:55.279 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:03:55.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:55.280 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:55.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:55.280 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:03:55.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:03:55.280 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:03:55.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:55.282 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:03:55.282 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:03:55.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:55.283 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:55.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:55.283 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:03:55.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:03:55.283 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:03:55.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:55.285 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:03:55.286 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:03:55.286 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:55.286 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:03:55.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:55.286 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:03:55.286 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:03:55.286 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:03:55.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:55.289 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:03:55.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:03:55.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:03:55.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:03:55.289 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:03:55.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:03:55.290 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:03:55.290 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:03:55.290 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:55.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:03:55.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:03:55.295 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:03:55.773 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:03:55.818 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:03:55.820 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:03:55.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:03:55.822 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:03:55.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:03:55.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:03:55.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:03:55.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:03:55.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:03:55.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:03:55.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:03:55.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:03:56.245 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:03:56.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:56.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:56.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:56.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:56.716 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:03:57.190 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:03:57.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:57.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:57.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:57.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:57.662 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:03:58.134 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:03:58.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:58.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:58.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:58.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:58.605 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:03:59.079 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:03:59.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:59.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:59.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:59.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:59.551 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:03:59.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:03:59.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:03:59.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:03:59.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:03:59.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:03:59.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:03:59.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:03:59.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:03:59.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:03:59.818 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:03:59.818 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:03:59.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:03:59.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:03:59.819 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=977 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:59.819 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=977 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:59.819 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=977 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:59.819 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=977 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:59.820 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=977 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:59.820 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=977 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:03:59.820 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=977 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:04.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:04.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:04.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:04.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:04.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:04.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:04.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:04.829 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:04.829 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:04.830 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:04.830 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:04:04.836 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:04:04.836 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:04:04.836 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:04.836 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:04.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:04.837 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:04:04.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:04.837 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:04:04.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:04.840 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:04:04.840 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:04:04.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:04.841 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:04.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:04.841 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:04:04.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:04.841 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:04:04.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:04.844 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:04:04.844 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:04:04.844 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:04.844 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:04.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:04.844 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:04:04.844 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:04.844 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:04:04.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:04.848 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:04:04.849 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:04:04.849 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:04:04.849 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:04.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:04.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:04.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:04.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:04.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:04.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:04.853 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:04:05.331 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:04:05.376 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:04:05.378 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:04:05.380 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:04:05.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:05.803 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:04:05.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:05.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:05.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:05.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:06.277 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:04:06.749 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:04:06.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:06.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:06.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:06.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:07.221 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:04:07.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:07.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:07.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:07.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:07.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:07.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:07.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:07.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:07.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:07.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:07.402 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:04:07.402 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=551 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:07.402 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=551 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:07.402 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=551 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:07.402 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=551 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:07.402 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=551 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:07.402 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=551 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:07.403 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=551 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:12.404 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:12.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:12.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:12.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:12.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:12.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:12.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:12.411 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:12.411 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:12.412 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:12.412 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:04:12.414 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:04:12.414 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:04:12.415 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:12.415 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:12.415 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:12.415 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:04:12.415 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:12.415 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:04:12.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:12.417 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:04:12.417 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:04:12.417 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:12.417 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:12.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:12.418 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:04:12.418 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:12.418 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:04:12.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:12.419 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:04:12.420 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:04:12.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:12.420 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:12.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:12.420 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:04:12.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:12.420 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:04:12.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:12.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:12.425 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:04:12.425 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:04:12.425 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:04:12.425 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:04:12.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:12.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:12.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:12.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:04:12.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:12.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:12.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:12.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:12.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:12.429 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:04:12.906 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:04:12.957 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:04:12.959 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:04:12.961 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:04:12.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:12.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:04:12.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:04:12.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:04:12.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:12.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:13.376 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:04:13.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:13.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:13.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:13.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:13.848 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:04:14.320 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:04:14.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:14.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:14.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:14.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:14.792 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:04:15.255 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:04:15.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:15.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:15.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:15.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:15.727 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:04:16.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:16.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:16.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:16.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:16.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:16.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:16.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:16.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:16.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:16.014 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:16.014 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:16.014 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:04:16.014 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=778 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:16.014 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=778 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:16.014 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=778 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:16.014 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=778 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:16.014 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=778 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:16.014 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=778 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:16.014 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=778 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:21.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:21.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:21.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:21.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:21.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:21.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:21.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:21.028 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:21.029 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:21.029 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:21.029 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:04:21.032 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:04:21.032 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:04:21.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:21.033 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:21.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:21.034 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:04:21.034 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:21.034 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:04:21.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:21.036 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:04:21.037 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:04:21.037 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:21.037 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:21.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:21.038 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:04:21.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:21.039 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:04:21.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:21.041 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:04:21.041 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:04:21.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:21.041 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:21.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:21.041 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:04:21.042 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:21.042 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:04:21.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:21.046 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:04:21.046 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:04:21.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:04:21.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:04:21.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:21.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:04:21.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:04:21.047 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:04:21.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:21.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:21.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:21.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:21.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:21.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:21.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:21.047 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:04:21.047 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:04:21.047 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:04:21.048 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:04:21.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:21.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:21.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:21.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:04:21.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:21.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:21.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:21.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:21.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:21.052 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:04:21.531 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:04:21.581 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:04:21.584 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:04:21.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:21.586 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:04:21.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:04:21.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:04:21.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:04:21.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:21.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:21.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:21.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:21.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:21.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:21.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:21.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:21.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:21.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:21.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:21.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:21.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:21.630 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:04:21.630 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:21.630 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:21.630 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:21.630 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:21.630 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:21.630 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:21.630 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:26.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:26.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:26.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:26.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:26.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:26.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:26.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:26.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:26.640 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:26.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:26.641 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:04:26.643 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:04:26.643 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:04:26.644 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:26.644 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:26.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:26.644 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:04:26.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:26.645 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:04:26.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:26.646 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:04:26.646 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:04:26.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:26.646 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:26.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:26.646 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:04:26.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:26.647 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:04:26.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:26.648 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:04:26.649 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:04:26.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:26.649 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:26.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:26.649 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:04:26.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:26.649 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:04:26.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:26.651 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:04:26.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:04:26.652 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:04:26.652 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:04:26.652 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:26.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:26.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:26.657 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:04:27.135 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:04:27.181 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:04:27.183 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:04:27.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:27.185 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:04:27.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:04:27.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:04:27.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:04:27.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:27.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:27.607 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:04:27.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:27.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:27.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:27.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:28.083 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:04:28.555 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:04:28.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:28.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:28.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:28.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:29.030 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:04:29.502 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:04:29.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:29.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:29.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:29.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:29.976 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:04:30.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:30.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:30.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:30.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:30.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:30.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:30.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:30.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:30.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:30.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:30.242 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:30.242 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:30.242 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:04:30.242 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=774 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:30.243 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=774 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:30.243 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=774 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:30.243 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:30.243 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:30.243 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:30.243 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:35.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:35.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:35.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:35.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:35.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:35.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:35.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:35.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:35.260 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:35.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:35.261 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:04:35.266 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:04:35.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:04:35.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:35.266 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:35.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:35.267 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:04:35.267 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:35.267 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:04:35.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:35.270 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:04:35.270 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:04:35.270 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:35.270 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:35.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:35.271 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:04:35.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:35.271 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:04:35.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:35.273 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:04:35.274 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:04:35.274 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:35.274 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:35.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:35.274 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:04:35.274 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:35.274 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:04:35.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:35.277 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:04:35.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:04:35.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:04:35.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:04:35.277 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:04:35.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:04:35.278 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:04:35.278 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:04:35.278 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:35.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:35.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:35.283 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:04:35.760 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:04:35.799 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:04:35.800 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:04:35.802 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:04:35.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:35.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:04:35.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:04:35.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:04:35.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:35.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:35.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:35.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:35.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:35.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:35.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:35.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:35.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:35.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:35.836 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:35.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:35.836 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:04:35.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:35.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:35.837 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:35.837 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:35.837 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:35.837 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:35.837 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:35.837 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:35.837 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:40.840 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:40.840 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:40.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:40.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:40.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:40.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:40.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:40.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:40.855 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:40.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:40.855 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:04:40.857 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:04:40.858 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:04:40.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:40.858 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:40.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:40.858 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:04:40.859 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:40.859 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:04:40.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:40.860 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:04:40.860 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:04:40.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:40.860 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:40.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:40.860 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:04:40.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:40.860 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:04:40.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:40.861 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:04:40.861 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:04:40.861 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:40.861 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:40.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:40.862 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:04:40.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:40.862 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:04:40.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:40.863 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:04:40.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:04:40.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:04:40.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:04:40.864 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:04:40.864 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:04:40.864 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:40.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:40.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:40.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:40.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:40.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:40.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:40.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:40.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:40.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:40.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:40.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:40.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:40.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:40.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:40.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:40.869 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:04:41.346 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:04:41.387 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:04:41.390 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:04:41.392 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:04:41.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:41.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:41.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:41.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:41.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:41.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:41.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:41.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:41.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:41.412 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:04:41.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:41.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:41.412 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:41.412 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:41.412 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:41.412 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:41.412 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:41.412 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:41.412 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:46.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:46.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:46.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:46.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:46.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:46.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:46.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:46.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:46.424 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:46.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:46.424 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:04:46.428 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:04:46.428 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:04:46.428 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:46.428 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:46.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:46.429 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:04:46.430 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:46.430 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:04:46.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:46.431 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:04:46.431 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:04:46.431 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:46.431 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:46.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:46.432 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:04:46.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:46.432 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:04:46.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:46.434 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:04:46.434 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:04:46.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:46.434 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:46.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:46.434 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:04:46.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:46.435 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:04:46.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:46.438 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:04:46.438 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:04:46.438 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:04:46.439 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:04:46.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:46.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:46.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:46.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:04:46.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:46.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:46.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:46.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:46.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:46.443 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:04:46.920 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:04:46.968 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:04:46.970 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:04:46.973 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:04:46.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:46.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:46.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:46.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:46.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:46.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:46.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:46.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:46.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:46.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:46.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:46.987 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:04:46.987 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:46.987 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:46.987 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:46.987 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:46.987 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:51.992 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:51.992 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:51.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:51.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:51.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:51.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:52.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:52.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:52.004 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:52.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:52.005 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:04:52.007 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:04:52.007 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:04:52.008 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:52.008 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:52.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:52.009 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:04:52.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:52.010 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:04:52.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:52.012 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:04:52.012 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:04:52.012 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:52.012 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:52.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:52.013 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:04:52.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:52.013 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:04:52.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:52.016 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:04:52.016 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:04:52.016 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:52.017 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:52.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:52.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:04:52.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:52.017 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:04:52.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:52.022 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:04:52.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:04:52.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:04:52.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:04:52.022 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:04:52.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:04:52.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:04:52.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:52.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:04:52.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:04:52.023 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:04:52.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:52.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:52.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:52.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:52.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:52.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:52.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:52.023 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:04:52.023 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:04:52.023 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:04:52.023 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:04:52.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:52.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:52.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:52.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:04:52.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:52.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:52.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:52.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:52.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:52.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:52.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:52.028 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:04:52.504 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:04:52.559 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:04:52.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:52.563 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:04:52.565 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:04:52.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:52.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:52.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:52.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:52.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:52.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:52.582 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:52.582 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:52.582 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:04:52.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:52.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:52.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:52.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:52.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:52.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:52.584 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:52.584 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:52.584 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:57.587 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:57.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:57.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:57.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:57.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:57.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:57.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:57.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:57.598 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:57.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:04:57.599 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:04:57.603 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:04:57.603 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:04:57.604 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:57.604 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:57.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:57.605 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:04:57.605 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:04:57.605 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:04:57.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:57.607 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:04:57.608 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:04:57.608 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:57.608 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:57.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:57.609 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:04:57.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:04:57.609 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:04:57.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:57.611 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:04:57.611 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:04:57.611 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:57.611 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:04:57.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:57.611 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:04:57.611 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:04:57.611 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:04:57.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:57.615 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:04:57.615 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:04:57.616 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:04:57.616 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:57.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:57.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:57.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:04:57.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:57.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:57.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:57.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:04:57.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:57.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:04:57.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:04:57.620 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:04:58.098 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:04:58.139 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:04:58.141 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:04:58.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:04:58.145 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:04:58.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:04:58.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:04:58.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:04:58.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:04:58.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:04:58.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:04:58.163 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:04:58.163 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:04:58.163 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:04:58.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:04:58.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:04:58.163 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:58.164 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:58.164 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:58.164 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:58.164 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:58.164 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:04:58.164 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:03.166 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:03.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:03.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:03.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:03.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:03.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:03.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:03.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:03.176 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:03.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:03.177 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:05:03.181 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:05:03.181 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:05:03.182 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:03.182 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:03.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:03.183 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:05:03.183 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:03.183 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:05:03.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:03.185 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:05:03.185 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:05:03.186 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:03.186 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:03.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:03.186 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:05:03.186 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:03.186 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:05:03.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:03.188 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:05:03.188 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:05:03.188 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:03.188 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:03.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:03.188 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:05:03.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:03.189 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:05:03.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:05:03.192 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:05:03.192 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:05:03.192 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:05:03.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:03.197 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:05:03.675 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:05:03.721 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:05:03.723 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:05:03.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:03.724 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:05:04.147 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:05:04.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:04.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:04.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:04.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:04.621 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:05:05.093 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:05:05.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:05.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:05.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:05.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:05.565 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:05:06.040 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:05:06.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:06.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:06.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:06.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:06.517 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:05:06.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:05:06.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:05:06.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:05:06.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:05:06.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:05:06.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:05:06.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:05:06.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:05:06.989 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:05:07.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:07.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:07.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:07.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:07.460 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:05:07.931 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:05:08.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:08.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:08.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:08.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:08.404 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:05:08.877 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:05:09.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:05:09.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:05:09.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:09.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:09.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:09.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:09.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:09.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:09.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:09.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:09.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:09.005 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:05:09.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:09.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:14.012 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:14.012 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:14.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:14.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:14.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:14.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:14.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:14.028 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:14.028 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:14.028 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:14.028 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:05:14.030 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:05:14.031 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:05:14.031 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:14.031 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:14.031 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:14.031 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:05:14.031 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:14.032 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:05:14.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:14.033 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:05:14.033 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:05:14.033 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:14.033 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:14.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:14.033 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:05:14.033 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:14.033 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:05:14.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:14.034 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:05:14.034 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:05:14.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:14.034 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:14.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:14.035 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:05:14.035 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:14.035 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:05:14.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:14.036 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:05:14.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:05:14.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:05:14.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:05:14.037 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:05:14.037 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:05:14.037 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:14.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:14.042 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:05:14.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:05:14.561 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:05:14.563 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:05:14.564 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:05:14.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:14.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:05:14.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:05:14.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:05:14.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:14.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:14.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:14.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:14.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:14.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:14.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:14.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:14.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:14.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:14.603 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:05:14.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:14.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:14.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:14.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:14.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:14.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:14.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:14.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:14.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:14.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:14.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:14.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:19.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:19.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:19.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:19.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:19.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:19.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:19.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:19.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:19.613 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:19.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:19.613 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:05:19.616 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:05:19.616 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:05:19.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:19.616 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:19.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:19.617 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:05:19.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:19.617 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:05:19.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:19.619 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:05:19.619 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:05:19.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:19.619 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:19.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:19.619 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:05:19.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:19.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:05:19.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:19.621 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:05:19.621 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:05:19.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:19.621 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:19.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:19.622 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:05:19.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:19.622 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:05:19.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:19.626 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:19.628 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:05:19.628 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:05:19.628 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:05:19.628 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:05:19.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:19.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:19.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:19.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:05:19.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:19.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:19.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:19.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:19.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:19.632 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:05:20.109 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:05:20.170 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:05:20.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:20.173 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:05:20.175 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:05:20.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:05:20.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:05:20.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:05:20.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:20.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:20.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:20.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:20.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:20.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:20.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:20.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:20.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:20.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:20.219 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:20.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:20.220 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:05:20.220 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:20.220 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:20.220 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:20.220 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:25.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:25.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:25.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:25.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:25.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:25.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:25.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:25.227 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:25.227 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:25.227 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:25.227 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:05:25.229 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:05:25.229 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:05:25.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:25.230 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:25.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:25.230 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:05:25.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:25.231 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:05:25.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:25.232 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:05:25.233 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:05:25.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:25.233 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:25.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:25.233 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:05:25.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:25.233 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:05:25.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:25.236 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:05:25.236 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:05:25.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:25.236 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:25.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:25.236 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:05:25.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:25.236 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:05:25.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:25.240 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:05:25.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:05:25.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:05:25.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:05:25.240 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:05:25.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:05:25.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:05:25.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:25.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:05:25.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:05:25.241 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:05:25.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:25.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:25.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:25.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:25.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:25.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:25.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:25.241 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:05:25.241 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:05:25.241 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:05:25.241 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:05:25.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:25.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:25.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:25.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:05:25.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:25.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:25.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:25.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:25.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:25.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:25.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:25.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:25.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:25.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:25.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:25.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:25.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:25.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:25.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:25.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:25.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:25.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:25.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:25.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:25.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:25.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:25.246 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:05:25.724 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:05:25.769 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:05:25.770 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:05:25.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:25.772 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:05:25.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:05:25.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:05:25.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:05:25.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:25.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:25.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:25.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:25.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:25.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:25.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:25.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:25.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:25.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:25.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:25.814 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:05:25.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:25.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:25.814 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:25.814 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:25.814 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:25.814 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:25.814 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:25.814 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:25.814 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:30.816 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:30.816 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:30.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:30.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:30.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:30.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:30.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:30.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:30.824 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:30.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:30.824 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:05:30.827 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:05:30.827 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:05:30.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:30.828 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:30.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:30.828 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:05:30.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:30.829 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:05:30.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:30.831 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:05:30.831 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:05:30.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:30.832 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:30.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:30.832 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:05:30.833 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:30.833 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:05:30.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:30.836 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:05:30.836 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:05:30.836 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:30.836 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:30.836 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:30.836 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:05:30.836 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:30.836 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:05:30.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:30.842 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:05:30.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:05:30.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:05:30.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:05:30.842 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:05:30.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:05:30.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:05:30.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:30.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:05:30.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:05:30.843 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:05:30.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:30.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:30.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:30.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:30.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:30.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:30.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:30.843 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:05:30.843 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:05:30.843 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:05:30.843 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:05:30.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:30.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:30.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:30.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:05:30.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:30.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:30.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:30.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:30.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:30.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:30.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:30.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:30.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:30.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:30.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:30.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:30.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:30.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:30.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:30.848 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:05:31.325 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:05:31.381 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:05:31.383 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:05:31.385 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:05:31.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:31.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:05:31.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:05:31.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:05:31.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:31.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:31.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:31.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:31.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:31.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:31.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:31.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:31.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:31.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:31.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:31.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:31.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:31.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:31.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:31.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:31.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:31.446 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:05:31.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:31.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:31.446 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:31.446 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:31.446 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:31.446 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:31.446 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:31.446 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:31.446 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:36.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:36.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:36.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:36.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:36.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:36.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:36.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:36.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:36.457 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:36.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:36.458 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:05:36.461 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:05:36.462 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:05:36.462 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:36.462 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:36.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:36.463 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:05:36.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:36.463 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:05:36.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:36.465 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:05:36.465 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:05:36.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:36.466 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:36.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:36.466 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:05:36.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:36.466 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:05:36.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:36.468 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:05:36.468 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:05:36.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:36.468 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:36.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:36.469 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:05:36.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:36.469 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:05:36.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:36.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:05:36.473 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:05:36.473 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:05:36.473 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:36.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:36.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:36.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:36.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:36.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:36.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:36.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:36.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:36.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:36.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:36.477 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:05:36.955 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:05:36.996 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:05:36.998 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:05:36.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:37.001 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:05:37.003 [DEBUG] fake_trx.py:382 (BTS@172.18.37.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-03 02:05:37.003 [INFO] fake_trx.py:385 (BTS@172.18.37.20:5700) Artificial TRXC delay set to 200
2026-05-03 02:05:37.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-03 02:05:37.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:37.430 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:05:37.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:37.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:37.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:37.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:37.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:37.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:37.906 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:05:38.378 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:05:38.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:38.641 [DEBUG] fake_trx.py:382 (BTS@172.18.37.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-03 02:05:38.641 [INFO] fake_trx.py:385 (BTS@172.18.37.20:5700) Artificial TRXC delay set to 0
2026-05-03 02:05:38.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-03 02:05:38.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:38.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:38.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:38.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:38.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:38.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:38.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:38.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:38.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:38.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:38.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:38.650 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:38.650 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:05:38.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:38.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:38.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=469 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:38.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=469 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:38.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=469 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:38.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=469 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:38.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=469 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:38.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=469 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:38.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=469 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:43.655 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:43.655 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:43.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:43.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:43.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:43.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:43.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:43.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:43.665 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:43.666 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:43.666 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:05:43.669 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:05:43.669 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:05:43.670 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:43.670 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:43.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:43.670 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:05:43.671 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:43.671 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:05:43.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:43.672 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:05:43.673 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:05:43.673 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:43.673 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:43.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:43.673 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:05:43.673 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:43.673 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:05:43.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:43.675 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:05:43.675 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:05:43.675 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:43.675 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:43.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:43.675 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:05:43.675 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:43.675 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:05:43.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:43.677 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:05:43.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:05:43.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:05:43.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:05:43.677 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:05:43.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:05:43.678 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:05:43.678 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:05:43.678 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:43.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:43.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:43.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:43.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:43.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:43.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:43.682 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:05:44.159 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:05:44.203 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:05:44.205 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:05:44.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:44.207 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:05:44.209 [DEBUG] fake_trx.py:382 (BTS@172.18.37.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-03 02:05:44.209 [INFO] fake_trx.py:385 (BTS@172.18.37.20:5700) Artificial TRXC delay set to 200
2026-05-03 02:05:44.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-03 02:05:44.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:44.632 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:05:44.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:44.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:44.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:44.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:44.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.109 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:05:45.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.585 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:05:45.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.848 [DEBUG] fake_trx.py:382 (BTS@172.18.37.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-03 02:05:45.848 [INFO] fake_trx.py:385 (BTS@172.18.37.20:5700) Artificial TRXC delay set to 0
2026-05-03 02:05:45.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-03 02:05:45.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:45.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:45.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:45.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:45.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:45.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:45.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:45.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:45.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:45.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:45.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:45.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:45.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:45.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:45.858 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:05:45.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:45.858 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=469 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:45.858 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=469 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:45.858 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=469 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:45.858 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=469 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:45.858 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=469 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:45.858 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=469 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:45.858 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=469 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:50.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:50.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:50.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:50.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:50.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:50.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:50.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:50.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:50.873 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:50.874 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:50.874 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:05:50.877 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:05:50.878 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:05:50.878 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:50.878 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:50.878 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:50.879 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:05:50.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:50.879 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:05:50.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:50.882 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:05:50.883 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:05:50.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:50.883 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:50.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:50.884 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:05:50.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:50.885 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:05:50.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:50.887 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:05:50.887 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:05:50.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:50.887 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:50.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:50.888 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:05:50.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:50.888 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:05:50.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:50.893 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:05:50.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:05:50.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:05:50.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:05:50.894 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:05:50.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:05:50.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:05:50.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:50.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:05:50.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:05:50.894 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:05:50.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:50.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:50.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:50.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:50.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:50.895 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:05:50.895 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:05:50.895 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:05:50.895 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:05:50.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:50.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:50.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:50.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:05:50.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:50.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:50.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:50.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:50.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:50.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:50.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:50.900 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:05:51.378 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:05:51.426 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:05:51.428 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:05:51.430 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:05:51.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:51.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:05:51.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:05:51.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:05:51.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:51.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:51.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:51.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:51.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:51.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:51.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:51.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:51.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:51.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:51.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:51.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:51.475 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:05:51.475 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:51.475 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:51.475 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:56.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:56.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:56.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:56.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:56.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:56.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:56.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:56.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:56.485 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:56.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:05:56.485 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:05:56.489 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:05:56.489 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:05:56.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:56.490 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:56.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:56.490 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:05:56.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:05:56.490 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:05:56.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:56.494 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:05:56.495 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:05:56.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:56.495 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:56.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:56.495 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:05:56.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:05:56.495 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:05:56.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:56.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:05:56.499 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:05:56.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:56.499 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:05:56.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:56.499 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:05:56.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:05:56.499 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:05:56.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:56.503 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:05:56.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:05:56.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:05:56.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:05:56.503 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:05:56.504 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:05:56.504 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:05:56.504 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:56.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:56.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:05:56.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:05:56.509 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:05:56.986 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:05:57.034 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:05:57.036 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:05:57.038 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:05:57.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:57.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:05:57.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:05:57.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:05:57.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:57.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:05:57.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:05:57.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:05:57.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:05:57.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:05:57.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:05:57.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:05:57.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:05:57.077 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:05:57.077 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:05:57.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:05:57.077 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:05:57.078 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:05:57.078 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:02.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:06:02.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:06:02.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:06:02.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:06:02.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:06:02.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:06:02.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:06:02.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:06:02.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:06:02.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:06:02.095 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:06:02.097 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:06:02.098 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:06:02.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:06:02.098 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:06:02.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:06:02.098 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:06:02.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:06:02.099 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:06:02.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:06:02.100 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:06:02.100 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:06:02.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:06:02.100 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:06:02.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:06:02.100 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:06:02.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:06:02.100 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:06:02.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:06:02.102 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:06:02.102 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:06:02.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:06:02.102 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:06:02.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:06:02.102 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:06:02.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:06:02.102 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:06:02.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:06:02.105 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:06:02.105 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:06:02.105 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:02.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:02.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:02.110 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:06:02.588 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:06:02.631 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:06:02.633 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:06:02.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:02.635 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:06:02.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:02.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:02.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:02.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:02.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:02.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:02.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:02.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:02.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:02.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:02.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:02.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:02.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:02.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:02.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:02.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:02.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:02.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:02.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:02.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:02.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:02.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:02.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:02.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:02.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:02.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:02.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:02.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:02.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:02.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:03.057 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:06:03.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:06:03.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:06:03.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:06:03.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:06:03.531 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:06:04.003 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:06:04.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:06:04.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:06:04.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:06:04.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:06:04.476 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:06:04.949 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:06:05.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:06:05.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:06:05.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:06:05.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:06:05.421 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:06:05.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:05.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:05.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:05.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:05.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:05.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:05.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:05.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:05.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:05.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:05.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:05.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:05.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:05.894 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:06:05.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:05.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:05.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:05.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:05.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:05.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:05.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:05.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:05.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:05.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:05.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:05.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:05.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:05.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:05.974 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:05.974 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:05.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:05.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:05.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:05.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:05.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:06.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:06:06.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:06:06.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:06:06.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:06:06.367 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:06:06.840 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:06:07.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:06:07.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:06:07.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:06:07.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:06:07.313 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:06:07.786 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:06:08.257 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:06:08.730 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:06:08.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:08.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:08.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:08.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:09.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:09.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:09.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:09.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:09.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:09.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:09.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:09.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:09.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:09.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:09.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:09.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:09.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:09.203 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:06:09.675 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:06:10.149 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:06:10.621 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:06:11.094 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:06:11.564 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:06:12.038 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:06:12.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:12.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:12.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:12.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:12.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:12.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:12.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:12.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:12.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:12.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:12.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:12.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:12.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:12.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:12.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:12.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:12.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:12.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:12.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:12.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:12.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:12.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:12.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:12.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:12.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:12.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:12.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:12.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:12.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:12.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:12.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:12.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:12.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:12.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:12.509 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:06:12.981 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:06:13.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:13.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:13.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:13.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:13.191 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=2393 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:13.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:13.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:13.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:13.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:13.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:13.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:13.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:13.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:13.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:13.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:13.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:13.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:13.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:13.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:13.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:13.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:13.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:13.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:13.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:13.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:13.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:13.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:13.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:13.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:13.305 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:13.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:13.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:13.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:13.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:13.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:13.453 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:06:13.924 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:06:14.395 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:06:14.866 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:06:15.337 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:06:15.811 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:06:16.283 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:06:16.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:16.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:16.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:16.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:16.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:16.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:16.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:16.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:16.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:16.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:16.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:16.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:16.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:16.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:16.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:16.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:16.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:16.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:16.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:16.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:16.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:16.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:16.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:16.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:16.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:16.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:16.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:16.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:16.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:16.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:16.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:16.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:16.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:16.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:16.754 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:06:17.226 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:06:17.699 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:06:18.172 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:06:18.656 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:06:19.128 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:06:19.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:19.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:19.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:19.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:19.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:19.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:19.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:19.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:19.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:19.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:19.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:19.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:19.599 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:06:19.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:19.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:19.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:19.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:19.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:20.070 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:06:20.543 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:06:21.016 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:06:21.488 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:06:21.959 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:06:22.432 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:06:22.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:22.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:22.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:22.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:22.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:22.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:22.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:22.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:22.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:22.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:22.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:22.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:22.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:22.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:22.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:22.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:22.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:22.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:22.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:22.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:22.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:22.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:22.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:22.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:22.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:22.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:22.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:22.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:22.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:22.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:22.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:22.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:22.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:22.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:22.904 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:06:23.377 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:06:23.850 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:06:24.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:24.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:24.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:24.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:24.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:24.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:24.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:24.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:24.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:24.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:24.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:24.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:24.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:24.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:24.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:24.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:24.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:24.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:24.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:24.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:24.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:24.322 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:06:24.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:24.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:24.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:24.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:24.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:24.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:24.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:24.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:24.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:24.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:24.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:24.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:24.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:24.794 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:06:25.265 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:06:25.736 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:06:26.209 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:06:26.682 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:06:27.154 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:06:27.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:27.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:27.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:27.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:27.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:27.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:27.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:27.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:27.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:27.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:27.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:27.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:27.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:27.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:27.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:27.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:27.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:27.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:27.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:27.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:27.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:27.625 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:06:27.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:27.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:27.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:27.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:27.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:27.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:27.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:27.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:27.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:27.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:27.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:27.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:27.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:28.096 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:06:28.569 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:06:29.042 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:06:29.514 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:06:29.985 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:06:30.458 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:06:30.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:30.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:30.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:30.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:30.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:30.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:30.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:30.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:30.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:30.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:30.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:30.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:30.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:30.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:30.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:30.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:30.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:30.930 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:06:31.402 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 02:06:31.873 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 02:06:32.344 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 02:06:32.818 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 02:06:33.290 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 02:06:33.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:33.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:33.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:33.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:33.762 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 02:06:33.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:33.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:33.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:33.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:33.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:33.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:33.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:33.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:33.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:33.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:33.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:33.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:33.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:33.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:33.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:33.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:33.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:34.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:34.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:34.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:34.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:34.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:34.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:34.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:34.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:34.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:34.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:34.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:34.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:34.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:34.233 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 02:06:34.703 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 02:06:34.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:34.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:34.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:34.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:34.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:34.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:34.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:34.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:34.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:34.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:34.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:34.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:34.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:34.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:34.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:34.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:34.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:34.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:34.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:34.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:34.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:34.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:34.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:34.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:34.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:34.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:34.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:34.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:34.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:34.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:34.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:34.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:34.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:34.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:35.174 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 02:06:35.645 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 02:06:36.119 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 02:06:36.591 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 02:06:37.063 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 02:06:37.534 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 02:06:37.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:37.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:37.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:37.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:37.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:37.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:37.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:37.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:37.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:37.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:37.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:37.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:37.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:37.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:37.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:37.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:37.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:38.004 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 02:06:38.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:38.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:38.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:38.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:38.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:38.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:38.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:38.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:38.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:38.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:38.182 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:38.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:38.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:38.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:38.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:38.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:38.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:38.475 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 02:06:38.947 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 02:06:39.421 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 02:06:39.892 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 02:06:40.363 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 02:06:40.837 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 02:06:41.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:41.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:41.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:41.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:41.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:41.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:41.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:41.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:41.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:41.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:41.212 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:41.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:41.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:41.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:41.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:41.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:41.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:41.309 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 02:06:41.781 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 02:06:42.252 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 02:06:42.725 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 02:06:43.198 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 02:06:43.670 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 02:06:44.144 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 02:06:44.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:44.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:44.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:44.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:44.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:44.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:44.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:44.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:44.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:44.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:44.291 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:44.291 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:44.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:44.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:44.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:44.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:44.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:44.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:44.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:44.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:44.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:44.534 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=9165 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:44.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:44.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:44.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:44.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:44.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:44.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:44.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:44.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:44.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:44.616 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 02:06:44.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:44.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:44.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:44.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:45.088 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 02:06:45.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:45.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:45.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:45.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:45.559 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 02:06:45.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:06:45.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:06:45.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:06:45.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:06:45.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:06:45.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:06:45.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:06:45.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:06:45.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:06:45.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:06:45.570 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:06:45.570 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9388 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:45.570 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9388 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:45.570 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9388 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:50.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:06:50.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:06:50.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:06:50.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:06:50.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:06:50.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:06:50.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:06:50.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:06:50.586 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:06:50.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:06:50.586 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:06:50.588 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:06:50.588 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:06:50.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:06:50.588 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:06:50.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:06:50.589 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:06:50.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:06:50.589 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:06:50.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:06:50.590 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:06:50.590 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:06:50.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:06:50.590 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:06:50.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:06:50.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:06:50.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:06:50.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:06:50.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:06:50.592 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:06:50.592 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:06:50.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:06:50.592 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:06:50.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:06:50.592 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:06:50.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:06:50.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:06:50.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:06:50.594 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:06:50.594 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:06:50.594 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:50.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:50.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:50.599 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:06:51.076 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:06:51.115 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:06:51.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:51.118 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:06:51.121 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:06:51.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:51.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:51.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:51.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:51.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:51.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:51.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:51.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:51.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:51.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:51.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:51.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:51.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:51.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:51.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:51.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:51.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:51.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:51.255 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:51.255 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:51.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:51.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:51.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:51.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:51.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:51.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:51.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:51.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:51.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:51.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:51.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:51.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:51.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:51.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:51.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:51.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:51.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:51.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:51.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:51.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:51.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:51.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:51.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:51.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:51.491 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:51.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:51.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:51.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:51.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:51.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.548 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:06:51.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:06:51.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:06:51.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:06:51.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:06:51.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:51.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:51.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:51.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:51.637 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=225 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:51.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:06:51.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:06:51.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:06:51.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:06:51.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:06:51.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:06:51.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:06:51.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:06:51.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:06:51.650 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:06:51.650 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:06:51.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=228 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:51.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=228 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:51.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=228 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:51.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=228 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:51.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=228 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:51.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=228 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:51.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=228 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:56.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:06:56.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:06:56.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:06:56.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:06:56.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:06:56.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:06:56.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:06:56.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:06:56.660 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:06:56.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:06:56.660 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:06:56.662 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:06:56.662 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:06:56.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:06:56.662 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:06:56.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:06:56.663 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:06:56.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:06:56.663 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:06:56.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:06:56.664 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:06:56.664 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:06:56.664 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:06:56.664 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:06:56.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:06:56.664 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:06:56.664 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:06:56.664 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:06:56.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:06:56.666 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:06:56.666 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:06:56.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:06:56.666 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:06:56.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:06:56.666 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:06:56.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:06:56.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:06:56.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:56.668 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:06:56.668 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:06:56.669 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:06:56.669 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:56.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:06:56.673 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:06:57.151 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:06:57.190 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:06:57.192 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:06:57.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:57.194 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:06:57.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:57.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:57.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:57.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:57.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:57.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:57.212 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:57.212 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:57.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:57.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:57.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:57.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:57.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:57.624 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:06:57.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:06:57.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:06:57.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:06:57.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:06:58.095 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:06:58.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:58.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:58.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:58.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:58.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:58.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:58.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:58.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:58.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:58.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:58.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:58.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:58.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:58.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:58.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:58.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:58.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:58.566 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:06:58.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:06:58.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:06:58.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:06:58.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:06:58.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:58.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:58.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:58.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:58.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:58.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:58.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:58.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:58.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:58.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:58.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:58.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:58.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:58.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:58.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:58.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:58.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:59.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:59.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:59.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:59.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:59.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:59.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:59.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:06:59.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:59.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:59.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:59.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:06:59.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:06:59.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:59.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:06:59.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:06:59.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:59.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:59.038 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:06:59.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:06:59.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:06:59.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:06:59.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:06:59.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:06:59.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:06:59.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:06:59.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:06:59.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:06:59.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:06:59.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:06:59.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:06:59.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:06:59.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:06:59.446 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:06:59.446 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:59.446 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:59.446 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:59.447 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:59.447 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:59.447 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:59.447 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:59.447 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:59.447 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:59.447 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:06:59.447 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:04.447 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:07:04.447 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:07:04.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:07:04.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:07:04.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:07:04.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:07:04.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:07:04.455 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:07:04.455 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:04.455 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:07:04.455 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:07:04.457 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:07:04.457 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:07:04.458 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:07:04.458 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:04.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:07:04.458 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:07:04.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:07:04.459 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:07:04.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:04.460 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:07:04.460 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:07:04.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:07:04.460 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:04.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:07:04.460 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:07:04.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:07:04.460 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:07:04.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:04.462 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:07:04.462 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:07:04.462 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:07:04.462 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:04.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:07:04.462 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:07:04.462 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:07:04.462 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:07:04.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:04.464 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:07:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:07:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:07:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:07:04.464 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:07:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:07:04.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:07:04.465 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:07:04.465 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:07:04.465 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:04.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:04.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:04.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:04.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:04.469 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:07:04.946 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:07:04.985 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:07:04.986 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:07:04.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:04.988 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:07:05.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:05.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:05.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:05.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:05.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:05.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:05.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:05.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:05.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:05.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:05.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:05.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:05.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:05.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:05.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:05.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:05.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:05.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:05.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:05.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:05.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:05.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:05.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:05.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:05.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:05.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:05.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:05.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:05.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:05.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:05.418 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:07:05.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:05.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:05.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:05.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:05.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:05.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:05.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:05.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:05.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:05.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:05.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:05.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:05.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:05.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:05.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:05.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:05.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:05.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:05.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:05.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:05.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:05.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:05.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:05.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:05.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:05.889 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:07:05.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:05.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:05.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:05.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:05.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:05.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:05.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:05.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:05.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:05.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:05.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:05.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:05.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:06.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:06.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:06.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:06.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:06.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:06.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:06.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:06.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:06.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:07:06.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:07:06.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:07:06.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:07:06.291 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:07:06.291 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:07:06.291 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:07:06.291 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:06.291 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:06.291 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:06.291 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:06.291 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:06.291 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:11.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:07:11.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:07:11.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:07:11.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:07:11.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:07:11.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:07:11.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:07:11.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:07:11.306 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:11.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:07:11.306 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:07:11.309 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:07:11.309 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:07:11.309 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:07:11.310 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:11.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:07:11.310 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:07:11.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:07:11.310 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:07:11.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:11.312 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:07:11.312 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:07:11.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:07:11.312 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:11.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:07:11.312 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:07:11.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:07:11.312 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:07:11.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:11.314 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:07:11.314 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:07:11.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:07:11.315 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:11.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:07:11.315 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:07:11.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:07:11.315 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:07:11.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:11.319 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:07:11.319 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:07:11.319 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:07:11.320 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:11.324 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:07:11.802 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:07:11.850 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:07:11.852 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:07:11.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:11.855 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:07:11.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:11.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:11.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:11.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:11.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:11.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:11.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:11.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:11.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:11.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:11.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:11.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:11.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:12.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:12.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:12.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:12.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:12.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:12.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:12.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:12.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:12.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:12.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:12.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:12.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:12.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:12.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:12.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:12.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:12.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:12.273 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:07:12.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:12.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:12.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:12.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:12.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:12.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:12.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:12.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:12.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:12.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:12.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:12.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:12.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:12.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:12.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:12.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:12.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:12.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:12.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:12.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:12.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:12.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:12.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:12.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:12.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:12.745 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:07:12.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:12.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:12.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:12.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:12.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:12.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:12.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:12.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:12.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:12.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:12.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:12.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:12.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:13.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:13.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:13.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:13.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:13.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:13.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:13.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:13.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:13.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:07:13.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:07:13.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:07:13.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:07:13.142 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:07:13.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:07:13.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:07:18.149 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:07:18.149 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:07:18.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:07:18.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:07:18.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:07:18.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:07:18.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:07:18.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:07:18.157 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:18.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:07:18.158 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:07:18.162 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:07:18.162 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:07:18.162 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:07:18.162 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:18.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:07:18.163 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:07:18.163 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:07:18.163 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:07:18.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:18.166 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:07:18.166 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:07:18.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:07:18.167 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:18.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:07:18.167 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:07:18.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:07:18.168 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:07:18.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:18.169 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:07:18.170 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:07:18.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:07:18.170 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:18.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:07:18.170 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:07:18.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:07:18.170 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:07:18.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:18.173 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:07:18.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:07:18.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:07:18.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:07:18.173 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:07:18.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:07:18.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:07:18.174 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:07:18.174 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:07:18.174 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:18.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:18.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:18.179 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:07:18.656 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:07:18.697 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:07:18.698 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:07:18.699 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:07:18.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:18.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:18.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:18.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:18.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:18.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:18.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:18.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:18.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:18.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:18.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:18.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:18.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:18.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:19.127 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:07:19.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:19.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:19.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:19.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:19.600 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:07:20.068 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:07:20.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:20.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:20.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:20.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:20.541 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:07:20.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:20.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:20.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:20.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:20.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:20.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:20.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:20.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:20.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:20.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:20.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:20.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:20.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:20.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:20.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:20.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:20.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:21.014 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:07:21.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:21.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:21.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:21.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:21.486 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:07:21.956 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:07:22.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:22.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:22.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:22.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:22.427 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:07:22.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:22.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:22.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:22.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:22.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:22.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:22.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:22.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:22.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:22.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:22.776 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:22.776 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:22.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:22.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:22.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:22.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:22.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:22.899 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:07:23.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:23.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:23.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:23.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:23.371 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:07:23.843 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:07:24.315 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:07:24.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:24.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:24.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:24.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:24.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:24.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:24.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:24.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:24.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:24.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:24.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:24.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:24.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:24.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:24.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:24.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:24.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:24.786 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:07:25.260 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:07:25.732 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:07:26.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:26.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:26.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:26.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:26.204 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:07:26.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:26.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:26.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:26.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:26.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:07:26.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:07:26.213 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:07:26.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:07:26.213 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:07:26.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:07:26.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:07:26.214 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:26.214 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:26.214 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:26.214 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:26.214 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:26.214 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:26.214 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:31.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:07:31.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:07:31.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:07:31.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:07:31.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:07:31.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:07:31.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:07:31.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:07:31.228 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:31.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:07:31.228 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:07:31.234 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:07:31.235 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:07:31.235 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:07:31.235 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:31.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:07:31.236 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:07:31.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:07:31.237 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:07:31.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:31.240 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:07:31.240 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:07:31.241 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:07:31.241 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:31.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:07:31.242 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:07:31.242 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:07:31.242 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:07:31.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:31.244 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:07:31.244 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:07:31.245 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:07:31.245 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:31.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:07:31.245 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:07:31.245 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:07:31.245 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:07:31.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:31.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:07:31.250 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:07:31.250 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:07:31.250 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:31.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:31.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:31.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:31.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:31.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:31.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:31.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:31.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:31.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:31.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:31.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:31.254 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:07:31.732 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:07:31.786 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:07:31.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:31.789 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:07:31.792 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:07:31.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:31.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:31.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:31.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:31.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:31.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:31.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:31.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:31.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:31.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:31.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:31.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:31.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:32.204 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:07:32.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:32.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:32.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:32.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:32.675 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:07:33.149 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:07:33.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:33.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:33.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:33.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:33.619 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:07:34.092 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:07:34.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:34.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:34.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:34.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:34.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:34.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:34.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:34.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:34.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:34.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:34.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:34.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:34.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:34.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:34.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:34.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:34.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:34.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:34.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:34.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:34.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:34.563 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:07:35.035 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:07:35.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:35.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:35.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:35.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:35.505 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:07:35.976 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:07:36.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:36.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:36.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:36.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:36.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:36.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:36.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:36.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:36.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:36.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:36.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:36.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:36.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:36.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:36.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:36.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:36.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:36.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:36.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:36.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:36.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:36.447 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:07:36.918 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:07:37.389 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:07:37.862 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:07:37.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:37.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:37.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:37.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:37.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:37.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:37.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:37.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:37.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:37.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:37.919 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:37.919 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:37.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:37.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:37.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:37.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:37.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:38.334 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:07:38.806 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:07:39.277 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:07:39.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:39.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:39.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:39.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:39.750 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:07:39.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:39.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:39.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:39.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:39.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:07:39.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:07:39.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:07:39.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:07:39.757 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:07:39.757 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:07:39.757 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:07:39.757 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:39.757 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1840 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:39.757 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:39.757 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:39.757 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:39.757 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:39.757 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:39.757 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:39.757 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:07:44.760 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:07:44.760 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:07:44.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:07:44.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:07:44.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:07:44.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:07:44.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:07:44.767 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:07:44.767 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:44.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:07:44.768 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:07:44.771 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:07:44.772 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:07:44.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:07:44.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:44.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:07:44.773 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:07:44.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:07:44.774 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:07:44.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:44.777 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:07:44.777 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:07:44.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:07:44.778 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:44.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:07:44.778 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:07:44.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:07:44.779 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:07:44.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:44.782 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:07:44.782 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:07:44.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:07:44.782 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:07:44.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:07:44.783 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:07:44.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:07:44.783 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:07:44.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:44.789 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:07:44.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:07:44.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:07:44.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:07:44.789 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:07:44.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:07:44.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:07:44.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:07:44.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:44.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:07:44.789 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:07:44.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:44.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:44.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:44.790 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:07:44.790 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:07:44.790 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:07:44.790 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:07:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:44.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:07:44.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:44.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:44.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:44.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:44.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:07:44.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:07:44.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:07:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:44.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:07:44.795 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:07:45.273 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:07:45.326 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:07:45.328 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:07:45.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:45.331 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:07:45.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:45.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:45.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:45.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:45.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:45.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:45.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:45.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:45.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:45.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:45.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:45.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:45.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:45.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:45.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:45.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:45.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:45.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:45.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:45.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:45.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:45.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:45.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:45.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:45.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:45.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:45.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:45.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:45.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:45.743 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:07:45.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:45.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:45.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:45.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:46.216 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:07:46.688 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:07:46.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:46.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:46.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:46.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:47.159 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:07:47.633 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:07:47.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:47.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:47.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:47.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:47.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:47.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:47.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:47.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:47.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:47.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:47.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:47.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:47.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:47.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:47.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:47.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:47.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:47.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:47.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:47.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:47.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:47.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:47.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:47.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:47.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:47.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:47.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:47.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:47.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:47.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:47.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:47.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:47.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:47.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:47.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:47.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:47.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:47.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:48.105 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:07:48.577 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:07:48.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:48.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:48.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:48.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:49.047 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:07:49.518 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:07:49.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:07:49.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:07:49.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:07:49.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:07:49.989 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:07:50.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:50.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:50.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:50.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:50.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:50.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:50.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:50.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:50.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:50.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:50.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:50.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:50.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:50.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:50.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:50.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:50.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:50.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:50.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:50.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:50.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:50.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:50.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:50.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:50.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:50.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:50.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:50.420 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:50.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:50.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:50.461 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:07:50.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:50.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:50.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:50.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:50.935 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:07:51.407 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:07:51.877 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:07:52.349 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:07:52.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:52.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:52.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:52.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:52.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:52.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:52.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:52.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:52.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:52.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:52.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:52.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:52.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:52.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:52.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:52.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:52.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:52.822 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:07:53.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:53.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:53.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:53.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:53.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:53.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:53.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:53.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:53.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:53.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:53.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:53.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:53.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:53.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:53.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:53.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:53.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:53.294 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:07:53.767 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:07:54.240 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:07:54.712 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:07:55.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:55.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:55.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:55.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:55.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:55.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:55.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:55.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:55.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:55.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:55.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:55.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:55.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:55.184 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:07:55.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:55.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:55.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:55.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:55.656 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:07:55.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:55.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:55.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:55.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:55.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:55.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:55.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:55.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:55.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:55.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:55.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:55.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:55.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:55.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:55.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:55.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:56.128 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:07:56.601 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:07:57.073 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:07:57.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:57.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:57.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:57.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:57.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:57.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:57.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:57.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:57.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:57.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:57.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:57.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:57.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:57.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:57.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:57.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:57.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:57.543 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:07:58.014 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:07:58.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:58.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:58.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:58.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:58.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:58.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:58.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:58.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:58.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:58.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:58.192 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:58.192 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:58.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:58.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:58.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:58.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:58.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:58.486 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:07:58.959 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:07:59.431 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:07:59.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:59.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:59.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:59.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:59.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:07:59.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:07:59.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:07:59.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:59.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:59.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:59.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:07:59.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:07:59.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:07:59.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:07:59.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:07:59.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:59.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:07:59.903 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:08:00.375 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:08:00.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:00.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:00.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:00.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:00.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:00.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:00.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:00.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:00.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:00.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:00.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:00.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:00.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:00.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:00.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:00.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:00.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:00.847 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:08:01.320 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:08:01.792 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:08:02.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:02.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:02.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:02.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:02.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:02.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:02.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:02.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:02.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:02.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:02.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:02.207 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:02.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:02.265 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:08:02.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:02.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:02.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:02.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:02.738 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:08:02.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:02.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:02.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:02.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:02.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:02.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:02.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:02.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:02.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:02.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:02.849 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:02.849 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:02.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:02.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:02.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:02.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:02.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:03.210 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:08:03.681 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:08:04.155 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:08:04.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:04.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:04.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:04.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:04.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:04.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:04.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:04.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:04.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:04.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:04.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:08:04.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:08:04.561 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:08:04.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:04.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:09.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:08:09.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:08:09.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:09.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:09.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:09.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:09.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:09.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:08:09.572 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:09.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:08:09.573 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:08:09.575 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:08:09.575 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:08:09.575 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:08:09.575 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:09.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:09.576 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:08:09.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:08:09.576 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:08:09.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:09.577 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:08:09.577 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:08:09.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:08:09.578 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:09.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:09.578 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:08:09.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:08:09.578 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:08:09.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:09.580 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:08:09.580 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:08:09.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:08:09.580 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:09.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:09.580 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:08:09.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:08:09.580 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:08:09.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:09.582 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:08:09.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:08:09.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:08:09.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:08:09.582 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:08:09.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:08:09.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:08:09.583 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:08:09.583 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:08:09.583 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:09.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:09.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:09.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:09.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:09.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:09.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:09.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:09.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:09.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:09.587 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:08:10.065 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:08:10.102 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:08:10.104 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:08:10.104 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:08:10.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:10.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:10.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:10.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:10.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:10.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:10.128 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:10.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:10.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:10.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:10.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:10.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:10.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:10.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:10.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:10.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:10.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:10.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:10.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:10.247 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:10.247 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:10.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:10.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:10.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:10.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:10.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:10.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:10.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:10.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:10.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:10.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:10.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:10.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:10.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:10.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:10.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:10.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:10.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.537 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:08:10.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:10.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:10.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:10.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:10.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:10.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:10.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:10.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:10.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:10.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:10.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:10.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:10.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:10.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:10.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:10.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:10.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:10.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:10.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:10.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:10.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:10.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:10.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:10.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:10.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:10.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:10.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:10.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:10.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:10.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:10.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:10.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:10.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:10.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:10.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:10.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:10.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:10.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:10.945 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:10.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:10.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:10.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:10.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:10.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:10.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:11.008 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:08:11.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:11.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:11.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:11.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:11.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:11.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:11.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:11.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:11.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:11.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:11.178 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:11.178 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:11.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:11.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:11.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:11.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:11.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:11.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:11.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:11.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:11.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:11.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:11.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:11.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:11.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:11.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:11.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:11.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:11.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:11.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:11.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:11.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:11.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:11.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:11.479 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:08:11.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:11.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:11.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:11.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:11.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:11.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:11.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:11.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:11.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:11.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:11.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:11.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:11.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:08:11.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:08:11.577 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:08:11.578 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:11.578 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:16.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:08:16.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:08:16.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:16.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:16.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:16.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:16.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:16.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:08:16.588 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:16.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:08:16.588 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:08:16.592 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:08:16.592 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:08:16.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:08:16.592 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:16.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:16.593 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:08:16.594 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:08:16.594 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:08:16.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:16.595 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:08:16.595 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:08:16.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:08:16.596 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:16.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:16.596 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:08:16.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:08:16.596 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:08:16.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:16.600 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:08:16.600 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:08:16.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:08:16.600 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:16.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:16.600 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:08:16.601 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:08:16.601 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:08:16.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:16.604 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:08:16.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:08:16.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:08:16.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:08:16.604 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:08:16.605 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:08:16.605 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:08:16.605 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:16.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:16.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:16.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:16.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:16.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:16.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:16.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:16.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:16.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:16.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:16.610 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:08:17.088 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:08:17.132 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:08:17.133 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:08:17.134 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:08:17.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:17.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:17.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:17.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:17.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:17.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:17.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:17.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:17.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:17.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:17.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:17.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:17.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:17.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:17.560 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:08:17.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:17.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:17.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:17.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:18.031 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:08:18.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:18.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:18.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:18.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:18.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:18.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:18.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:18.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:18.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:18.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:18.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:18.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:18.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:18.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:18.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:18.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:18.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:18.502 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:08:18.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:18.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:18.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:18.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:18.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:18.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:18.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:18.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:18.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:18.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:18.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:18.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:18.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:18.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:18.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:18.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:18.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:18.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:18.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:18.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:18.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:18.975 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:08:19.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:19.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:19.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:19.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:19.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:19.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:19.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:19.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:19.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:19.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:19.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:19.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:19.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:19.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:19.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:19.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:19.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:19.446 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:08:19.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:19.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:19.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:19.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:19.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:19.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:19.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:19.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:19.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:19.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:19.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:19.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:19.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:19.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:19.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:19.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:19.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:19.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:19.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:19.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:19.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:19.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:19.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:19.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:19.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:19.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:19.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:19.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:19.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:19.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:19.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:19.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:19.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:19.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:19.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:19.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:19.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:19.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:19.918 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:08:20.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:20.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:20.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:20.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:20.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:20.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:20.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:20.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:20.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:20.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:20.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:20.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:20.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:20.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:20.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:20.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:20.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:20.389 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:08:20.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:20.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:20.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:20.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:20.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:20.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:20.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:20.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:20.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:20.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:20.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:20.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:20.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:20.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:20.802 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:20.802 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:20.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:20.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:20.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:20.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:20.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:20.860 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:08:21.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:21.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:21.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:21.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:21.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:21.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:21.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:21.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:21.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:21.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:21.267 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:08:21.267 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:08:21.267 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:08:21.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:21.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:21.267 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1008 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:21.267 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:21.267 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:21.267 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:21.267 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:21.267 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:21.267 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:26.271 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:08:26.271 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:08:26.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:26.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:26.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:26.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:26.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:26.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:08:26.283 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:26.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:08:26.283 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:08:26.285 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:08:26.286 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:08:26.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:08:26.286 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:26.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:26.286 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:08:26.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:08:26.287 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:08:26.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:26.288 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:08:26.288 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:08:26.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:08:26.288 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:26.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:26.288 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:08:26.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:08:26.288 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:08:26.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:26.290 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:08:26.290 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:08:26.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:08:26.290 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:26.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:26.290 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:08:26.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:08:26.290 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:08:26.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:26.293 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:08:26.294 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:08:26.294 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:08:26.294 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:08:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:08:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:26.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:26.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:26.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:26.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:26.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:26.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:26.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:26.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:26.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:26.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:26.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:26.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:26.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:26.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:26.298 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:08:26.776 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:08:26.825 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:08:26.826 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:08:26.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:26.828 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:08:26.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:26.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:26.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:26.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:26.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:26.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:26.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:26.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:26.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:26.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:26.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:26.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:26.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:26.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:26.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:26.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:26.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:26.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:26.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:26.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:26.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:26.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:26.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:26.956 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:26.956 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:27.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:27.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:27.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:27.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:27.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:27.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:27.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:27.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:27.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:27.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:27.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:27.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:27.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:27.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:27.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:27.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:27.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:27.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:27.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:27.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:27.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:27.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:27.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:27.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:27.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:27.218 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:27.246 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:08:27.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:27.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:27.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:27.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:27.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:27.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:27.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:27.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:27.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:27.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:27.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:27.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:27.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:27.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:27.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:27.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:27.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:27.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:27.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:27.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:27.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:27.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:27.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:27.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:27.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:27.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:27.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:27.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:27.494 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:27.494 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:27.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:27.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:27.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:27.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:27.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:27.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:27.719 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:08:27.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:27.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:27.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:27.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:27.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:27.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:27.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:27.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:27.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:27.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:27.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:27.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:27.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:27.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:27.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:27.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:27.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:27.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:27.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:27.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:27.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:27.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:27.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:27.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:27.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:28.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:28.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:28.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:28.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:28.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:28.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:28.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:28.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:28.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:28.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:28.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:08:28.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:08:28.126 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:08:28.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:28.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:28.126 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:28.126 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:28.126 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:28.126 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:28.126 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:28.126 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:28.126 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:33.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:08:33.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:08:33.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:33.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:33.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:33.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:33.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:33.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:08:33.140 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:33.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:08:33.140 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:08:33.142 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:08:33.143 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:08:33.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:08:33.143 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:33.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:33.144 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:08:33.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:08:33.144 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:08:33.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:33.146 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:08:33.146 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:08:33.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:08:33.146 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:33.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:33.146 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:08:33.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:08:33.146 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:08:33.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:33.149 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:08:33.149 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:08:33.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:08:33.149 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:33.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:33.149 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:08:33.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:08:33.149 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:08:33.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:33.153 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:08:33.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:08:33.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:08:33.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:08:33.153 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:08:33.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:08:33.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:08:33.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:08:33.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:33.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:08:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:33.154 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:08:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:33.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:33.154 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:08:33.154 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:08:33.154 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:08:33.154 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:08:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:33.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:33.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:33.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:33.159 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:08:33.637 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:08:33.687 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:08:33.690 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:08:33.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:33.693 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:08:33.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:33.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:33.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:33.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:33.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:33.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:33.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:33.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:33.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:33.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:33.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:33.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:33.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:34.110 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:08:34.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:34.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:34.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:34.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:34.581 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:08:34.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:34.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:34.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:34.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:34.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:34.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:34.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:34.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:34.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:34.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:34.625 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:34.625 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:34.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:34.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:34.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:34.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:34.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:35.054 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:08:35.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:35.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:35.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:35.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:35.527 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:08:35.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:35.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:35.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:35.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:35.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:35.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:35.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:35.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:35.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:35.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:35.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:35.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:35.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:35.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:35.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:35.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:35.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:35.999 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:08:36.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:36.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:36.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:36.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:36.470 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:08:36.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:36.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:36.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:36.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:36.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:36.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:36.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:36.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:36.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:36.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:36.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:36.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:36.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:36.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:36.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:36.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:36.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:36.943 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:08:37.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:37.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:37.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:37.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:37.416 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:08:37.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:37.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:37.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:37.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:37.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:37.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:37.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:37.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:37.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:37.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:37.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:37.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:37.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:37.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:37.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:37.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:37.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:37.888 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:08:38.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:38.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:38.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:38.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:38.359 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:08:38.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:38.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:38.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:38.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:38.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:38.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:38.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:38.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:38.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:38.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:38.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:38.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:38.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:38.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:38.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:38.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:38.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:38.832 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:08:39.305 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:08:39.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:39.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:39.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:39.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:39.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:39.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:39.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:39.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:39.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:39.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:39.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:39.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:39.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:39.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:39.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:39.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:39.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:39.776 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:08:40.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:40.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:40.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:40.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:40.248 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:08:40.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:40.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:40.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:40.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:40.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:40.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:40.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:40.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:40.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:40.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:40.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:40.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:40.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:40.718 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:08:41.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:41.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:41.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:41.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:41.192 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:08:41.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:41.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:41.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:41.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:41.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:41.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:41.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:08:41.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:08:41.197 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:08:41.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:41.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:41.197 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:41.198 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:41.198 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:41.198 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:41.198 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:41.198 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:41.198 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:46.200 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:08:46.200 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:08:46.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:46.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:46.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:46.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:46.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:46.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:08:46.206 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:46.206 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:08:46.206 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:08:46.208 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:08:46.208 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:08:46.209 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:08:46.209 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:46.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:46.209 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:08:46.210 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:08:46.210 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:08:46.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:46.211 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:08:46.211 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:08:46.211 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:08:46.211 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:46.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:46.211 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:08:46.211 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:08:46.211 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:08:46.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:46.213 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:08:46.213 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:08:46.213 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:08:46.213 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:46.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:46.214 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:08:46.214 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:08:46.214 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:08:46.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:46.216 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:08:46.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:08:46.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:08:46.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:08:46.216 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:08:46.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:08:46.217 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:08:46.217 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:08:46.217 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:46.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:46.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:46.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:46.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:46.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:46.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:46.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:46.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:46.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:46.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:46.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:46.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:46.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:46.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:46.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:46.222 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:08:46.697 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:08:46.740 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:08:46.742 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:08:46.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:46.744 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:08:46.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:46.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:46.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:46.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:46.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:46.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:46.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:46.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:46.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:46.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:46.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:46.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:46.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:46.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:46.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:46.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:46.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:46.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:46.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:46.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:46.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:46.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:46.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:46.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:46.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:46.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:46.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:46.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:46.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:46.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:47.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:47.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:47.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:47.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:47.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:47.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:47.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:47.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:47.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:47.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:47.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:47.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:47.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:47.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:47.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:47.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:47.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:47.169 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:08:47.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:47.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:47.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:47.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:47.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:47.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:47.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:47.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:47.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:47.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:47.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:47.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:47.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:47.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:47.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:47.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:47.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:47.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:47.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:47.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:47.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:47.640 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:08:47.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:47.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:47.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:47.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:47.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:47.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:47.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:47.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:47.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:47.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:47.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:47.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:47.808 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:08:47.808 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:08:47.808 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:08:52.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:08:52.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:08:52.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:52.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:52.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:52.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:52.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:52.821 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:08:52.821 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:52.822 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:08:52.822 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:08:52.824 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:08:52.824 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:08:52.824 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:08:52.825 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:52.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:52.825 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:08:52.825 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:08:52.825 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:08:52.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:52.827 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:08:52.827 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:08:52.827 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:08:52.827 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:52.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:52.827 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:08:52.827 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:08:52.827 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:08:52.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:52.829 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:08:52.829 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:08:52.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:08:52.829 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:52.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:52.829 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:08:52.830 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:08:52.830 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:08:52.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:52.833 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:08:52.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:08:52.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:52.834 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:08:52.834 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:08:52.834 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:08:52.834 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:08:52.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:52.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:52.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:52.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:08:52.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:52.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:52.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:52.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:52.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:52.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:52.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:52.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:52.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:52.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:52.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:52.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:52.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:52.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:52.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:52.839 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:08:53.316 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:08:53.367 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:08:53.369 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:08:53.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:53.372 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:08:53.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:53.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:53.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:53.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:53.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:53.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:53.402 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:53.402 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:53.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:53.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:53.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:53.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:53.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:53.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:53.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:53.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:53.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:53.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:53.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:53.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:53.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:53.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:53.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:53.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:53.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:53.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:53.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:53.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:53.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:53.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:53.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:53.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:53.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:53.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:53.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:53.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:53.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:53.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:53.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:53.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:53.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:53.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:53.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:53.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:53.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:53.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:53.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:53.788 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:08:53.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:53.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:53.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:53.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:54.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:54.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:54.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:54.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:54.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:54.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:54.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:08:54.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:54.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:54.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:54.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:08:54.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:08:54.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:54.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:08:54.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:08:54.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:54.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:54.259 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:08:54.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:54.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:08:54.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:54.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:54.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:54.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:54.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:54.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:54.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:54.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:54.426 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:08:54.426 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:08:54.426 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:08:54.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:54.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:54.426 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:54.426 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:54.426 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:54.426 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:54.426 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:54.426 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:54.426 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:08:59.431 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:08:59.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:08:59.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:59.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:59.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:59.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:59.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:08:59.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:08:59.440 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:59.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:08:59.441 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:08:59.443 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:08:59.443 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:08:59.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:08:59.444 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:59.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:08:59.444 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:08:59.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:08:59.444 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:08:59.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:08:59.446 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:08:59.447 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:08:59.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:08:59.447 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:59.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:08:59.447 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:08:59.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:08:59.447 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:08:59.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:08:59.449 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:08:59.449 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:08:59.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:08:59.449 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:08:59.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:08:59.450 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:08:59.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:08:59.450 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:08:59.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:08:59.453 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:08:59.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:08:59.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:08:59.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:08:59.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:08:59.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:08:59.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:08:59.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:59.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:08:59.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:08:59.453 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:08:59.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:59.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:59.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:08:59.454 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:08:59.454 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:08:59.454 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:59.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:08:59.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:59.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:59.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:59.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:59.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:08:59.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:59.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:08:59.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:08:59.458 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:08:59.936 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:08:59.976 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:08:59.978 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:08:59.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:08:59.979 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:08:59.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:08:59.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:08:59.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:00.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:00.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:00.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:00.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:00.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:00.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:00.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:00.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:00.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:00.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:00.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:00.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:00.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:00.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:00.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:00.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:00.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:00.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:00.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:00.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:00.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:00.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:00.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:00.405 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:09:00.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:00.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:00.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:00.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:00.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:00.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:00.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:00.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:00.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:00.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:00.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:00.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:00.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:00.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:00.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:00.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:00.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:00.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:00.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:00.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:00.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:00.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:00.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:00.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:00.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:00.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:00.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:00.878 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:09:01.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:01.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:01.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:01.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:01.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:01.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:01.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:01.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:01.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:01.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:01.043 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:01.043 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:01.043 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:09:01.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:01.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:06.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:06.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:06.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:06.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:06.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:06.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:06.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:06.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:06.058 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:06.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:06.058 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:09:06.061 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:09:06.061 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:09:06.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:06.061 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:06.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:06.061 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:09:06.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:06.062 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:09:06.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:06.064 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:09:06.064 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:09:06.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:06.064 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:06.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:06.064 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:09:06.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:06.064 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:09:06.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:06.066 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:09:06.066 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:09:06.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:06.066 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:06.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:06.067 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:09:06.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:06.067 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:09:06.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:06.069 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:09:06.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:09:06.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:09:06.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:09:06.069 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:09:06.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:09:06.070 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:09:06.070 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:09:06.070 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:06.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:06.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:06.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:06.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:06.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:06.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:06.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:06.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:06.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:06.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:06.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:06.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:06.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:06.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:06.075 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:09:06.552 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:09:06.597 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:09:06.599 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:09:06.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:06.602 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:09:06.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:06.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:06.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:06.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:06.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:06.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:06.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:06.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:06.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:06.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:06.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:06.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:06.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:06.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:06.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:06.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:06.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:06.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:06.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:06.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:06.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:06.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:06.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:06.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:06.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:06.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:06.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:06.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:06.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:06.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:07.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:07.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:07.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:07.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:07.023 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:09:07.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:07.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:07.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:07.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:07.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:07.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:07.035 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:07.035 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:07.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:07.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:07.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:07.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:07.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:07.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:07.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:07.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:07.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:07.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:07.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:07.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:07.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:07.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:07.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:07.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:07.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:07.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:07.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:07.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:07.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:07.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:07.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:07.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:07.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:07.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:07.494 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:09:07.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:07.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:07.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:07.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:07.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:07.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:07.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:07.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:07.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:07.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:07.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:07.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:07.665 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:07.665 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:07.665 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:09:07.665 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:07.665 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:07.665 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:07.665 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:07.665 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:07.665 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:07.665 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:12.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:12.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:12.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:12.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:12.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:12.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:12.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:12.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:12.678 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:12.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:12.678 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:09:12.681 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:09:12.681 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:09:12.682 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:12.682 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:12.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:12.682 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:09:12.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:12.683 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:09:12.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:12.684 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:09:12.684 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:09:12.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:12.684 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:12.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:12.684 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:09:12.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:12.684 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:09:12.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:12.686 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:09:12.686 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:09:12.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:12.686 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:12.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:12.687 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:09:12.687 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:12.687 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:09:12.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:12.689 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:09:12.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:09:12.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:09:12.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:09:12.689 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:09:12.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:09:12.690 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:09:12.690 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:09:12.690 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:12.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:12.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:12.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:12.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:12.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:12.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:12.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:12.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:12.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:12.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:12.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:12.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:12.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:12.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:12.695 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:09:13.172 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:09:13.213 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:09:13.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:13.216 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:09:13.218 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:09:13.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:13.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:13.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:13.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:13.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:13.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:13.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:13.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:13.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:13.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:13.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:13.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:13.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:13.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:13.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:13.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:13.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:13.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:13.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:13.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:13.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:13.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:13.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:13.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:13.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:13.644 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:09:13.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:13.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:13.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:13.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:13.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:13.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:13.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:13.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:13.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:14.116 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:09:14.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:14.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:14.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:14.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:14.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:14.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:14.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:14.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:14.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:14.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:14.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:14.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:14.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:14.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:14.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:14.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:14.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:14.586 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:09:14.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:14.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:14.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:14.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:15.057 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:09:15.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:15.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:15.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:15.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:15.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:15.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:15.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:15.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:15.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:15.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:15.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:15.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:15.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:15.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:15.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:15.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:15.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:15.530 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:09:15.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:15.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:15.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:15.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:16.003 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:09:16.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:16.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:16.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:16.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:16.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:16.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:16.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:16.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:16.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:16.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:16.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:16.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:16.332 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:16.332 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:16.332 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:09:21.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:21.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:21.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:21.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:21.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:21.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:21.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:21.342 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:21.342 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:21.342 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:21.343 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:09:21.345 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:09:21.345 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:09:21.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:21.345 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:21.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:21.346 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:09:21.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:21.346 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:09:21.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:21.347 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:09:21.347 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:09:21.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:21.347 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:21.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:21.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:09:21.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:21.348 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:09:21.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:21.349 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:09:21.349 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:09:21.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:21.350 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:21.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:21.350 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:09:21.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:21.350 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:09:21.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:21.353 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:09:21.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:09:21.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:09:21.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:09:21.353 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:09:21.354 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:09:21.354 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:09:21.354 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:21.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:21.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:21.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:21.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:21.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:21.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:21.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:21.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:21.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:21.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:21.359 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:09:21.836 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:09:21.878 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:09:21.878 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:09:21.879 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:09:21.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:21.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:21.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:21.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:21.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:21.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:21.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:21.899 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:21.899 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:21.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:21.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:21.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:21.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:21.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:22.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:22.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:22.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:22.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:22.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:22.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:22.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:22.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:22.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:22.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:22.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:22.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:22.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:22.306 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:09:22.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:22.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:22.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:22.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:22.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:22.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:22.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:22.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:22.779 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:09:22.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:22.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:22.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:22.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:22.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:22.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:22.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:22.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:22.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:22.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:22.820 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:22.820 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:22.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:22.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:22.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:22.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:22.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:23.251 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:09:23.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:23.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:23.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:23.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:23.722 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:09:23.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:23.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:23.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:23.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:23.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:23.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:23.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:23.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:23.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:23.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:23.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:23.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:23.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:23.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:23.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:23.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:23.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:24.193 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:09:24.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:24.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:24.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:24.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:24.664 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:09:24.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:24.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:24.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:24.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:24.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:24.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:24.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:24.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:24.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:24.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:24.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:24.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:24.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:24.990 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:24.990 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:09:24.991 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:24.991 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:24.991 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:24.991 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:24.991 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:24.991 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:24.991 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:29.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:29.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:29.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:29.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:29.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:29.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:30.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:30.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:30.008 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:30.008 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:30.008 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:09:30.012 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:09:30.013 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:09:30.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:30.013 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:30.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:30.014 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:09:30.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:30.015 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:09:30.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:30.016 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:09:30.017 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:09:30.017 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:30.017 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:30.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:30.017 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:09:30.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:30.018 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:09:30.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:30.019 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:09:30.020 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:09:30.020 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:30.020 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:30.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:30.020 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:09:30.020 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:30.020 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:09:30.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:30.024 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:09:30.024 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:09:30.024 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:09:30.025 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:30.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:30.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:30.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:30.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:30.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:30.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:30.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:30.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:30.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:30.029 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:09:30.504 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:09:30.552 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:09:30.554 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:09:30.556 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:09:30.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:30.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:30.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:30.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:30.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:30.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:30.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:30.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:30.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:30.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:30.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:30.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:30.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:30.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:30.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:30.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:30.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:30.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:30.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:30.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:30.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:30.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:30.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:30.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:30.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:30.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:30.976 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:09:30.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:30.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:30.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:30.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:30.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:31.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:31.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:31.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:31.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:31.447 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:09:31.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:31.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:31.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:31.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:31.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:31.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:31.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:31.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:31.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:31.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:31.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:31.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:31.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:31.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:31.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:31.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:31.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:31.921 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:09:32.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:32.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:32.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:32.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:32.393 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:09:32.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:32.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:32.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:32.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:32.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:32.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:32.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:32.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:32.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:32.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:32.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:32.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:32.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:32.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:32.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:32.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:32.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:32.865 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:09:33.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:33.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:33.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:33.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:33.336 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:09:33.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:33.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:33.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:33.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:33.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:33.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:33.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:33.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:33.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:33.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:33.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:33.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:33.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:33.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:33.670 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:09:33.670 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:33.670 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:33.670 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:33.670 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:33.670 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:33.670 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:33.670 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:38.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:38.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:38.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:38.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:38.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:38.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:38.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:38.683 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:38.683 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:38.683 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:38.683 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:09:38.687 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:09:38.688 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:09:38.688 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:38.688 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:38.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:38.689 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:09:38.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:38.689 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:09:38.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:38.692 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:09:38.692 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:09:38.692 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:38.692 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:38.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:38.692 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:09:38.692 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:38.692 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:09:38.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:38.695 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:09:38.695 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:09:38.695 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:38.695 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:38.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:38.695 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:09:38.695 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:38.695 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:09:38.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:38.699 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:09:38.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:09:38.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:09:38.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:09:38.699 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:09:38.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:09:38.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:09:38.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:38.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:09:38.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:09:38.699 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:09:38.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:09:38.700 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:09:38.700 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:09:38.700 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:38.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:38.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:38.705 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:09:39.180 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:09:39.236 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:09:39.238 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:09:39.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:39.239 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:09:39.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:39.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:39.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:39.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:39.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:39.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:39.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:39.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:39.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:39.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:39.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:39.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:39.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:39.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:39.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:39.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:39.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:39.653 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:09:39.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:39.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:39.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:39.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:39.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:39.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:39.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:39.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:39.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:39.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:39.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:39.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:39.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:39.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:39.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:39.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:39.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:40.124 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:09:40.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:40.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:40.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:40.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:40.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:40.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:40.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:40.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:40.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:40.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:40.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:40.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:40.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:40.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:40.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:40.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:40.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:40.597 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:09:40.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:40.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:40.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:40.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:41.070 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:09:41.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:41.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:41.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:41.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:41.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:41.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:41.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:41.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:41.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:41.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:41.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:09:41.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:09:41.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:41.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:09:41.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:09:41.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:41.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:41.541 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:09:41.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:41.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:41.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:41.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:42.013 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:09:42.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:42.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:09:42.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:42.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:42.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:42.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:42.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:42.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:42.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:42.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:42.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:42.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:42.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:42.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:42.349 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:09:42.349 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:42.349 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:42.349 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:42.349 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:42.349 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:42.350 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:42.350 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:42.350 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:42.350 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:42.350 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:42.350 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:47.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:47.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:47.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:47.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:47.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:47.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:47.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:47.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:47.361 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:47.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:47.362 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:09:47.368 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:09:47.368 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:09:47.369 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:47.369 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:47.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:47.370 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:09:47.370 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:47.370 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:09:47.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:47.373 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:09:47.374 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:09:47.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:47.374 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:47.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:47.374 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:09:47.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:47.374 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:09:47.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:47.378 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:09:47.378 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:09:47.379 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:47.379 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:47.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:47.379 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:09:47.379 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:47.379 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:09:47.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:47.384 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:09:47.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:09:47.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:09:47.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:09:47.384 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:09:47.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:09:47.385 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:09:47.385 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:09:47.385 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:47.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:47.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:47.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:47.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:47.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:47.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:47.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:47.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:47.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:47.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:47.390 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:09:47.867 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:09:47.912 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:09:47.914 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:09:47.915 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:09:47.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:47.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:47.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:47.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:47.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:47.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:47.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:47.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:47.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:47.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:47.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:47.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:47.945 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:09:47.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:47.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:52.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:52.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:52.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:52.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:52.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:52.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:52.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:52.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:52.961 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:52.961 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:52.961 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:09:52.964 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:09:52.965 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:09:52.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:52.965 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:52.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:52.966 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:09:52.966 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:52.967 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:09:52.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:52.968 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:09:52.968 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:09:52.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:52.969 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:52.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:52.969 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:09:52.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:52.969 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:09:52.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:52.971 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:09:52.971 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:09:52.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:52.971 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:52.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:52.971 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:09:52.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:52.971 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:09:52.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:52.974 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:09:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:09:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:09:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:09:52.974 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:09:52.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:09:52.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:09:52.975 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:09:52.975 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:09:52.975 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:52.980 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:09:53.458 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:09:53.492 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:09:53.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:53.494 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:09:53.496 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:09:53.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:53.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:53.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:53.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:53.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:53.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:53.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:53.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:53.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:53.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:53.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:53.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:53.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:53.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:53.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:53.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:53.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:53.555 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:09:53.555 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:53.555 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:53.555 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:53.555 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:53.555 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:53.555 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:53.556 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:58.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:58.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:58.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:58.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:58.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:58.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:58.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:58.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:58.571 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:58.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:09:58.572 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:09:58.575 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:09:58.575 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:09:58.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:58.576 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:58.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:58.576 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:09:58.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:09:58.577 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:09:58.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:58.578 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:09:58.579 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:09:58.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:58.579 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:58.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:58.579 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:09:58.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:09:58.579 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:09:58.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:58.581 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:09:58.581 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:09:58.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:58.581 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:09:58.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:58.582 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:09:58.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:09:58.582 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:09:58.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:58.584 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:09:58.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:09:58.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:09:58.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:09:58.585 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:09:58.585 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:09:58.585 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:58.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:09:58.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:09:58.590 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:09:59.067 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:09:59.113 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:09:59.115 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:09:59.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:09:59.118 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:09:59.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:09:59.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:09:59.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:09:59.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:09:59.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:09:59.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:09:59.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:09:59.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:09:59.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:09:59.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:09:59.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:09:59.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:09:59.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:09:59.156 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:09:59.157 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:59.157 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:59.157 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:59.157 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:59.157 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:59.157 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:09:59.157 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:10:04.159 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:10:04.159 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:10:04.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:10:04.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:10:04.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:10:04.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:10:04.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:10:04.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:10:04.168 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:04.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:10:04.168 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:10:04.172 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:10:04.172 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:10:04.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:10:04.172 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:04.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:10:04.173 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:10:04.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:10:04.173 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:10:04.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:10:04.177 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:10:04.177 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:10:04.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:10:04.177 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:04.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:10:04.178 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:10:04.178 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:10:04.178 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:10:04.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:10:04.182 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:10:04.182 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:10:04.182 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:10:04.182 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:04.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:10:04.182 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:10:04.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:10:04.183 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:10:04.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:10:04.188 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:10:04.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:10:04.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:10:04.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:10:04.188 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:10:04.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:10:04.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:10:04.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:04.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:10:04.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:10:04.189 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:10:04.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:04.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:04.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:04.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:10:04.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:04.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:04.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:04.189 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:10:04.189 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:10:04.189 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:10:04.189 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:10:04.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:04.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:04.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:04.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:10:04.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:04.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:04.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:10:04.192 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:10:04.192 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:10:04.193 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:10:09.198 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:10:09.198 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:10:09.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:10:09.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:10:09.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:10:09.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:10:09.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:10:09.207 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:10:09.207 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:09.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:10:09.208 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:10:09.212 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:10:09.212 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:10:09.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:10:09.213 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:09.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:10:09.213 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:10:09.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:10:09.214 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:10:09.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:10:09.216 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:10:09.216 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:10:09.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:10:09.216 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:09.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:10:09.216 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:10:09.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:10:09.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:10:09.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:10:09.219 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:10:09.219 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:10:09.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:10:09.219 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:09.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:10:09.219 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:10:09.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:10:09.219 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:10:09.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:10:09.222 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:10:09.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:10:09.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:10:09.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:10:09.222 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:10:09.223 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:10:09.223 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:10:09.223 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:10:09.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:09.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:09.228 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:10:09.705 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:10:09.760 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:10:09.762 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:10:09.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:09.766 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:10:09.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:09.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:09.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:09.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:09.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:09.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:09.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:09.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:09.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:09.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:09.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:09.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:09.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:10.177 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:10:10.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:10:10.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:10:10.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:10:10.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:10:10.648 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:10:10.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:10.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:10.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:10.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:10.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:10.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:10.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:10.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:10.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:10.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:10.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:10.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:10.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:10.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:10.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:10.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:10.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:11.119 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:10:11.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:10:11.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:10:11.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:10:11.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:10:11.592 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:10:11.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:11.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:11.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:11.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:11.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:11.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:11.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:11.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:11.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:11.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:11.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:11.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:11.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:11.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:11.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:11.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:11.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:12.065 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:10:12.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:10:12.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:10:12.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:10:12.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:10:12.537 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:10:12.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:12.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:12.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:12.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:12.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:12.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:12.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:12.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:12.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:12.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:12.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:12.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:12.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:12.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:12.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:12.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:12.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:13.008 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:10:13.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:10:13.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:10:13.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:10:13.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:10:13.481 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:10:13.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:13.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:13.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:13.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:13.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:13.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:13.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:13.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:13.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:13.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:13.675 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:13.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:13.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:13.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:13.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:13.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:13.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:13.954 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:10:14.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:10:14.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:10:14.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:10:14.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:10:14.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:14.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:14.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:14.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:14.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:14.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:14.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:14.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:14.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:14.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:14.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:14.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:14.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:14.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:14.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:14.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:14.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:14.426 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:10:14.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:14.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:14.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:14.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:14.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:14.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:14.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:14.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:14.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:14.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:14.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:14.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:14.899 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:10:14.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:14.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:14.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:14.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:14.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:15.372 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:10:15.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:15.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:15.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:15.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:15.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:15.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:15.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:15.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:15.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:15.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:15.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:15.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:15.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:15.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:15.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:15.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:15.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:15.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:15.844 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:10:16.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:16.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:16.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:16.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:16.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:16.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:16.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:16.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:16.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:16.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:16.179 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:16.179 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:16.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:16.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:16.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:16.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:16.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:16.315 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:10:16.788 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:10:16.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:16.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:16.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:16.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:16.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:16.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:16.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:16.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:16.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:16.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:16.862 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:16.862 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:16.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:16.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:16.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:16.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:16.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:16.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:17.260 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:10:17.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:17.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:17.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:17.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:17.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:17.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:17.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:17.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:17.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:17.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:17.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:17.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:17.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:17.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:17.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:17.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:17.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:17.733 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:10:18.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:18.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:18.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:18.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:18.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:18.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:18.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:18.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:18.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:18.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:18.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:18.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:18.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:18.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:18.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:18.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:18.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:18.204 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:10:18.677 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:10:18.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:18.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:18.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:18.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:18.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:18.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:18.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:18.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:18.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:18.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:18.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:18.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:18.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:18.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:18.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:18.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:18.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:19.149 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:10:19.621 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:10:19.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:19.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:19.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:19.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:19.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:19.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:19.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:19.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:19.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:19.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:19.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:19.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:19.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:19.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:19.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:19.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:19.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:20.092 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:10:20.563 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:10:20.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:20.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:20.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:20.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:20.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:20.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:20.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:20.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:20.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:20.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:20.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:20.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:20.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:20.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:20.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:20.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:20.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:21.036 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:10:21.509 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:10:21.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:21.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:21.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:21.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:21.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:21.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:21.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:21.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:21.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:21.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:21.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:21.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:21.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:21.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:21.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:21.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:21.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:21.980 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:10:22.451 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:10:22.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:22.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:22.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:22.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:22.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:22.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:22.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:22.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:22.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:22.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:22.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:22.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:22.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:22.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:22.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:22.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:22.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:22.925 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:10:23.397 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:10:23.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:23.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:23.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:23.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:23.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:23.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:23.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:23.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:23.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:23.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:23.500 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:23.500 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:23.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:23.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:23.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:23.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:23.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:23.869 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:10:24.340 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:10:24.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:24.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:24.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:24.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:24.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:24.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:24.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:24.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:24.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:24.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:24.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:24.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:24.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:24.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:24.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:24.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:24.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:24.814 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:10:25.286 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:10:25.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:25.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:25.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:25.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:25.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:25.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:25.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:25.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:25.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:25.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:25.427 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:25.427 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:25.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:25.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:25.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:25.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:25.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:25.758 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:10:26.229 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:10:26.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:26.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:26.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:26.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:26.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:10:26.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:10:26.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:10:26.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:10:26.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:10:26.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:10:26.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:10:26.381 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:10:26.381 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:10:26.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:10:26.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:10:26.382 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3707 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:10:26.382 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3707 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:10:26.382 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3707 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:10:26.382 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3707 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:10:26.383 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3707 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:10:26.383 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3707 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:10:26.383 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3707 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:10:31.383 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:10:31.383 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:10:31.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:10:31.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:10:31.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:10:31.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:10:31.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:10:31.390 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:10:31.390 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:31.390 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:10:31.390 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:10:31.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:10:31.391 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:10:31.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:10:31.392 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:31.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:10:31.392 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:10:31.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:10:31.393 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:10:31.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:10:31.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:10:31.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:10:31.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:10:31.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:31.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:10:31.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:10:31.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:10:31.394 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:10:31.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:10:31.396 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:10:31.396 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:10:31.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:10:31.397 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:31.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:10:31.397 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:10:31.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:10:31.397 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:10:31.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:10:31.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:10:31.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:10:31.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:10:31.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:10:31.400 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:10:31.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:10:31.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:10:31.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:31.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:10:31.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:10:31.401 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:10:31.401 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:31.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:31.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:31.406 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:10:31.883 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:10:31.931 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:10:31.933 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:10:31.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:31.935 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:10:31.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:31.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:31.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:31.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:31.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:31.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:31.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:31.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:31.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:31.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:31.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:31.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:31.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:32.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:32.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:32.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:32.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:32.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:32.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:32.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:32.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:32.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:32.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:32.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:32.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:32.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:32.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:32.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:32.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:32.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:32.355 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:10:32.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:10:32.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:10:32.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:10:32.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:10:32.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:32.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:32.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:32.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:32.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:32.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:32.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:32.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:32.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:32.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:32.495 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:32.495 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:32.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:32.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:32.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:32.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:32.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:32.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:32.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:32.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:32.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:32.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:32.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:32.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:10:32.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:32.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:32.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:32.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:10:32.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:10:32.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:32.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:10:32.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:10:32.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:32.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:32.826 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:10:32.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:10:33.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:10:33.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:10:33.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:10:33.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:10:33.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:10:33.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:10:33.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:10:33.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:10:33.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:10:33.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:10:33.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:10:33.008 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:10:33.008 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:10:33.008 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:10:38.015 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:10:38.015 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:10:38.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:10:38.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:10:38.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:10:38.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:10:38.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:10:38.023 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:10:38.023 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:38.023 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:10:38.023 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:10:38.027 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:10:38.027 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:10:38.027 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:10:38.027 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:38.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:10:38.027 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:10:38.028 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:10:38.028 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:10:38.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:10:38.030 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:10:38.031 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:10:38.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:10:38.031 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:38.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:10:38.031 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:10:38.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:10:38.031 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:10:38.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:10:38.033 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:10:38.034 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:10:38.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:10:38.034 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:10:38.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:10:38.034 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:10:38.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:10:38.034 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:10:38.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:10:38.037 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:10:38.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:10:38.038 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:10:38.038 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:10:38.038 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:10:38.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:38.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:38.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:38.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:38.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:10:38.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:10:38.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:38.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:10:38.043 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:10:38.522 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:10:38.994 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:10:39.469 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:10:39.941 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:10:40.412 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:10:40.887 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:10:41.359 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:10:41.833 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:10:42.305 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:10:42.777 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:10:43.252 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:10:43.724 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:10:44.195 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:10:44.666 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:10:45.141 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:10:45.609 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:10:46.073 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:10:46.536 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:10:47.000 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:10:47.463 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:10:47.930 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:10:48.401 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:10:48.876 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:10:49.348 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:10:49.824 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:10:50.296 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:10:50.769 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:10:51.242 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:10:51.713 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:10:52.187 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:10:52.653 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:10:53.126 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:10:53.597 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:10:54.068 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:10:54.544 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:10:55.016 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:10:55.491 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:10:55.963 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:10:56.438 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:10:56.910 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:10:57.380 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:10:57.851 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:10:58.327 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:10:58.799 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:10:59.274 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:10:59.746 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:11:00.221 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:11:00.693 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:11:01.168 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:11:01.640 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:11:02.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:11:02.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:11:02.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:11:02.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:11:02.070 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:11:02.070 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:11:02.070 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:11:02.070 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5195 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:11:02.071 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5195 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:11:02.071 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5195 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:11:02.071 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5195 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:11:02.071 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5195 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:11:02.071 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5195 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:11:02.071 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5195 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:11:07.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:11:07.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:11:07.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:11:07.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:11:07.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:11:07.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:11:07.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:11:07.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:11:07.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:11:07.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:11:07.086 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:11:07.089 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:11:07.090 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:11:07.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:11:07.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:11:07.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:11:07.091 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:11:07.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:11:07.091 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:11:07.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:11:07.093 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:11:07.093 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:11:07.093 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:11:07.093 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:11:07.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:11:07.094 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:11:07.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:11:07.094 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:11:07.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:11:07.096 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:11:07.096 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:11:07.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:11:07.096 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:11:07.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:11:07.096 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:11:07.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:11:07.096 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:11:07.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:11:07.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:11:07.100 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:11:07.100 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:11:07.100 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:07.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:07.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:07.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:07.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:07.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:07.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:07.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:07.104 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:11:07.582 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:11:08.054 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:11:08.530 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:11:09.002 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:11:09.477 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:11:09.949 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:11:10.425 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:11:10.896 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:11:11.372 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:11:11.844 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:11:12.315 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:11:12.790 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:11:13.262 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:11:13.737 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:11:14.209 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:11:14.684 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:11:15.156 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:11:15.631 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:11:16.103 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:11:16.579 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:11:17.051 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:11:17.526 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:11:17.998 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:11:18.473 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:11:18.945 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:11:19.420 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:11:19.892 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:11:20.368 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:11:20.840 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:11:21.315 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:11:21.787 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:11:22.262 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:11:22.734 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:11:23.209 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:11:23.681 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:11:24.157 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:11:24.629 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:11:25.103 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:11:25.575 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:11:26.047 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:11:26.521 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:11:26.993 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:11:27.465 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:11:27.938 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:11:28.411 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:11:28.883 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:11:29.358 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:11:29.830 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:11:30.304 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:11:30.776 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:11:31.248 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:11:31.722 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:11:32.194 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:11:32.666 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:11:33.137 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:11:33.612 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:11:34.084 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:11:34.559 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:11:35.031 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:11:35.507 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:11:35.980 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:11:36.454 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 02:11:36.926 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 02:11:37.402 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 02:11:37.873 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 02:11:38.349 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 02:11:38.821 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 02:11:39.296 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 02:11:39.768 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 02:11:40.244 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 02:11:40.716 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 02:11:41.191 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 02:11:41.663 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 02:11:42.138 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 02:11:42.610 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 02:11:43.086 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 02:11:43.557 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 02:11:44.033 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 02:11:44.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:11:44.505 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 02:11:44.980 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 02:11:45.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:11:45.452 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 02:11:45.928 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 02:11:46.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:11:46.399 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 02:11:46.870 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 02:11:47.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:11:47.346 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 02:11:47.818 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 02:11:48.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:11:48.293 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 02:11:48.768 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 02:11:49.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:11:49.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:11:49.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:11:49.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:11:49.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:11:49.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:11:49.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:11:49.133 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:11:54.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:11:54.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:11:54.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:11:54.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:11:54.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:11:54.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:11:54.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:11:54.147 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:11:54.147 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:11:54.147 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:11:54.148 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:11:54.151 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:11:54.152 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:11:54.152 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:11:54.152 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:11:54.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:11:54.153 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:11:54.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:11:54.153 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:11:54.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:11:54.156 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:11:54.157 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:11:54.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:11:54.157 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:11:54.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:11:54.158 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:11:54.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:11:54.158 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:11:54.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:11:54.160 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:11:54.160 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:11:54.160 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:11:54.160 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:11:54.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:11:54.160 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:11:54.161 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:11:54.161 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:11:54.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:11:54.164 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:11:54.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:11:54.164 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:11:54.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:11:54.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:11:54.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:11:54.165 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:11:54.165 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:11:54.165 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:54.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:11:54.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:11:54.170 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:11:54.648 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:11:54.694 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:11:54.696 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:11:54.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:11:54.698 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:11:54.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:11:54.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:11:54.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:11:54.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:11:54.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:11:54.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:11:54.718 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:11:54.718 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:11:54.740 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:11:54.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:11:54.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:11:54.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:11:54.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:11:54.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:11:55.119 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:11:55.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:11:55.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:11:55.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:11:55.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:11:55.591 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:11:55.605 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:11:56.065 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:11:56.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:11:56.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:11:56.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:11:56.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:11:56.538 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:11:57.008 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:11:57.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:11:57.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:11:57.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:11:57.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:11:57.482 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:11:57.955 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:11:58.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:11:58.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:11:58.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:11:58.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:11:58.427 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:11:58.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:11:58.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:11:58.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:11:58.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:11:58.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:11:58.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:11:58.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:11:58.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:11:58.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:11:58.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:11:58.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:11:58.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:11:58.565 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:11:58.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:11:58.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:11:58.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:11:58.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:11:58.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:11:58.897 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:11:59.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:11:59.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:11:59.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:11:59.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:11:59.369 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:11:59.697 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:11:59.839 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:12:00.310 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:12:00.781 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:12:01.252 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:12:01.725 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:12:02.198 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:12:02.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:02.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:02.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:02.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:02.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:02.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:02.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:12:02.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:02.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:02.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:02.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:12:02.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:12:02.614 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:02.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:02.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:02.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:02.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:02.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:02.670 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:12:03.104 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:12:03.141 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:12:03.614 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:12:04.086 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:12:04.558 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:12:05.029 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:12:05.500 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:12:05.974 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:12:06.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:06.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:06.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:06.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:06.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:06.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:06.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:12:06.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:06.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:06.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:06.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:12:06.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:12:06.438 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:06.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:06.446 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:12:06.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:06.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:06.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:06.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:06.917 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:12:07.307 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:12:07.388 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:12:07.777 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:12:07.859 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:12:08.333 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:12:08.719 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:12:08.805 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:12:09.277 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:12:09.749 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:12:10.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:10.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:10.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:10.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:10.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:10.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:10.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:10.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:10.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:12:10.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:12:10.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:12:10.161 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:12:10.161 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:12:10.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:12:10.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:12:10.162 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3457 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:10.162 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3457 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:10.162 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3457 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:10.162 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3457 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:10.162 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3457 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:10.162 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3457 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:10.162 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3457 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:15.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:12:15.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:12:15.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:12:15.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:12:15.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:12:15.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:12:15.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:12:15.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:12:15.171 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:12:15.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:12:15.172 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:12:15.175 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:12:15.175 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:12:15.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:12:15.175 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:12:15.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:12:15.176 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:12:15.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:12:15.177 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:12:15.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:15.178 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:12:15.178 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:12:15.178 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:12:15.178 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:12:15.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:12:15.178 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:12:15.179 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:12:15.179 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:12:15.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:15.181 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:12:15.181 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:12:15.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:12:15.181 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:12:15.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:12:15.181 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:12:15.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:12:15.181 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:12:15.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:15.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:12:15.185 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:12:15.185 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:12:15.185 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:15.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:15.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:15.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:15.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:15.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:15.189 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:12:15.667 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:12:15.710 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:12:15.713 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:15.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:15.715 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:12:15.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:15.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:15.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:12:15.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:15.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:15.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:15.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:12:15.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:12:15.760 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:15.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:15.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:15.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:15.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:15.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:16.140 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:12:16.146 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:16.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:16.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:16.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:16.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:16.611 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:12:16.625 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:16.628 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:12:17.082 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:12:17.105 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:17.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:17.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:17.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:17.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:17.555 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:12:17.585 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:18.028 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:12:18.071 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:18.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:18.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:18.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:18.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:18.500 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:12:18.551 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:18.974 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:12:19.032 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:19.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:19.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:19.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:19.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:19.447 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:12:19.518 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:19.919 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:12:19.998 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:20.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:20.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:20.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:20.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:20.390 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:12:20.478 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:20.863 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:12:20.958 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:21.336 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:12:21.444 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:21.808 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:12:21.924 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:22.282 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:12:22.404 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:22.754 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:12:22.890 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:23.227 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:12:23.370 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:23.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:23.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:23.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:23.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:23.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:23.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:23.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:12:23.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:23.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:23.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:23.385 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:12:23.385 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:12:23.409 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:23.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:23.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:23.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:23.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:23.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:23.697 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:12:24.091 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:24.168 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:12:24.571 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:24.573 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:12:24.642 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:12:25.056 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:25.114 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:12:25.536 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:25.585 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:12:26.016 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:26.056 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:12:26.496 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:26.527 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:12:26.976 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:26.998 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:12:27.456 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:27.469 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:12:27.935 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:27.939 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:12:28.410 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:12:28.416 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:28.884 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:12:28.896 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:29.356 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:12:29.382 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:29.829 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:12:29.862 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:30.302 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:12:30.342 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:30.775 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:12:30.828 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:31.247 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:12:31.308 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:31.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:31.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:31.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:31.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:31.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:31.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:31.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:12:31.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:31.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:31.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:31.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:12:31.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:12:31.334 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:31.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:31.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:31.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:31.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:31.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:31.682 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:31.718 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:12:32.152 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:32.154 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:12:32.191 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:12:32.623 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:32.663 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:12:33.099 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:33.135 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:12:33.570 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:33.607 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:12:34.041 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:34.080 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:12:34.511 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:34.552 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:12:34.988 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:35.024 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:12:35.459 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:35.495 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:12:35.930 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:35.969 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:12:36.400 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:36.441 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:12:36.877 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:36.913 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:12:37.348 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:37.384 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:12:37.818 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:37.857 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:12:38.289 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:38.330 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:12:38.766 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:38.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:38.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:38.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:38.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:38.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:38.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:38.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:12:38.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:38.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:38.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:38.791 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:12:38.791 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:12:38.797 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:38.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:38.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:38.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:38.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:38.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:38.802 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:12:39.192 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:39.273 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:12:39.662 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:39.665 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:12:39.744 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:12:40.132 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:40.135 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:12:40.217 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:12:40.603 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:40.690 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:12:41.080 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:41.083 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:12:41.162 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:12:41.551 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:41.635 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:12:42.022 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:42.107 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:12:42.498 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:42.579 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:12:42.969 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:43.050 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:12:43.439 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:43.521 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:12:43.910 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:43.995 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:12:44.381 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:44.467 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 02:12:44.857 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:44.939 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 02:12:45.328 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:45.410 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 02:12:45.799 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:45.883 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 02:12:46.270 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:46.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:46.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:46.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:46.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:46.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:46.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:46.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:46.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:46.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:12:46.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:12:46.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:12:46.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:12:46.293 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:12:46.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:12:46.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:12:46.293 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6721 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:46.293 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:46.293 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:46.293 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:46.293 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:46.293 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:46.293 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:51.297 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:12:51.297 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:12:51.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:12:51.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:12:51.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:12:51.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:12:51.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:12:51.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:12:51.305 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:12:51.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:12:51.305 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:12:51.307 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:12:51.307 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:12:51.307 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:12:51.307 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:12:51.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:12:51.308 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:12:51.308 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:12:51.308 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:12:51.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:51.309 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:12:51.309 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:12:51.309 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:12:51.309 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:12:51.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:12:51.309 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:12:51.309 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:12:51.309 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:12:51.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:51.311 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:12:51.311 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:12:51.311 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:12:51.311 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:12:51.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:12:51.311 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:12:51.311 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:12:51.311 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:12:51.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:51.313 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:12:51.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:12:51.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:12:51.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:12:51.313 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:12:51.314 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:12:51.314 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:12:51.314 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:51.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:12:51.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:12:51.319 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:12:51.797 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:12:51.837 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:12:51.839 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:12:51.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:51.841 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:12:51.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:51.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:51.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:12:51.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:51.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:51.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:51.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:12:51.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:12:51.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:51.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:51.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:51.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:51.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:52.269 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:12:52.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:52.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:52.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:52.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:52.740 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:12:53.214 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:12:53.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:53.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:53.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:53.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:53.687 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:12:54.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:54.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:54.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:54.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:54.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:54.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:54.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:12:54.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:54.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:54.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:54.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:12:54.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:12:54.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:54.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:54.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:54.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:54.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:54.158 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:12:54.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:54.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:54.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:54.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:54.630 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:12:55.103 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:12:55.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:55.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:55.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:55.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:55.576 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:12:56.048 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:12:56.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:56.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:56.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:56.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:56.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:56.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:56.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:12:56.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:56.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:56.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:56.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:12:56.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:12:56.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:56.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:12:56.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:12:56.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:56.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:56.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:56.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:56.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:56.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:56.519 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:12:56.993 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:12:57.465 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:12:57.937 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:12:58.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:12:58.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:12:58.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:12:58.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:12:58.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:12:58.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:12:58.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:12:58.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:12:58.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:12:58.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:12:58.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:12:58.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:12:58.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:12:58.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:12:58.353 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:12:58.353 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1520 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:58.353 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1520 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:58.353 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1520 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:58.353 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1520 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:58.353 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1520 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:58.353 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1520 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:12:58.353 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1520 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:03.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:13:03.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:13:03.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:03.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:03.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:03.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:03.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:03.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:13:03.366 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:03.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:13:03.366 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:13:03.369 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:13:03.369 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:13:03.370 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:13:03.370 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:03.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:03.370 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:13:03.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:13:03.371 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:13:03.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:03.372 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:13:03.372 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:13:03.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:13:03.372 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:03.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:03.372 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:13:03.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:13:03.372 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:13:03.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:03.374 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:13:03.374 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:13:03.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:13:03.374 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:03.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:03.375 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:13:03.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:13:03.375 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:13:03.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:03.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:13:03.378 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:13:03.378 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:13:03.378 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:03.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:03.382 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:13:03.860 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:13:03.891 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:13:03.891 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:13:03.892 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:13:03.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:03.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:03.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:03.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:13:03.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:03.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:03.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:03.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:13:03.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:13:03.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:03.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:03.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:03.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:03.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:04.332 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:13:04.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:04.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:04.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:04.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:04.803 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:13:05.277 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:13:05.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:05.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:05.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:05.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:05.749 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:13:06.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:06.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:06.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:06.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:06.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:06.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:06.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:13:06.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:06.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:06.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:06.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:13:06.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:13:06.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:06.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:06.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:06.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:06.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:06.221 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:13:06.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:06.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:06.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:06.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:06.693 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:13:07.166 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:13:07.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:07.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:07.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:07.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:07.639 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:13:08.111 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:13:08.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:08.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:08.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:08.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:08.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:08.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:08.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:08.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:08.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:08.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:08.239 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:13:08.239 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:13:08.239 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:13:08.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:08.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:08.239 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1050 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:08.239 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1050 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:08.239 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1050 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:08.239 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1050 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:08.239 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1050 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:08.240 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1050 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:08.240 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1050 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:13.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:13:13.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:13:13.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:13.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:13.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:13.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:13.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:13.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:13:13.250 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:13.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:13:13.250 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:13:13.251 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:13:13.251 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:13:13.251 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:13:13.251 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:13.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:13.251 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:13:13.251 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:13:13.251 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:13:13.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:13.252 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:13:13.252 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:13:13.252 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:13:13.252 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:13.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:13.252 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:13:13.252 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:13:13.252 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:13:13.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:13.253 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:13:13.253 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:13:13.253 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:13:13.253 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:13.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:13.253 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:13:13.253 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:13:13.253 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:13:13.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:13.255 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:13:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:13:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:13:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:13:13.255 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:13:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:13:13.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:13:13.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:13:13.256 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:13:13.256 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:13:13.256 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:13.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:13.260 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:13:13.739 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:13:13.781 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:13:13.783 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:13:13.784 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:13:13.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:13.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:13.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:13.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:13:13.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:13.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:13.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:13.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:13:13.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:13:13.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:13.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:13.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:13.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:13.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:14.211 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:13:14.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:14.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:14.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:14.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:14.685 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:13:15.157 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:13:15.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:15.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:15.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:15.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:15.630 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:13:15.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:15.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:15.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:15.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:15.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:15.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:15.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:13:15.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:15.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:15.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:15.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:13:15.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:13:16.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:16.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:16.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:16.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:16.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:16.103 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:13:16.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:16.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:16.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:16.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:16.576 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:13:17.048 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:13:17.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:17.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:17.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:17.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:17.519 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:13:17.992 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:13:18.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:18.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:18.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:18.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:18.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:18.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:18.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:13:18.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:18.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:18.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:18.135 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:13:18.135 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:13:18.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:18.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:18.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:18.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:18.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:18.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:18.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:18.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:18.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:18.465 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:13:18.937 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:13:19.411 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:13:19.884 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:13:20.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:20.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:20.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:20.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:20.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:20.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:20.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:20.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:20.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:20.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:20.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:20.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:20.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:13:20.285 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:13:20.285 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:13:20.285 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1517 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:20.285 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1517 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:20.285 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1517 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:20.285 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1517 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:20.285 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1517 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:20.285 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1517 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:20.285 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1517 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:25.289 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:13:25.289 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:13:25.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:25.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:25.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:25.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:25.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:25.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:13:25.292 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:25.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:13:25.293 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:13:25.293 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:13:25.293 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:13:25.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:13:25.294 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:25.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:25.294 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:13:25.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:13:25.294 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:13:25.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:25.295 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:13:25.295 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:13:25.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:13:25.295 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:25.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:25.295 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:13:25.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:13:25.295 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:13:25.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:25.296 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:13:25.296 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:13:25.296 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:13:25.296 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:25.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:25.296 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:13:25.296 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:13:25.296 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:13:25.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:25.298 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:13:25.298 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:13:25.298 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:13:25.298 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:25.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:25.303 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:13:25.781 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:13:25.823 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:13:25.824 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:13:25.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:25.825 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:13:25.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:25.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:25.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:13:25.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:25.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:25.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:25.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:13:25.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:13:25.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:25.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:25.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:25.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:25.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:26.251 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:13:26.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:26.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:26.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:26.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:26.724 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:13:27.196 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:13:27.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:27.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:27.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:27.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:27.667 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:13:27.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:27.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:28.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:28.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:28.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:28.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:28.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:13:28.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:28.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:28.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:28.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:13:28.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:13:28.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:28.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:28.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:28.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:28.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:28.140 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:13:28.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:28.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:28.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:28.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:28.613 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:13:29.085 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:13:29.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:29.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:29.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:29.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:29.556 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:13:30.030 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:13:30.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:30.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:30.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:30.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:30.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:30.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:30.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:30.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:30.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:30.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:30.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:13:30.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:13:30.184 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:13:30.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:30.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:30.184 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1056 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:30.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1056 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:30.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1056 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:30.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1056 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:30.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1056 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:30.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1056 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:30.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1056 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:35.185 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:13:35.185 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:13:35.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:35.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:35.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:35.185 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:35.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:35.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:13:35.195 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:35.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:13:35.195 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:13:35.198 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:13:35.198 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:13:35.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:13:35.199 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:35.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:35.199 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:13:35.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:13:35.199 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:13:35.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:35.201 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:13:35.201 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:13:35.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:13:35.201 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:35.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:35.201 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:13:35.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:13:35.201 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:13:35.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:35.203 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:13:35.203 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:13:35.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:13:35.203 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:35.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:35.203 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:13:35.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:13:35.203 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:13:35.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:35.207 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:13:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:13:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:13:35.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:13:35.207 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:13:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:13:35.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:13:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:13:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:13:35.208 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:13:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:35.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:35.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:35.208 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:13:35.208 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:13:35.208 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:13:35.208 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:13:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:35.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:13:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:35.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:35.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:35.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:35.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:35.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:35.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:35.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:35.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:35.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:35.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:35.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:35.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:35.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:35.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:35.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:35.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:35.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:35.213 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:13:35.688 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:13:35.745 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:13:35.747 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:13:35.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:35.749 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:13:35.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:35.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:35.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:13:35.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:35.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:35.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:35.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:13:35.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:13:35.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:35.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:35.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:35.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:35.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:36.159 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:13:36.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:36.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:36.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:36.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:36.632 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:13:37.103 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:13:37.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:37.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:37.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:37.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:37.576 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:13:37.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:37.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:37.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:37.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:37.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:37.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:37.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:37.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:37.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:37.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:37.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:13:37.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:13:37.961 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:13:37.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:37.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:42.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:13:42.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:13:42.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:42.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:42.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:42.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:42.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:42.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:13:42.971 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:42.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:13:42.972 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:13:42.972 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:13:42.973 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:13:42.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:13:42.973 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:42.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:42.973 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:13:42.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:13:42.973 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:13:42.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:42.974 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:13:42.974 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:13:42.974 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:13:42.974 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:42.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:42.974 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:13:42.974 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:13:42.974 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:13:42.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:42.975 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:13:42.975 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:13:42.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:13:42.975 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:42.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:42.975 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:13:42.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:13:42.975 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:13:42.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:42.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:13:42.978 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:13:42.978 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:13:42.978 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:42.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:42.982 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:13:43.460 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:13:43.504 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:13:43.506 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:13:43.508 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:13:43.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:43.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:43.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:43.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:13:43.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:43.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:43.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:43.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:13:43.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:13:43.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:43.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:43.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:43.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:43.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:43.932 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:13:43.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:43.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:43.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:43.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:44.404 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:13:44.877 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:13:44.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:44.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:44.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:44.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:45.350 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:13:45.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:45.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:45.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:45.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:45.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:45.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:45.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:45.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:45.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:45.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:45.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:45.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:45.777 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:13:45.777 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:13:45.777 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:13:45.778 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:45.778 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:50.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:13:50.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:13:50.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:50.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:50.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:50.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:50.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:50.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:13:50.790 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:50.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:13:50.790 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:13:50.792 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:13:50.792 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:13:50.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:13:50.793 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:50.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:50.793 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:13:50.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:13:50.794 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:13:50.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:50.795 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:13:50.795 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:13:50.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:13:50.795 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:50.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:50.795 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:13:50.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:13:50.795 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:13:50.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:50.797 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:13:50.797 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:13:50.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:13:50.797 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:50.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:50.797 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:13:50.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:13:50.797 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:13:50.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:13:50.800 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:13:50.800 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:13:50.800 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:50.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:50.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:50.805 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:13:51.283 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:13:51.325 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:13:51.328 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:13:51.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:51.330 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:13:51.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:51.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:51.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:13:51.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:51.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:51.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:51.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:13:51.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:13:51.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:51.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:51.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:51.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:51.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:51.754 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:13:51.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:51.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:51.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:51.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:51.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:51.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:51.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:51.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:51.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:51.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:51.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:13:51.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:51.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:51.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:51.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:13:51.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:13:51.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:51.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:51.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:51.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:51.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:52.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:52.222 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:13:52.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:52.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:52.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:52.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:52.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:52.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:52.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:52.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:52.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:52.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:13:52.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:13:52.235 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:13:52.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:52.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:52.235 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=311 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:52.235 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:52.235 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:52.235 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:52.235 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:52.235 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:52.235 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:57.241 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:13:57.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:13:57.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:57.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:57.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:57.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:57.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:57.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:13:57.253 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:57.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:13:57.253 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:13:57.257 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:13:57.257 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:13:57.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:13:57.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:57.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:57.258 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:13:57.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:13:57.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:13:57.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:57.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:13:57.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:13:57.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:13:57.260 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:57.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:57.260 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:13:57.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:13:57.260 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:13:57.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:57.262 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:13:57.262 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:13:57.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:13:57.263 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:13:57.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:57.263 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:13:57.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:13:57.263 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:13:57.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:13:57.265 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:13:57.265 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:13:57.265 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:13:57.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:57.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:13:57.270 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:13:57.748 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:13:57.791 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:13:57.793 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:13:57.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:57.795 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:13:57.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:57.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:57.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:13:57.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:57.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:57.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:57.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:13:57.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:13:57.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:57.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:57.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:57.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:57.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:58.216 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:13:58.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:58.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:58.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:58.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:58.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:58.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:58.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:58.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:58.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:58.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:58.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:13:58.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:58.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:58.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:58.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:13:58.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:13:58.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:58.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:13:58.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:13:58.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:58.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:58.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:13:58.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:13:58.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:13:58.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:13:58.687 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:13:58.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:13:58.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:13:58.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:13:58.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:13:58.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:13:58.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:13:58.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:13:58.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:13:58.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:13:58.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:13:58.698 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:13:58.698 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:13:58.698 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:03.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:03.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:03.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:03.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:03.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:03.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:03.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:03.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:03.707 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:03.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:03.707 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:14:03.710 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:14:03.711 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:14:03.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:03.712 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:03.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:03.712 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:14:03.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:03.713 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:14:03.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:03.715 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:14:03.715 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:14:03.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:03.716 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:03.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:03.716 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:14:03.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:03.717 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:14:03.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:03.719 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:14:03.719 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:14:03.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:03.720 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:03.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:03.720 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:14:03.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:03.720 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:14:03.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:03.725 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:14:03.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:14:03.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:14:03.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:14:03.725 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:14:03.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:14:03.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:14:03.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:03.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:14:03.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:14:03.725 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:14:03.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:03.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:03.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:03.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:03.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:03.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:03.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:03.726 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:14:03.726 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:14:03.726 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:14:03.726 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:14:03.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:03.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:03.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:03.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:14:03.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:03.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:03.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:03.731 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:14:04.209 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:14:04.251 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:14:04.252 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:14:04.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:04.253 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:14:04.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:04.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:04.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:14:04.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:04.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:04.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:04.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:14:04.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:14:04.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:04.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:04.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:04.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:04.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:04.681 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:14:04.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:04.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:04.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:04.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:04.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:04.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:04.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:04.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:04.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:04.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:04.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:14:04.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:04.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:04.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:04.762 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:14:04.762 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:14:04.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:04.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:04.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:04.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:04.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:05.152 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:14:05.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:05.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:05.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:05.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:05.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:05.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:05.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:05.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:05.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:05.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:05.202 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:05.202 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:05.202 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:14:05.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:05.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:10.210 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:10.210 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:10.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:10.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:10.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:10.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:10.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:10.218 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:10.218 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:10.218 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:10.219 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:14:10.221 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:14:10.221 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:14:10.221 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:10.221 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:10.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:10.222 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:14:10.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:10.222 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:14:10.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:10.223 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:14:10.223 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:14:10.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:10.223 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:10.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:10.224 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:14:10.224 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:10.224 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:14:10.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:10.225 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:14:10.225 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:14:10.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:10.225 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:10.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:10.226 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:14:10.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:10.226 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:14:10.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:10.228 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:14:10.228 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:14:10.229 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:14:10.229 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:10.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:10.233 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:14:10.711 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:14:10.755 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:14:10.758 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:14:10.760 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:14:10.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:10.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:10.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:10.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:14:10.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:10.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:10.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:10.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:14:10.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:14:10.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:10.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:10.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:10.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:10.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:11.184 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:14:11.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:11.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:11.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:11.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:11.655 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:14:12.125 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:14:12.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:12.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:12.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:12.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:12.596 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:14:13.070 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:14:13.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:13.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:13.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:13.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:13.542 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:14:14.015 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:14:14.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:14.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:14.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:14.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:14.488 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:14:14.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:14.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:14.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:14.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:14.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:14.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:14.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:14.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:14.869 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:14.869 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:14.869 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:14:14.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:14.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:19.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:19.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:19.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:19.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:19.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:19.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:19.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:19.885 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:19.885 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:19.885 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:19.885 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:14:19.889 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:14:19.889 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:14:19.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:19.889 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:19.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:19.889 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:14:19.890 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:19.890 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:14:19.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:19.893 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:14:19.893 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:14:19.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:19.893 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:19.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:19.893 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:14:19.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:19.894 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:14:19.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:19.897 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:14:19.897 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:14:19.897 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:19.897 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:19.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:19.897 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:14:19.897 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:19.897 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:14:19.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:19.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:19.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:19.903 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:14:19.903 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:14:19.903 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:14:19.903 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:14:19.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:19.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:19.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:19.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:14:19.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:19.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:19.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:19.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:19.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:19.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:19.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:19.907 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:14:20.383 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:14:20.433 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:14:20.436 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:14:20.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:20.437 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:14:20.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:20.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:20.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:14:20.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:20.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:20.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:20.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:14:20.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:14:20.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:20.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:20.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:20.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:20.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:20.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:20.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:20.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:20.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:20.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:20.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:20.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:14:20.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:20.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:20.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:20.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:14:20.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:14:20.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:20.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:20.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:20.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:20.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:20.849 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:14:20.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:20.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:20.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:20.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:21.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:21.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:21.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:21.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:21.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:21.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:21.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:21.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:21.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:21.031 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:21.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:21.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:21.032 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:14:21.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:21.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:21.032 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=246 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:21.032 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=246 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:21.032 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=246 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:21.032 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=246 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:21.032 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=246 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:21.032 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=246 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:21.032 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=246 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:26.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:26.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:26.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:26.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:26.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:26.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:26.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:26.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:26.044 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:26.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:26.045 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:14:26.047 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:14:26.048 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:14:26.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:26.048 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:26.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:26.049 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:14:26.049 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:26.049 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:14:26.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:26.051 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:14:26.051 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:14:26.051 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:26.051 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:26.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:26.051 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:14:26.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:26.052 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:14:26.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:26.053 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:14:26.053 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:14:26.053 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:26.053 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:26.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:26.053 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:14:26.053 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:26.053 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:14:26.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:26.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:14:26.057 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:14:26.057 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:14:26.057 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:26.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:26.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:26.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:26.061 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:14:26.539 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:14:26.578 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:14:26.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:26.581 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:14:26.583 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:14:26.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:26.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:26.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:14:26.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:26.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:26.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:26.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:14:26.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:14:26.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:26.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:26.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:26.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:26.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:27.012 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:14:27.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:27.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:27.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:27.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:27.485 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:14:27.958 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:14:28.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:28.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:28.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:28.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:28.430 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:14:28.901 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:14:29.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:29.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:29.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:29.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:29.374 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:14:29.847 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:14:30.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:30.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:30.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:30.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:30.320 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:14:30.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:30.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:30.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:30.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:30.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:30.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:30.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:30.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:30.696 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:30.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:30.696 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:14:30.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:30.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:35.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:35.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:35.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:35.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:35.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:35.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:35.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:35.712 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:35.712 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:35.712 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:35.712 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:14:35.714 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:14:35.715 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:14:35.715 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:35.715 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:35.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:35.716 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:14:35.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:35.716 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:14:35.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:35.717 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:14:35.717 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:14:35.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:35.717 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:35.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:35.717 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:14:35.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:35.718 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:14:35.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:35.719 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:14:35.719 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:14:35.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:35.719 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:35.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:35.720 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:14:35.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:35.720 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:14:35.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:35.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:14:35.723 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:14:35.723 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:14:35.723 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:35.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:35.727 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:14:36.202 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:14:36.245 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:14:36.247 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:14:36.249 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:14:36.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:36.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:36.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:36.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:14:36.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:36.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:36.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:36.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:14:36.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:14:36.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:36.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:36.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:36.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:36.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:36.673 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:14:36.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:36.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:36.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:36.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:37.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:37.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:37.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:37.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:37.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:37.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:37.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:37.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:37.078 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:37.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:37.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:37.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:37.078 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:37.078 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:37.078 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:14:42.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:42.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:42.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:42.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:42.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:42.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:42.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:42.092 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:42.092 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:42.092 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:42.092 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:14:42.098 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:14:42.099 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:14:42.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:42.099 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:42.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:42.099 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:14:42.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:42.100 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:14:42.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:42.104 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:14:42.104 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:14:42.105 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:42.105 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:42.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:42.105 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:14:42.105 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:42.105 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:14:42.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:42.109 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:14:42.109 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:14:42.109 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:42.109 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:42.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:42.109 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:14:42.109 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:42.109 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:14:42.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:42.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:42.115 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:14:42.115 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:14:42.115 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:14:42.115 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:14:42.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:42.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:42.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:42.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:14:42.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:42.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:42.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:42.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:42.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:42.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:42.119 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:14:42.595 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:14:42.647 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:14:42.649 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:14:42.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:42.651 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:14:42.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:42.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:42.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:14:42.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:42.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:42.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:42.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:14:42.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:14:42.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:42.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:42.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:42.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:42.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:43.065 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:14:43.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:43.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:43.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:43.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:43.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:43.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:43.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:43.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:43.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:43.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:43.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:43.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:43.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:43.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:43.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:43.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:43.468 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:43.468 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:43.468 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:14:43.468 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:43.468 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:43.468 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:43.469 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:43.469 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:43.469 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:43.469 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:48.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:48.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:48.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:48.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:48.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:48.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:48.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:48.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:48.476 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:48.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:48.476 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:14:48.477 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:14:48.477 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:14:48.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:48.478 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:48.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:48.478 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:14:48.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:48.478 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:14:48.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:48.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:14:48.479 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:14:48.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:48.479 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:48.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:48.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:14:48.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:48.479 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:14:48.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:48.480 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:14:48.480 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:14:48.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:48.480 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:48.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:48.480 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:14:48.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:48.480 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:14:48.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:14:48.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:14:48.482 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:14:48.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:14:48.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:48.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:48.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:14:48.962 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:14:49.007 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:14:49.009 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:14:49.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:49.012 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:14:49.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:49.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:49.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:14:49.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:49.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:49.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:49.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:14:49.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:14:49.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:49.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:49.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:49.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:49.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:49.435 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:14:49.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:49.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:49.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:49.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:49.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:49.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:49.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:49.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:49.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:49.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:49.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:49.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:49.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:49.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:49.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:49.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:49.844 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:14:49.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:49.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:49.844 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:49.845 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:49.845 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:49.845 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:49.845 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:49.845 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:49.845 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:54.845 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:54.845 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:54.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:54.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:54.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:54.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:54.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:54.849 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:54.849 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:54.849 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:14:54.849 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:14:54.850 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:14:54.850 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:14:54.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:54.850 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:54.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:54.850 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:14:54.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:14:54.850 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:14:54.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:54.851 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:14:54.851 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:14:54.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:54.851 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:54.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:54.851 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:14:54.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:14:54.851 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:14:54.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:54.852 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:14:54.852 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:14:54.852 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:54.852 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:14:54.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:54.852 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:14:54.852 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:14:54.852 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:14:54.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:54.854 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:14:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:14:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:14:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:14:54.854 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:14:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:14:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:14:54.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:14:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:14:54.854 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:14:54.855 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:14:54.855 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:14:54.855 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:14:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:14:54.859 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:14:55.336 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:14:55.381 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:14:55.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:55.382 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:14:55.383 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:14:55.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:55.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:55.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:14:55.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:55.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:55.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:55.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:14:55.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:14:55.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:55.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:14:55.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:14:55.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:55.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:55.806 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:14:55.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:55.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:55.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:55.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:56.279 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:14:56.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:14:56.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:14:56.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:14:56.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:14:56.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:14:56.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:14:56.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:14:56.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:14:56.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:14:56.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:14:56.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:14:56.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:14:56.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:14:56.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:14:56.351 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:14:56.351 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:56.351 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:56.351 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:14:56.351 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:01.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:15:01.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:15:01.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:01.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:01.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:01.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:01.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:01.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:15:01.367 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:01.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:15:01.367 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:15:01.372 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:15:01.372 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:15:01.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:15:01.372 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:01.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:15:01.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:01.373 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:15:01.373 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:15:01.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:01.378 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:15:01.378 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:15:01.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:15:01.378 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:01.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:01.378 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:15:01.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:15:01.379 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:15:01.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:01.381 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:15:01.381 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:15:01.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:15:01.382 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:01.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:01.382 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:15:01.382 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:15:01.382 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:15:01.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:01.386 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:15:01.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:15:01.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:15:01.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:15:01.386 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:15:01.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:15:01.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:15:01.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:15:01.387 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:15:01.387 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:15:01.387 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:01.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:01.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:01.392 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:15:01.870 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:15:01.909 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:15:01.911 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:15:01.912 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:15:01.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:15:01.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:15:01.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:15:01.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:15:01.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:01.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:15:01.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:15:01.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:15:01.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:15:02.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:15:02.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:15:02.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:15:02.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:02.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:02.340 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:15:02.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:02.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:02.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:02.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:02.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:02.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:15:02.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:15:02.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:15:02.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:02.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:02.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:02.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:02.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:02.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:02.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:15:02.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:15:02.746 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:15:02.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:02.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:02.746 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:02.746 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:02.746 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:02.746 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:02.746 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:02.746 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:02.746 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:07.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:15:07.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:15:07.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:07.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:07.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:07.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:07.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:07.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:15:07.753 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:07.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:15:07.753 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:15:07.754 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:15:07.754 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:15:07.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:15:07.754 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:07.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:07.754 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:15:07.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:15:07.754 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:15:07.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:07.755 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:15:07.755 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:15:07.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:15:07.755 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:07.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:07.755 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:15:07.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:15:07.755 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:15:07.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:07.756 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:15:07.756 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:15:07.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:15:07.756 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:07.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:07.756 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:15:07.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:15:07.757 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:15:07.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:07.758 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:15:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:15:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:15:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:15:07.758 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:15:07.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:15:07.759 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:15:07.759 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:15:07.759 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:07.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:07.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:07.763 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:15:08.242 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:15:08.283 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:15:08.285 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:15:08.286 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:15:08.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:15:08.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:15:08.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:15:08.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:15:08.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:08.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:15:08.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:15:08.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:15:08.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:15:08.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:15:08.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:15:08.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:15:08.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:08.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:08.713 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:15:08.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:08.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:08.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:08.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:09.185 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:15:09.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:09.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:15:09.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:15:09.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:15:09.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:09.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:09.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:09.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:09.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:09.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:09.257 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:15:09.257 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:15:09.257 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:15:09.257 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:09.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:14.261 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:15:14.261 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:15:14.261 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:14.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:14.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:14.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:14.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:14.273 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:15:14.273 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:14.273 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:15:14.273 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:15:14.277 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:15:14.277 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:15:14.278 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:15:14.278 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:14.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:14.278 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:15:14.278 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:15:14.278 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:15:14.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:14.282 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:15:14.282 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:15:14.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:15:14.282 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:14.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:14.283 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:15:14.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:15:14.283 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:15:14.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:14.286 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:15:14.286 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:15:14.287 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:15:14.287 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:14.287 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:14.287 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:15:14.287 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:15:14.287 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:15:14.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:14.292 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:15:14.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:15:14.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:15:14.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:15:14.292 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:15:14.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:15:14.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:15:14.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:14.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:15:14.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:15:14.293 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:15:14.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:14.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:14.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:14.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:14.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:14.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:14.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:14.293 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:15:14.293 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:15:14.293 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:15:14.294 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:15:14.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:14.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:14.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:14.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:15:14.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:14.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:14.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:14.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:14.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:14.298 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:15:14.777 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:15:14.827 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:15:14.830 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:15:14.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:15:14.832 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:15:14.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:15:14.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:15:14.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:15:14.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:14.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:15:14.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:15:14.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:15:14.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:15:15.249 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:15:15.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:15.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:15.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:15.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:15.729 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:15:15.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:15:16.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:15:16.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:15:16.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:15:16.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:15:16.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:15:16.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:15:16.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:16.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:15:16.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:15:16.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:15:16.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:15:16.201 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:15:16.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:16.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:16.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:16.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:16.672 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:15:17.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:15:17.145 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:15:17.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:15:17.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:15:17.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:15:17.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:17.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:17.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:17.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:17.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:17.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:17.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:17.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:17.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:15:17.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:15:17.195 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:15:17.196 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=625 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:17.196 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=625 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:17.196 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=625 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:17.196 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=625 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:17.196 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=625 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:17.196 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=625 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:17.196 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=625 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:22.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:15:22.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:15:22.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:22.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:22.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:22.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:22.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:22.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:15:22.205 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:22.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:15:22.205 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:15:22.208 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:15:22.209 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:15:22.209 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:15:22.209 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:22.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:22.210 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:15:22.210 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:15:22.211 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:15:22.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:22.212 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:15:22.212 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:15:22.212 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:15:22.212 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:22.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:22.213 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:15:22.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:15:22.213 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:15:22.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:22.215 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:15:22.215 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:15:22.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:15:22.215 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:22.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:22.215 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:15:22.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:15:22.215 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:15:22.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:22.218 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:15:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:15:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:15:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:15:22.218 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:15:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:15:22.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:15:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:15:22.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:15:22.218 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:15:22.219 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:15:22.219 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:15:22.219 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:22.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:22.223 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:15:22.698 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:15:22.745 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:15:22.747 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:15:22.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:15:22.749 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:15:22.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:15:22.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:15:22.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:15:22.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:22.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:15:22.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:15:22.772 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:15:22.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:15:23.170 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:15:23.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:23.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:23.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:23.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:23.642 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:15:24.112 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:15:24.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:24.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:24.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:24.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:24.582 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:15:25.054 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:15:25.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:25.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:25.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:25.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:25.527 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:15:25.999 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:15:26.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:26.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:26.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:26.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:26.471 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:15:26.945 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:15:27.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:27.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:27.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:27.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:27.417 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:15:27.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:15:27.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:15:27.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:15:27.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:27.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:27.889 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:15:28.362 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:15:28.834 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:15:29.307 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:15:29.780 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:15:30.253 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:15:30.725 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:15:31.198 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:15:31.671 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:15:32.143 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:15:32.616 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:15:33.089 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:15:33.562 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:15:34.035 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:15:34.508 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:15:34.980 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:15:35.454 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:15:35.926 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:15:36.398 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:15:36.872 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:15:37.344 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:15:37.816 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:15:38.289 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:15:38.762 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:15:39.234 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:15:39.707 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:15:40.180 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:15:40.652 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:15:41.126 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:15:41.599 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:15:42.073 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:15:42.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:15:42.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:42.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:15:42.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:15:42.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:42.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:42.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:42.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:42.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:42.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:42.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:15:42.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:15:42.403 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:15:42.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:42.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:42.404 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4358 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:42.404 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4358 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:42.404 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4358 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:42.404 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4358 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:42.404 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4358 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:42.404 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4358 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:42.404 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4358 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:47.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:15:47.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:15:47.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:47.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:47.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:47.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:47.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:47.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:15:47.418 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:47.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:15:47.418 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:15:47.422 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:15:47.422 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:15:47.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:15:47.422 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:47.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:47.423 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:15:47.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:15:47.423 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:15:47.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:47.424 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:15:47.425 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:15:47.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:15:47.425 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:47.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:47.425 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:15:47.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:15:47.425 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:15:47.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:47.427 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:15:47.427 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:15:47.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:15:47.427 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:15:47.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:47.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:15:47.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:15:47.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:15:47.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:15:47.430 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:15:47.430 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:15:47.430 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:47.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:15:47.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:15:47.435 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:15:47.913 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:15:47.949 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:15:47.950 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:15:47.951 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:15:47.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:15:47.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:15:47.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:15:47.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:15:47.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:47.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:15:47.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:15:47.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:15:47.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:15:48.384 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:15:48.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:48.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:48.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:48.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:48.856 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:15:49.329 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:15:49.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:49.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:49.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:49.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:49.801 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:15:50.274 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:15:50.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:50.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:50.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:50.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:50.747 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:15:51.219 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:15:51.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:51.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:51.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:51.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:51.691 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:15:52.163 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:15:52.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:52.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:52.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:52.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:52.636 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:15:52.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:15:52.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:15:52.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:15:52.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:52.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:53.108 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:15:53.580 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:15:54.054 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:15:54.526 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:15:54.998 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:15:55.472 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:15:55.944 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:15:56.416 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:15:56.889 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:15:57.363 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:15:57.835 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:15:58.308 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:15:58.781 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:15:59.253 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:15:59.727 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:15:59.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:15:59.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:15:59.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:15:59.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:15:59.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:15:59.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:15:59.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:15:59.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:15:59.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:15:59.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:15:59.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:15:59.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:15:59.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:15:59.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:15:59.911 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:15:59.911 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2694 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:59.911 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2694 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:59.911 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2694 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:59.911 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2694 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:59.912 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2694 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:59.912 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2694 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:15:59.912 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2694 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:16:04.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:16:04.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:16:04.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:16:04.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:16:04.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:16:04.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:16:04.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:16:04.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:16:04.917 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:04.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:16:04.917 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:16:04.918 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:16:04.918 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:16:04.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:16:04.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:04.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:16:04.918 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:16:04.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:16:04.918 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:16:04.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:04.919 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:16:04.919 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:16:04.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:16:04.919 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:04.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:16:04.919 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:16:04.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:16:04.919 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:16:04.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:04.920 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:16:04.920 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:16:04.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:16:04.920 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:04.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:16:04.921 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:16:04.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:16:04.921 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:16:04.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:04.922 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:16:04.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:16:04.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:16:04.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:16:04.922 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:16:04.923 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:16:04.923 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:16:04.923 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:04.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:04.927 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:16:05.405 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:16:05.447 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:16:05.450 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:16:05.452 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:16:05.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:16:05.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:16:05.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:16:05.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:16:05.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:16:05.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:16:05.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:16:05.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:16:05.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:16:05.878 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:16:05.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:05.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:05.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:05.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:06.349 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:16:06.822 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:16:06.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:06.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:06.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:06.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:07.295 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:16:07.767 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:16:07.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:07.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:07.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:07.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:08.238 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:16:08.711 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:16:08.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:08.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:08.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:08.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:09.184 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:16:09.655 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:16:09.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:09.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:09.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:09.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:10.127 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:16:10.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:16:10.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:16:10.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:16:10.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:16:10.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:16:10.600 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:16:11.073 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:16:11.545 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:16:12.019 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:16:12.492 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:16:12.965 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:16:13.438 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:16:13.910 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:16:14.383 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:16:14.856 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:16:14.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:16:14.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:16:14.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:16:14.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:16:14.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:14.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:14.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:14.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:14.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:16:14.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:16:14.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:16:14.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:16:14.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:16:14.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:16:14.988 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:16:19.995 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:16:19.995 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:16:19.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:16:19.996 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:16:19.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:16:19.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:16:20.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:16:20.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:16:20.004 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:20.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:16:20.004 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:16:20.006 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:16:20.006 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:16:20.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:16:20.006 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:20.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:16:20.007 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:16:20.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:16:20.007 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:16:20.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:20.008 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:16:20.008 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:16:20.008 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:16:20.008 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:20.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:16:20.009 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:16:20.009 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:16:20.009 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:16:20.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:20.010 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:16:20.010 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:16:20.010 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:16:20.010 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:20.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:16:20.011 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:16:20.011 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:16:20.011 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:16:20.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:16:20.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:16:20.013 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:16:20.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:20.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:20.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:20.018 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:16:20.494 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:16:20.540 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:16:20.543 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:16:20.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:16:20.547 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:16:20.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:16:20.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:16:20.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:16:20.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:16:20.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:16:20.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:16:20.573 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:16:20.573 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:16:20.966 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:16:21.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:21.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:21.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:21.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:21.440 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:16:21.912 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:16:22.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:22.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:22.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:22.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:22.383 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:16:22.854 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:16:23.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:23.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:23.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:23.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:23.328 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:16:23.801 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:16:24.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:24.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:24.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:24.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:24.273 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:16:24.744 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:16:25.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:25.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:25.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:25.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:25.217 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:16:25.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:16:25.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:16:25.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:16:25.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:16:25.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:16:25.689 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:16:26.161 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:16:26.637 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:16:27.109 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:16:27.583 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:16:28.056 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:16:28.528 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:16:29.001 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:16:29.473 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:16:29.946 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:16:30.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:16:30.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:16:30.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:16:30.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:16:30.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:30.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:30.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:30.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:30.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:16:30.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:16:30.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:16:30.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:16:30.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:16:30.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:16:30.083 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:16:30.083 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:16:30.083 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:16:30.083 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:16:35.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:16:35.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:16:35.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:16:35.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:16:35.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:16:35.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:16:35.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:16:35.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:16:35.100 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:35.101 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:16:35.101 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:16:35.105 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:16:35.105 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:16:35.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:16:35.106 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:35.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:16:35.107 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:16:35.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:16:35.107 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:16:35.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:35.109 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:16:35.109 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:16:35.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:16:35.109 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:35.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:16:35.109 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:16:35.110 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:16:35.110 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:16:35.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:35.112 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:16:35.112 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:16:35.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:16:35.112 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:35.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:16:35.113 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:16:35.113 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:16:35.113 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:16:35.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:35.116 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:16:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:16:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:16:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:16:35.116 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:16:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:16:35.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:16:35.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:16:35.117 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:16:35.117 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:16:35.117 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:35.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:35.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:35.122 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:16:35.599 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:16:35.646 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:16:35.648 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:16:35.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:16:35.650 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:16:35.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:16:35.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:16:35.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:16:35.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:16:35.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:16:35.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:16:35.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:16:35.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:16:36.071 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:16:36.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:36.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:36.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:36.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:36.542 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:16:37.015 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:16:37.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:37.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:37.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:37.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:37.487 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:16:37.959 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:16:38.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:38.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:38.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:38.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:38.430 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:16:38.903 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:16:39.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:39.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:39.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:39.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:39.376 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:16:39.848 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:16:40.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:40.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:40.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:40.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:40.321 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:16:40.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:16:40.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:16:40.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:16:40.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:16:40.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:16:40.793 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:16:41.267 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:16:41.741 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:16:42.213 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:16:42.686 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:16:43.159 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:16:43.631 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:16:44.104 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:16:44.572 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:16:45.046 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:16:45.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:16:45.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:16:45.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:16:45.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:16:45.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:45.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:45.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:45.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:45.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:16:45.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:16:45.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:16:45.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:16:45.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:16:45.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:16:45.182 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:16:45.183 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:16:45.183 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:16:50.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:16:50.188 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:16:50.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:16:50.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:16:50.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:16:50.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:16:50.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:16:50.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:16:50.205 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:50.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:16:50.205 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:16:50.209 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:16:50.209 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:16:50.210 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:16:50.210 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:50.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:16:50.210 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:16:50.210 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:16:50.210 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:16:50.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:50.213 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:16:50.213 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:16:50.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:16:50.213 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:50.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:16:50.214 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:16:50.214 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:16:50.214 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:16:50.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:50.216 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:16:50.216 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:16:50.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:16:50.216 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:16:50.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:16:50.217 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:16:50.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:16:50.217 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:16:50.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:50.220 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:16:50.220 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:16:50.220 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:16:50.221 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:50.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:16:50.225 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:16:50.701 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:16:50.750 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:16:50.752 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:16:50.754 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:16:50.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:16:51.173 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:16:51.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:51.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:51.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:51.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:51.646 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:16:52.119 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:16:52.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:52.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:52.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:52.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:52.591 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:16:53.065 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:16:53.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:53.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:53.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:53.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:53.537 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:16:54.013 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:16:54.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:54.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:54.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:54.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:54.485 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:16:54.960 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:16:55.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:16:55.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:16:55.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:16:55.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:16:55.432 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:16:55.907 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:16:56.379 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:16:56.854 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:16:57.326 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:16:57.797 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:16:58.271 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:16:58.743 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:16:59.218 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:16:59.690 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:17:00.162 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:17:00.633 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:17:00.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:00.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:00.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:00.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:00.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:00.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:00.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:00.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:00.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:17:00.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:17:00.770 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:17:05.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:17:05.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:17:05.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:05.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:05.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:05.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:05.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:05.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:17:05.778 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:05.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:17:05.779 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:17:05.781 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:17:05.781 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:17:05.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:17:05.781 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:05.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:05.782 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:17:05.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:17:05.782 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:17:05.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:05.784 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:17:05.784 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:17:05.784 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:17:05.784 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:05.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:05.785 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:17:05.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:17:05.785 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:17:05.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:05.787 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:17:05.787 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:17:05.787 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:17:05.787 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:05.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:05.787 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:17:05.787 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:17:05.787 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:17:05.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:05.790 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:17:05.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:17:05.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:17:05.791 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:17:05.791 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:17:05.791 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:05.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:05.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:17:05.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:05.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:05.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:05.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:17:05.793 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:17:05.793 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:17:05.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:10.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:17:10.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:17:10.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:10.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:10.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:10.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:10.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:10.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:17:10.814 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:10.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:17:10.814 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:17:10.817 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:17:10.817 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:17:10.818 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:17:10.818 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:10.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:10.818 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:17:10.818 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:17:10.818 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:17:10.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:10.820 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:17:10.820 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:17:10.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:17:10.821 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:10.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:10.821 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:17:10.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:17:10.821 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:17:10.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:10.823 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:17:10.823 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:17:10.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:17:10.823 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:10.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:10.823 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:17:10.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:17:10.823 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:17:10.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:17:10.826 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:17:10.826 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:17:10.826 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:10.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:10.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:10.831 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:17:11.307 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:17:11.355 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:17:11.357 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:17:11.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:17:11.359 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:17:11.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:17:11.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:17:11.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:17:11.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:17:11.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:17:11.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:17:11.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:17:11.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:17:11.779 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:17:11.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:11.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:11.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:11.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:12.251 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:17:12.724 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:17:12.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:12.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:12.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:12.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:13.197 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:17:13.669 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:17:13.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:13.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:13.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:13.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:14.142 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:17:14.615 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:17:14.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:14.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:14.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:14.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:15.087 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:17:15.558 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:17:15.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:15.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:15.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:15.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:16.032 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:17:16.504 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:17:16.976 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:17:17.449 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:17:17.922 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:17:18.394 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:17:18.865 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:17:19.338 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:17:19.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:17:19.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:17:19.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:19.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:19.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:19.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:19.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:19.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:19.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:19.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:19.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:17:19.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:17:19.412 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:17:19.412 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:17:19.413 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:17:19.413 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:17:19.413 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:17:19.413 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:17:19.413 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:17:24.410 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:17:24.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:17:24.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:24.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:24.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:24.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:24.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:24.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:17:24.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:24.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:17:24.417 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:17:24.418 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:17:24.419 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:17:24.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:17:24.419 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:24.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:24.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:17:24.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:17:24.420 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:17:24.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:24.420 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:17:24.420 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:17:24.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:17:24.420 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:24.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:24.420 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:17:24.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:17:24.420 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:17:24.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:24.422 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:17:24.422 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:17:24.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:17:24.422 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:24.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:24.422 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:17:24.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:17:24.422 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:17:24.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:17:24.424 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:17:24.424 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:17:24.424 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:24.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:17:24.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:17:24.425 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:17:24.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:29.431 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:17:29.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:17:29.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:29.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:29.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:29.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:29.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:29.439 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:17:29.439 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:29.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:17:29.440 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:17:29.443 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:17:29.444 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:17:29.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:17:29.444 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:29.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:29.445 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:17:29.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:17:29.446 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:17:29.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:29.448 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:17:29.448 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:17:29.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:17:29.449 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:29.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:29.450 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:17:29.450 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:17:29.450 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:17:29.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:29.452 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:17:29.452 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:17:29.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:17:29.453 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:29.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:29.453 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:17:29.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:17:29.453 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:17:29.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:29.458 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:17:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:17:29.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:17:29.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:17:29.459 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:17:29.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:17:29.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:17:29.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:29.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:17:29.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:17:29.459 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:17:29.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:29.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:29.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:29.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:29.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:29.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:29.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:29.460 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:17:29.460 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:17:29.460 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:17:29.460 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:17:29.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:29.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:29.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:29.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:29.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:29.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:29.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:29.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:29.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:29.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:29.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:29.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:29.465 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:17:29.942 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:17:29.994 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:17:29.996 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:17:29.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:17:29.998 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:17:30.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:17:30.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:17:30.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:17:30.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:17:30.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:17:30.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:17:30.003 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:17:30.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:17:30.414 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:17:30.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:30.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:30.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:30.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:30.885 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:17:31.359 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:17:31.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:31.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:31.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:31.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:31.831 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:17:32.303 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:17:32.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:32.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:32.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:32.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:32.774 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:17:33.247 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:17:33.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:33.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:33.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:33.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:33.720 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:17:34.192 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:17:34.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:34.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:34.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:34.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:34.663 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:17:35.136 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:17:35.609 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:17:36.081 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:17:36.552 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:17:37.025 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:17:37.497 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:17:37.970 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:17:38.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:17:38.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:17:38.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:38.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:38.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:38.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:38.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:38.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:38.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:17:38.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:17:38.042 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:17:38.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:38.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:43.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:17:43.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:17:43.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:43.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:43.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:43.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:43.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:43.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:17:43.056 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:43.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:17:43.056 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:17:43.059 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:17:43.059 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:17:43.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:17:43.059 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:43.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:43.059 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:17:43.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:17:43.059 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:17:43.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:43.062 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:17:43.062 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:17:43.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:17:43.062 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:43.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:43.063 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:17:43.063 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:17:43.063 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:17:43.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:43.065 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:17:43.065 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:17:43.065 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:17:43.065 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:43.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:43.066 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:17:43.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:17:43.066 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:17:43.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:43.070 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:17:43.070 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:17:43.070 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:17:43.071 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:17:43.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:43.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:43.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:43.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:17:43.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:43.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:43.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:43.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:43.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:43.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:43.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:43.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:43.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:43.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:43.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:43.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:17:43.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:17:43.073 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:17:43.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:48.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:17:48.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:17:48.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:48.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:48.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:48.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:48.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:48.088 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:17:48.088 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:48.088 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:17:48.088 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:17:48.092 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:17:48.092 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:17:48.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:17:48.093 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:48.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:48.094 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:17:48.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:17:48.094 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:17:48.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:48.096 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:17:48.096 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:17:48.097 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:17:48.097 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:48.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:48.097 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:17:48.097 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:17:48.097 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:17:48.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:48.103 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:17:48.103 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:17:48.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:17:48.103 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:17:48.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:17:48.104 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:17:48.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:17:48.104 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:17:48.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:48.111 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:17:48.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:17:48.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:17:48.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:17:48.112 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:17:48.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:17:48.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:17:48.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:17:48.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:17:48.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:48.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:48.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:48.112 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:17:48.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:48.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:48.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:48.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:48.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:48.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:48.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:48.113 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:17:48.113 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:17:48.113 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:17:48.113 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:17:48.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:48.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:48.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:48.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:17:48.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:48.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:48.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:48.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:48.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:48.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:48.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:48.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:48.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:48.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:48.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:17:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:17:48.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:48.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:17:48.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:48.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:48.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:17:48.118 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:17:48.596 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:17:48.646 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:17:48.648 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:17:48.649 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:17:48.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:17:48.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:17:48.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:17:48.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:17:48.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:17:48.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:17:48.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:17:48.653 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:17:48.653 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:17:49.068 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:17:49.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:49.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:49.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:49.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:49.539 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:17:50.012 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:17:50.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:50.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:50.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:50.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:50.484 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:17:50.956 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:17:51.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:51.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:51.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:51.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:51.430 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:17:51.902 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:17:52.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:52.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:52.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:52.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:52.374 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:17:52.845 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:17:53.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:53.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:53.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:53.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:53.318 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:17:53.791 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:17:54.263 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:17:54.734 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:17:55.207 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:17:55.679 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:17:56.151 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:17:56.622 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:17:56.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:17:56.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:17:56.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:17:56.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:17:56.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:17:56.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:17:56.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:17:56.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:17:56.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:17:56.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:17:56.698 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:17:56.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:17:56.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:01.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:18:01.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:18:01.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:01.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:01.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:01.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:01.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:01.712 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:18:01.713 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:01.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:18:01.713 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:18:01.717 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:18:01.718 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:18:01.718 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:18:01.718 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:01.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:01.719 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:18:01.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:18:01.719 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:18:01.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:01.721 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:18:01.721 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:18:01.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:18:01.722 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:01.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:01.722 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:18:01.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:18:01.722 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:18:01.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:01.725 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:18:01.725 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:18:01.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:18:01.725 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:01.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:01.725 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:18:01.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:18:01.726 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:18:01.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:01.730 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:18:01.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:18:01.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:18:01.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:18:01.730 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:18:01.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:18:01.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:18:01.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:01.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:18:01.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:18:01.731 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:18:01.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:01.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:01.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:01.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:01.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:01.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:01.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:01.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:18:01.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:18:01.731 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:18:01.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:18:01.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:01.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:01.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:01.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:18:01.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:01.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:01.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:01.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:01.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:01.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:01.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:01.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:01.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:01.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:18:01.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:18:01.734 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:18:01.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:06.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:18:06.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:18:06.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:06.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:06.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:06.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:06.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:06.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:18:06.749 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:06.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:18:06.750 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:18:06.755 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:18:06.755 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:18:06.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:18:06.756 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:06.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:06.756 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:18:06.757 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:18:06.757 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:18:06.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:06.760 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:18:06.760 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:18:06.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:18:06.761 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:06.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:06.761 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:18:06.761 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:18:06.761 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:18:06.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:06.763 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:18:06.763 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:18:06.763 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:18:06.763 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:06.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:06.764 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:18:06.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:18:06.764 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:18:06.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:06.767 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:18:06.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:18:06.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:18:06.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:18:06.767 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:18:06.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:18:06.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:18:06.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:18:06.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:18:06.767 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:18:06.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:18:06.768 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:18:06.768 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:18:06.768 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:06.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:06.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:06.773 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:18:07.250 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:18:07.295 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:18:07.297 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:18:07.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:18:07.299 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:18:07.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:18:07.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:18:07.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:18:07.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:18:07.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:18:07.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:18:07.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:18:07.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:18:07.722 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:18:07.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:07.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:07.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:07.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:08.193 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:18:08.664 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:18:08.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:08.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:08.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:08.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:09.138 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:18:09.610 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:18:09.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:09.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:09.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:09.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:10.082 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:18:10.553 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:18:10.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:10.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:10.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:10.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:11.026 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:18:11.499 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:18:11.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:11.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:11.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:11.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:11.971 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:18:12.442 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:18:12.912 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:18:13.386 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:18:13.858 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:18:14.330 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:18:14.804 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:18:15.276 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:18:15.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:18:15.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:18:15.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:15.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:15.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:15.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:15.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:15.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:15.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:15.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:15.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:18:15.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:18:15.353 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:18:15.353 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:18:15.353 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:18:15.353 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:18:15.353 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:18:15.353 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:18:20.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:18:20.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:18:20.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:20.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:20.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:20.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:20.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:20.365 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:18:20.365 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:20.365 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:18:20.365 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:18:20.368 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:18:20.368 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:18:20.369 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:18:20.369 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:20.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:20.369 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:18:20.370 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:18:20.370 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:18:20.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:20.371 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:18:20.371 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:18:20.371 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:18:20.371 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:20.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:20.371 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:18:20.371 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:18:20.371 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:18:20.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:20.373 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:18:20.373 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:18:20.373 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:18:20.373 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:20.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:20.374 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:18:20.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:18:20.374 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:18:20.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:20.376 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:18:20.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:18:20.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:18:20.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:18:20.376 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:18:20.377 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:18:20.377 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:18:20.377 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:20.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:18:20.378 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:18:20.378 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:18:20.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:25.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:18:25.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:18:25.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:25.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:25.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:25.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:25.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:25.395 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:18:25.395 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:25.395 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:18:25.395 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:18:25.399 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:18:25.399 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:18:25.399 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:18:25.399 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:25.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:25.400 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:18:25.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:18:25.400 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:18:25.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:25.401 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:18:25.401 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:18:25.402 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:18:25.402 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:25.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:25.402 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:18:25.402 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:18:25.402 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:18:25.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:25.405 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:18:25.405 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:18:25.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:18:25.405 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:25.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:25.406 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:18:25.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:18:25.406 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:18:25.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:25.410 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:18:25.410 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:18:25.410 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:18:25.410 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:25.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:25.415 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:18:25.891 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:18:25.940 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:18:25.943 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:18:25.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:18:25.945 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:18:25.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:18:25.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:18:25.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:18:25.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:18:25.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:18:25.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:18:25.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:18:25.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:18:26.363 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:18:26.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:26.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:26.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:26.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:26.834 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:18:27.307 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:18:27.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:27.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:27.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:27.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:27.780 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:18:28.252 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:18:28.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:28.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:28.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:28.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:28.723 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:18:29.196 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:18:29.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:29.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:29.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:29.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:29.668 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:18:30.140 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:18:30.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:30.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:30.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:30.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:30.611 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:18:31.085 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:18:31.556 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:18:32.028 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:18:32.499 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:18:32.973 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:18:33.445 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:18:33.917 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:18:34.388 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:18:34.859 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:18:35.332 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:18:35.805 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:18:36.277 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:18:36.748 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:18:37.222 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:18:37.694 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:18:38.166 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:18:38.637 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:18:39.110 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:18:39.583 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:18:39.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:18:39.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:18:39.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:39.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:39.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:39.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:39.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:39.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:39.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:18:39.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:18:39.988 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:18:39.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:39.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:44.995 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:18:44.995 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:18:44.995 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:44.995 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:44.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:44.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:45.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:45.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:18:45.005 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:45.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:18:45.005 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:18:45.007 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:18:45.008 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:18:45.008 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:18:45.008 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:45.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:45.009 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:18:45.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:18:45.009 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:18:45.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:45.010 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:18:45.010 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:18:45.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:18:45.010 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:45.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:45.010 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:18:45.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:18:45.010 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:18:45.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:45.012 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:18:45.012 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:18:45.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:18:45.012 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:45.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:45.012 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:18:45.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:18:45.013 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:18:45.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:18:45.015 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:18:45.015 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:18:45.015 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:45.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:45.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:45.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:45.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:45.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:45.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:45.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:45.017 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:18:45.017 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:18:45.017 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:18:50.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:18:50.025 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:18:50.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:50.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:50.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:50.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:50.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:50.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:18:50.034 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:50.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:18:50.034 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:18:50.038 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:18:50.039 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:18:50.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:18:50.039 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:50.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:50.040 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:18:50.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:18:50.040 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:18:50.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:50.042 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:18:50.042 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:18:50.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:18:50.042 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:50.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:50.043 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:18:50.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:18:50.043 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:18:50.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:50.045 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:18:50.045 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:18:50.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:18:50.046 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:18:50.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:18:50.046 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:18:50.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:18:50.046 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:18:50.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:50.049 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:18:50.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:18:50.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:18:50.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:18:50.049 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:18:50.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:18:50.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:18:50.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:50.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:18:50.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:18:50.049 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:18:50.050 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:18:50.050 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:18:50.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:50.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:50.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:50.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:50.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:50.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:50.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:50.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:18:50.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:50.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:50.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:50.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:18:50.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:50.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:18:50.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:18:50.054 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:18:50.532 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:18:50.579 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:18:50.582 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:18:50.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:18:50.584 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:18:50.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:18:50.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:18:50.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:18:50.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:18:50.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:18:50.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:18:50.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:18:50.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:18:51.004 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:18:51.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:51.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:51.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:51.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:51.475 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:18:51.946 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:18:52.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:52.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:52.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:52.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:52.419 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:18:52.892 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:18:53.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:53.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:53.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:53.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:53.363 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:18:53.835 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:18:54.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:54.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:54.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:54.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:54.308 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:18:54.781 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:18:55.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:55.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:55.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:55.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:55.253 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:18:55.725 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:18:56.196 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:18:56.669 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:18:57.141 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:18:57.615 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:18:58.087 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:18:58.559 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:18:58.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:18:58.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:18:58.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:18:58.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:18:58.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:18:58.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:18:58.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:18:58.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:18:58.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:18:58.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:18:58.635 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:18:58.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:18:58.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:03.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:19:03.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:19:03.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:03.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:03.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:03.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:03.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:03.648 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:19:03.648 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:03.648 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:19:03.648 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:19:03.651 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:19:03.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:19:03.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:19:03.652 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:03.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:03.653 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:19:03.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:19:03.654 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:19:03.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:03.655 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:19:03.656 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:19:03.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:19:03.656 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:03.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:03.657 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:19:03.657 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:19:03.657 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:19:03.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:03.659 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:19:03.659 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:19:03.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:19:03.660 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:03.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:03.660 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:19:03.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:19:03.660 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:19:03.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:03.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:19:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:19:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:19:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:19:03.665 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:19:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:19:03.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:19:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:19:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:19:03.666 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:19:03.666 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:19:03.666 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:03.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:03.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:03.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:03.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:03.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:03.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:03.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:03.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:03.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:03.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:03.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:03.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:03.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:03.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:03.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:03.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:03.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:03.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:03.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:03.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:19:03.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:19:03.668 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:19:08.677 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:19:08.677 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:19:08.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:08.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:08.677 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:08.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:08.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:08.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:19:08.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:08.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:19:08.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:19:08.692 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:19:08.693 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:19:08.693 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:19:08.693 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:08.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:08.693 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:19:08.693 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:19:08.693 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:19:08.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:08.696 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:19:08.696 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:19:08.697 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:19:08.697 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:08.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:08.697 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:19:08.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:19:08.698 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:19:08.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:08.698 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:19:08.699 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:19:08.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:19:08.699 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:08.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:08.699 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:19:08.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:19:08.699 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:19:08.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:08.701 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:19:08.701 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:19:08.701 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:19:08.701 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:08.706 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:19:09.184 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:19:09.226 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:19:09.229 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:19:09.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:19:09.231 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:19:09.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:19:09.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:19:09.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:19:09.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:19:09.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:19:09.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:19:09.236 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:19:09.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:19:09.656 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:19:09.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:09.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:09.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:09.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:10.128 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:19:10.598 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:19:10.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:10.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:10.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:10.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:11.071 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:19:11.544 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:19:11.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:11.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:11.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:11.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:12.016 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:19:12.490 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:19:12.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:12.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:12.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:12.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:12.962 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:19:13.434 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:19:13.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:13.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:13.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:13.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:13.905 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:19:14.379 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:19:14.851 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:19:15.323 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:19:15.794 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:19:16.267 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:19:16.740 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:19:17.212 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:19:17.683 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:19:18.156 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:19:18.629 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:19:19.101 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:19:19.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:19:19.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:19:19.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:19.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:19.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:19.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:19.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:19.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:19.286 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:19:19.287 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:19:19.287 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:19:19.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:19.287 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:24.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:19:24.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:19:24.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:24.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:24.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:24.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:24.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:24.296 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:19:24.296 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:24.296 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:19:24.296 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:19:24.297 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:19:24.297 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:19:24.297 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:19:24.297 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:24.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:24.298 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:19:24.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:19:24.298 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:19:24.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:24.298 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:19:24.298 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:19:24.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:19:24.298 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:24.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:24.298 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:19:24.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:19:24.299 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:19:24.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:24.300 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:19:24.300 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:19:24.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:19:24.300 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:24.300 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:24.300 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:19:24.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:19:24.300 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:19:24.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:19:24.302 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:19:24.302 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:19:24.302 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:24.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:24.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:24.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:24.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:24.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:24.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:24.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:24.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:24.304 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:19:24.304 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:19:24.304 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:19:29.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:19:29.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:19:29.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:29.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:29.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:29.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:29.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:29.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:19:29.321 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:29.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:19:29.321 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:19:29.326 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:19:29.326 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:19:29.327 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:19:29.327 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:29.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:29.328 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:19:29.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:19:29.328 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:19:29.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:29.330 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:19:29.330 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:19:29.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:19:29.330 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:29.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:29.330 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:19:29.331 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:19:29.331 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:19:29.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:29.333 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:19:29.333 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:19:29.333 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:19:29.333 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:29.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:29.333 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:19:29.333 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:19:29.333 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:19:29.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:29.336 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:19:29.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:19:29.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:19:29.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:19:29.336 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:19:29.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:19:29.337 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:19:29.337 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:19:29.337 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:29.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:29.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:29.342 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:19:29.820 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:19:29.864 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:19:29.866 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:19:29.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:19:29.869 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:19:29.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:19:29.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:19:29.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:19:29.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:19:29.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:19:29.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:19:29.874 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:19:29.874 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:19:30.292 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:19:30.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:30.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:30.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:30.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:30.763 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:19:31.237 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:19:31.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:31.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:31.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:31.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:31.709 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:19:32.181 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:19:32.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:32.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:32.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:32.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:32.652 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:19:33.125 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:19:33.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:33.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:33.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:33.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:33.598 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:19:34.070 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:19:34.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:34.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:34.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:34.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:34.541 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:19:35.015 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:19:35.487 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:19:35.959 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:19:36.430 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:19:36.903 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:19:37.376 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:19:37.848 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:19:38.319 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:19:38.790 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:19:39.263 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:19:39.736 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:19:40.208 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:19:40.679 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:19:40.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:19:40.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:19:40.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:40.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:40.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:40.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:40.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:40.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:40.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:19:40.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:19:40.925 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:19:40.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:40.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:40.925 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2503 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:19:40.926 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2503 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:19:40.926 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2503 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:19:40.926 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2503 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:19:40.926 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2503 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:19:40.926 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2503 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:19:40.926 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2503 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:19:45.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:19:45.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:19:45.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:45.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:45.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:45.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:45.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:45.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:19:45.935 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:45.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:19:45.936 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:19:45.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:19:45.938 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:19:45.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:19:45.939 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:45.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:45.939 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:19:45.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:19:45.940 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:19:45.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:45.941 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:19:45.941 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:19:45.941 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:19:45.941 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:45.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:45.941 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:19:45.941 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:19:45.941 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:19:45.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:45.943 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:19:45.943 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:19:45.943 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:19:45.943 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:45.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:45.943 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:19:45.943 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:19:45.943 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:19:45.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:19:45.946 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:19:45.946 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:19:45.946 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:45.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:45.947 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:19:45.947 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:19:45.947 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:19:50.955 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:19:50.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:19:50.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:50.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:50.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:50.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:50.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:19:50.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:19:50.963 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:50.964 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:19:50.964 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:19:50.966 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:19:50.966 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:19:50.966 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:19:50.966 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:50.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:19:50.967 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:19:50.967 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:19:50.967 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:19:50.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:50.968 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:19:50.968 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:19:50.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:19:50.968 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:50.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:19:50.968 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:19:50.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:19:50.969 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:19:50.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:50.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:19:50.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:19:50.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:19:50.970 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:19:50.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:19:50.970 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:19:50.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:19:50.971 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:19:50.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:19:50.973 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:19:50.973 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:19:50.973 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:50.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:19:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:19:50.978 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:19:51.456 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:19:51.502 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:19:51.503 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:19:51.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:19:51.504 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:19:51.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:19:51.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:19:51.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:19:51.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:19:51.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:19:51.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:19:51.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:19:51.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:19:51.928 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:19:51.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:51.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:51.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:51.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:52.399 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:19:52.873 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:19:52.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:52.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:52.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:52.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:53.345 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:19:53.817 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:19:53.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:53.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:53.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:53.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:54.288 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:19:54.761 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:19:54.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:54.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:54.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:54.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:55.234 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:19:55.706 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:19:55.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:19:55.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:19:55.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:19:55.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:19:56.177 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:19:56.650 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:19:57.123 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:19:57.595 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:19:58.066 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:19:58.539 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:19:59.011 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:19:59.483 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:19:59.954 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:20:00.428 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:20:00.900 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:20:01.371 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:20:01.843 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:20:02.316 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:20:02.788 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:20:03.260 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:20:03.731 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:20:04.204 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:20:04.677 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:20:05.149 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:20:05.623 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:20:06.095 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:20:06.567 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:20:07.038 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:20:07.511 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:20:07.983 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:20:08.455 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:20:08.926 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:20:09.397 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:20:09.871 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:20:10.343 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:20:10.815 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:20:11.286 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:20:11.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:20:11.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:20:11.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:11.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:11.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:11.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:11.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:11.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:11.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:11.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:11.565 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:20:11.566 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:20:11.566 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:20:11.566 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4448 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:20:11.566 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4448 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:20:11.566 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4448 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:20:11.566 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4448 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:20:11.566 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4448 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:20:11.567 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4448 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:20:11.567 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4448 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:20:16.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:20:16.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:20:16.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:16.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:16.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:16.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:16.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:16.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:20:16.575 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:16.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:20:16.575 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:20:16.577 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:20:16.577 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:20:16.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:20:16.578 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:16.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:16.579 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:20:16.579 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:20:16.579 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:20:16.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:16.581 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:20:16.582 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:20:16.582 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:20:16.582 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:16.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:16.583 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:20:16.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:20:16.583 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:20:16.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:16.585 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:20:16.586 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:20:16.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:20:16.586 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:16.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:16.586 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:20:16.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:20:16.586 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:20:16.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:16.591 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:20:16.591 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:20:16.591 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:20:16.592 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:20:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:16.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:20:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:16.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:16.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:16.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:16.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:16.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:16.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:16.594 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:20:16.594 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:20:16.594 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:20:16.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:21.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:20:21.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:20:21.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:21.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:21.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:21.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:21.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:21.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:20:21.612 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:21.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:20:21.613 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:20:21.619 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:20:21.619 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:20:21.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:20:21.620 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:21.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:21.621 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:20:21.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:20:21.622 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:20:21.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:21.624 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:20:21.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:20:21.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:20:21.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:21.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:21.626 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:20:21.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:20:21.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:20:21.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:21.629 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:20:21.629 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:20:21.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:20:21.629 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:21.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:21.629 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:20:21.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:20:21.630 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:20:21.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:21.634 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:20:21.634 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:20:21.634 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:20:21.634 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:21.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:21.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:21.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:21.639 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:20:22.115 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:20:22.163 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:20:22.165 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:20:22.168 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:20:22.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:20:22.587 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:20:22.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:22.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:22.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:22.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:23.061 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:20:23.533 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:20:23.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:23.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:23.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:23.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:24.005 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:20:24.480 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:20:24.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:24.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:24.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:24.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:24.952 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:20:25.428 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:20:25.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:25.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:25.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:25.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:25.900 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:20:26.374 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:20:26.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:26.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:26.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:26.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:26.846 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:20:27.320 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:20:27.792 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:20:28.264 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:20:28.739 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:20:29.211 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:20:29.686 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:20:30.158 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:20:30.633 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:20:31.105 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:20:31.581 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:20:32.053 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:20:32.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:32.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:32.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:32.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:32.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:32.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:32.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:32.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:32.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:20:32.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:20:32.180 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:20:37.185 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:20:37.185 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:20:37.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:37.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:37.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:37.185 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:37.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:37.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:20:37.193 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:37.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:20:37.194 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:20:37.197 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:20:37.198 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:20:37.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:20:37.198 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:37.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:37.198 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:20:37.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:20:37.199 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:20:37.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:37.203 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:20:37.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:20:37.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:20:37.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:37.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:37.203 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:20:37.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:20:37.203 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:20:37.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:37.207 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:20:37.207 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:20:37.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:20:37.207 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:37.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:37.208 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:20:37.208 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:20:37.208 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:20:37.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:37.213 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:20:37.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:20:37.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:20:37.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:20:37.213 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:37.214 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:20:37.214 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:20:37.214 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:20:37.215 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:20:37.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:37.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:37.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:37.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:20:37.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:37.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:37.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:37.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:37.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:37.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:37.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:37.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:37.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:37.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:20:37.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:20:37.218 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:20:37.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:42.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:20:42.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:20:42.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:42.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:42.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:42.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:42.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:42.231 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:20:42.231 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:42.231 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:20:42.231 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:20:42.232 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:20:42.232 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:20:42.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:20:42.232 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:42.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:42.232 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:20:42.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:20:42.232 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:20:42.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:42.233 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:20:42.233 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:20:42.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:20:42.233 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:42.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:42.233 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:20:42.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:20:42.233 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:20:42.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:42.234 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:20:42.234 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:20:42.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:20:42.234 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:42.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:42.234 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:20:42.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:20:42.234 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:20:42.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:42.236 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:20:42.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:20:42.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:20:42.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:20:42.236 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:20:42.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:20:42.237 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:20:42.237 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:20:42.237 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:42.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:42.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:42.242 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:20:42.720 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:20:42.767 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:20:42.769 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:20:42.771 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:20:42.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:20:43.192 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:20:43.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:43.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:43.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:43.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:43.667 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:20:44.143 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:20:44.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:44.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:44.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:44.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:44.615 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:20:45.090 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:20:45.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:45.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:45.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:45.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:45.556 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:20:46.027 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:20:46.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:46.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:46.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:46.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:46.494 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:20:46.970 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:20:47.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:47.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:47.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:47.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:47.442 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:20:47.910 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:20:48.383 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:20:48.854 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:20:49.325 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:20:49.801 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:20:50.273 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:20:50.748 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:20:51.219 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:20:51.690 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:20:52.164 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:20:52.637 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:20:53.108 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:20:53.584 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:20:54.056 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:20:54.531 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:20:54.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:54.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:54.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:54.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:54.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:54.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:54.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:20:54.783 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:20:54.783 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:20:54.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:54.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:59.790 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:20:59.790 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:20:59.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:59.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:59.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:59.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:59.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:59.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:20:59.798 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:59.799 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:20:59.799 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:20:59.803 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:20:59.804 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:20:59.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:20:59.804 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:59.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:59.804 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:20:59.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:20:59.804 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:20:59.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:20:59.807 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:20:59.807 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:20:59.807 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:20:59.807 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:59.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:59.807 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:20:59.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:20:59.808 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:20:59.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:20:59.810 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:20:59.810 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:20:59.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:20:59.811 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:20:59.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:20:59.811 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:20:59.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:20:59.811 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:20:59.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:20:59.815 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:20:59.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:20:59.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:20:59.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:20:59.815 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:20:59.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:20:59.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:20:59.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:59.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:20:59.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:20:59.816 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:20:59.816 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:20:59.816 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:59.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:59.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:20:59.818 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:20:59.818 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:20:59.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:04.825 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:21:04.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:21:04.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:04.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:04.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:04.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:04.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:04.830 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:21:04.830 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:04.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:21:04.831 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:21:04.833 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:21:04.833 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:21:04.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:21:04.834 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:04.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:04.834 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:21:04.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:21:04.835 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:21:04.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:04.836 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:21:04.836 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:21:04.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:21:04.836 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:04.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:04.837 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:21:04.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:21:04.837 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:21:04.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:04.838 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:21:04.838 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:21:04.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:21:04.838 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:04.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:04.839 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:21:04.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:21:04.839 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:21:04.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:04.841 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:21:04.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:21:04.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:21:04.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:21:04.841 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:21:04.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:21:04.842 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:21:04.842 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:21:04.842 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:04.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:04.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:04.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:04.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:04.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:04.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:04.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:04.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:04.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:04.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:04.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:04.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:04.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:04.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:04.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:04.847 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:21:05.322 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:21:05.369 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:21:05.371 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:21:05.372 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:21:05.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:21:05.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:21:05.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:21:05.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:21:05.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:21:05.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:21:05.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:21:05.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:21:05.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:21:05.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:21:05.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:21:05.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:21:05.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:21:05.794 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:21:05.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:05.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:05.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:05.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:06.266 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:21:06.739 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:21:06.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:06.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:06.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:06.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:07.212 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:21:07.684 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:21:07.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:07.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:07.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:07.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:08.157 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:21:08.630 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:21:08.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:08.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:08.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:08.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:09.102 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:21:09.573 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:21:09.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:09.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:09.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:09.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:10.046 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:21:10.518 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:21:10.990 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:21:11.461 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:21:11.934 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:21:12.407 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:21:12.879 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:21:13.349 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:21:13.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:21:13.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:21:13.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:13.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:13.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:13.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:13.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:13.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:13.427 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:21:13.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:21:13.427 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:21:13.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:13.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:13.428 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:21:13.428 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:21:13.428 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:21:13.428 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:21:13.428 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:21:13.428 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:21:13.428 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:21:18.429 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:21:18.429 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:21:18.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:18.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:18.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:18.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:18.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:18.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:21:18.432 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:18.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:21:18.432 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:21:18.433 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:21:18.433 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:21:18.433 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:21:18.433 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:18.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:18.433 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:21:18.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:21:18.434 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:21:18.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:18.434 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:21:18.434 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:21:18.434 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:21:18.434 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:18.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:18.434 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:21:18.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:21:18.435 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:21:18.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:18.436 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:21:18.436 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:21:18.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:21:18.436 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:18.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:18.436 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:21:18.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:21:18.436 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:21:18.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:21:18.438 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:21:18.438 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:21:18.438 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:18.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:18.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:18.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:18.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:18.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:18.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:18.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:18.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:18.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:18.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:21:18.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:21:18.440 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:21:23.447 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:21:23.447 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:21:23.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:23.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:23.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:23.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:23.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:23.452 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:21:23.452 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:23.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:21:23.453 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:21:23.455 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:21:23.455 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:21:23.456 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:21:23.456 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:23.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:23.456 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:21:23.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:21:23.457 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:21:23.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:23.458 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:21:23.458 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:21:23.458 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:21:23.458 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:23.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:23.458 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:21:23.458 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:21:23.458 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:21:23.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:23.460 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:21:23.460 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:21:23.460 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:21:23.460 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:23.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:23.460 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:21:23.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:21:23.461 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:21:23.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:23.463 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:21:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:21:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:21:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:21:23.463 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:21:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:21:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:21:23.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:21:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:21:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:23.463 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:21:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:21:23.464 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:21:23.464 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:21:23.464 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:23.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:23.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:23.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:23.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:23.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:23.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:23.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:23.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:23.468 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:21:23.946 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:21:23.987 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:21:23.988 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:21:23.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:21:23.990 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:21:23.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:21:23.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:21:23.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:21:23.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:21:23.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:21:23.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:21:23.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:21:23.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:21:24.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:21:24.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:21:24.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:21:24.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:21:24.416 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:21:24.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:24.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:24.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:24.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:24.887 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:21:25.359 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:21:25.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:25.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:25.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:25.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:25.831 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:21:26.302 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:21:26.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:26.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:26.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:26.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:26.776 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:21:27.248 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:21:27.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:27.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:27.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:27.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:27.720 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:21:28.194 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:21:28.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:28.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:28.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:28.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:28.666 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:21:29.138 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:21:29.609 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:21:30.083 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:21:30.555 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:21:31.027 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:21:31.498 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:21:31.971 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:21:32.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:21:32.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:21:32.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:32.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:32.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:32.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:32.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:32.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:32.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:21:32.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:21:32.044 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:21:32.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:32.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:37.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:21:37.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:21:37.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:37.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:37.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:37.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:37.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:37.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:21:37.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:37.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:21:37.065 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:21:37.069 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:21:37.069 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:21:37.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:21:37.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:37.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:37.069 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:21:37.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:21:37.069 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:21:37.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:37.072 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:21:37.072 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:21:37.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:21:37.072 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:37.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:37.072 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:21:37.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:21:37.072 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:21:37.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:37.074 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:21:37.074 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:21:37.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:21:37.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:37.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:37.075 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:21:37.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:21:37.075 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:21:37.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:37.078 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:21:37.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:21:37.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:21:37.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:21:37.078 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:21:37.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:21:37.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:21:37.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:37.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:21:37.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:21:37.078 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:21:37.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:37.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:37.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:37.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:37.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:37.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:37.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:37.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:21:37.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:21:37.079 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:21:37.079 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:21:37.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:37.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:37.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:37.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:21:37.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:37.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:37.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:37.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:37.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:37.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:37.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:37.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:37.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:21:37.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:21:37.081 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:21:37.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:42.088 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:21:42.088 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:21:42.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:42.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:42.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:42.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:42.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:42.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:21:42.099 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:42.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:21:42.099 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:21:42.103 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:21:42.103 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:21:42.103 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:21:42.103 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:42.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:42.104 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:21:42.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:21:42.105 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:21:42.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:42.107 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:21:42.107 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:21:42.107 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:21:42.107 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:42.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:42.107 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:21:42.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:21:42.108 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:21:42.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:42.109 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:21:42.110 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:21:42.110 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:21:42.110 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:42.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:42.110 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:21:42.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:21:42.111 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:21:42.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:42.113 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:21:42.113 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:21:42.113 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:21:42.113 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:42.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:42.118 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:21:42.596 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:21:42.644 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:21:42.646 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:21:42.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:21:42.648 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:21:42.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:21:42.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:21:42.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:21:42.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:21:42.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:21:42.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:21:42.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:21:42.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:21:42.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:21:42.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:21:42.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:21:42.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:21:43.067 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:21:43.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:43.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:43.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:43.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:43.539 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:21:44.013 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:21:44.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:44.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:44.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:44.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:44.485 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:21:44.957 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:21:45.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:45.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:45.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:45.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:45.428 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:21:45.899 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:21:46.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:46.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:46.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:46.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:46.369 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:21:46.843 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:21:47.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:47.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:47.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:47.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:47.315 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:21:47.787 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:21:48.258 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:21:48.732 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:21:49.204 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:21:49.676 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:21:50.147 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:21:50.620 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:21:50.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:21:50.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:21:50.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:50.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:50.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:50.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:50.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:50.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:50.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:50.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:50.696 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:21:50.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:21:50.696 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:21:55.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:21:55.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:21:55.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:55.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:55.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:55.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:55.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:55.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:21:55.708 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:55.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:21:55.708 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:21:55.710 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:21:55.711 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:21:55.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:21:55.711 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:55.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:55.712 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:21:55.712 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:21:55.712 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:21:55.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:21:55.713 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:21:55.713 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:21:55.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:21:55.713 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:55.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:55.714 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:21:55.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:21:55.714 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:21:55.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:21:55.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:21:55.716 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:21:55.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:21:55.716 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:21:55.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:21:55.716 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:21:55.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:21:55.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:21:55.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:21:55.719 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:21:55.719 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:21:55.719 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:55.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:55.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:21:55.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:21:55.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:21:55.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:21:55.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:21:55.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:21:55.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:21:55.721 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:21:55.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:00.729 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:22:00.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:22:00.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:00.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:00.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:00.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:00.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:00.756 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:22:00.756 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:00.756 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:22:00.756 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:22:00.758 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:22:00.758 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:22:00.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:22:00.758 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:00.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:00.758 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:22:00.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:22:00.758 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:22:00.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:00.761 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:22:00.762 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:22:00.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:22:00.762 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:00.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:00.762 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:22:00.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:22:00.762 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:22:00.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:00.765 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:22:00.765 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:22:00.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:22:00.765 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:00.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:00.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:22:00.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:22:00.765 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:22:00.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:22:00.769 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:22:00.769 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:22:00.769 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:22:00.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:00.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:00.774 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:22:01.251 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:22:01.297 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:22:01.299 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:22:01.299 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:22:01.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:22:01.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:22:01.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:22:01.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:22:01.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:22:01.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:22:01.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:22:01.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:22:01.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:22:01.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:22:01.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:22:01.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:22:01.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:22:01.723 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:22:01.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:01.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:01.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:01.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:02.194 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:22:02.665 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:22:02.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:02.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:02.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:02.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:03.136 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:22:03.610 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:22:03.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:03.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:03.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:03.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:04.082 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:22:04.554 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:22:04.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:04.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:04.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:04.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:05.025 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:22:05.498 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:22:05.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:05.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:05.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:05.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:05.970 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:22:06.442 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:22:06.913 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:22:07.386 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:22:07.859 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:22:08.331 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:22:08.802 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:22:09.275 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:22:09.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:22:09.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:22:09.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:09.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:09.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:09.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:09.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:09.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:09.355 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:22:09.355 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:22:09.355 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:22:09.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:09.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:09.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:09.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:09.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:09.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:09.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:09.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:09.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:14.358 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:22:14.358 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:22:14.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:14.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:14.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:14.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:14.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:14.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:22:14.368 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:14.369 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:22:14.369 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:22:14.371 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:22:14.372 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:22:14.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:22:14.372 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:14.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:14.373 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:22:14.373 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:22:14.373 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:22:14.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:14.375 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:22:14.375 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:22:14.375 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:22:14.375 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:14.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:14.375 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:22:14.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:22:14.376 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:22:14.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:14.377 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:22:14.378 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:22:14.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:22:14.378 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:14.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:14.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:22:14.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:22:14.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:22:14.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:14.381 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:22:14.381 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:22:14.381 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:22:14.382 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:22:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:14.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:22:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:14.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:22:14.383 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:22:14.383 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:22:14.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:19.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:22:19.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:22:19.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:19.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:19.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:19.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:19.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:19.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:22:19.400 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:19.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:22:19.400 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:22:19.403 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:22:19.403 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:22:19.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:22:19.404 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:19.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:19.404 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:22:19.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:22:19.405 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:22:19.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:19.406 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:22:19.406 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:22:19.406 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:22:19.406 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:19.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:19.406 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:22:19.406 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:22:19.406 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:22:19.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:19.408 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:22:19.408 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:22:19.408 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:22:19.408 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:19.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:19.408 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:22:19.408 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:22:19.408 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:22:19.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:19.411 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:22:19.411 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:22:19.411 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:22:19.412 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:19.416 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:22:19.894 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:22:19.935 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:22:19.936 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:22:19.937 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:22:19.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:22:19.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:22:19.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:22:19.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:22:19.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:22:19.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:22:19.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:22:19.940 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:22:19.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:22:19.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:22:19.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:22:19.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:22:19.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:22:20.366 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:22:20.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:20.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:20.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:20.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:20.837 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:22:21.310 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:22:21.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:21.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:21.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:21.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:21.783 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:22:22.255 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:22:22.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:22.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:22.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:22.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:22.726 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:22:23.199 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:22:23.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:23.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:23.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:23.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:23.671 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:22:24.143 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:22:24.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:24.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:24.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:24.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:24.614 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:22:25.087 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:22:25.560 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:22:26.032 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:22:26.503 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:22:26.976 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:22:27.448 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:22:27.920 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:22:28.392 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:22:28.865 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:22:29.337 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:22:29.809 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:22:30.280 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:22:30.753 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:22:31.225 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:22:31.697 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:22:32.168 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:22:32.639 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:22:33.113 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:22:33.585 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:22:33.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:22:33.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:22:33.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:33.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:33.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:33.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:33.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:33.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:33.999 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:22:33.999 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:22:33.999 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:22:33.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:33.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:34.000 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3151 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:34.000 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3151 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:34.000 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3151 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:34.000 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3151 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:34.000 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3151 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:34.000 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3151 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:34.000 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3151 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:39.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:22:39.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:22:39.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:39.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:39.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:39.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:39.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:39.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:22:39.016 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:39.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:22:39.016 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:22:39.020 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:22:39.021 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:22:39.021 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:22:39.021 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:39.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:39.022 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:22:39.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:22:39.022 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:22:39.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:39.024 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:22:39.024 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:22:39.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:22:39.024 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:39.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:39.025 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:22:39.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:22:39.025 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:22:39.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:39.027 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:22:39.027 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:22:39.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:22:39.027 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:39.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:39.027 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:22:39.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:22:39.027 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:22:39.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:39.030 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:22:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:22:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:22:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:22:39.030 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:22:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:22:39.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:22:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:22:39.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:22:39.031 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:22:39.031 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:22:39.031 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:39.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:39.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:22:39.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:22:39.032 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:22:44.040 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:22:44.040 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:22:44.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:44.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:44.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:44.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:44.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:44.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:22:44.043 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:44.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:22:44.043 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:22:44.044 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:22:44.044 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:22:44.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:22:44.045 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:44.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:44.045 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:22:44.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:22:44.045 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:22:44.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:44.046 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:22:44.046 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:22:44.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:22:44.046 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:44.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:44.046 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:22:44.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:22:44.046 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:22:44.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:44.047 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:22:44.047 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:22:44.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:22:44.047 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:44.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:44.047 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:22:44.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:22:44.047 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:22:44.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:22:44.049 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:22:44.049 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:22:44.049 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:44.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:44.054 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:22:44.530 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:22:44.572 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:22:44.573 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:22:44.574 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:22:44.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:22:44.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:22:44.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:22:44.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:22:44.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:22:44.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:22:44.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:22:44.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:22:44.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:22:44.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:22:44.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:22:44.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:22:44.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:22:45.002 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:22:45.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:45.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:45.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:45.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:45.473 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:22:45.947 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:22:46.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:46.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:46.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:46.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:46.419 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:22:46.891 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:22:47.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:47.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:47.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:47.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:47.365 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:22:47.837 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:22:48.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:48.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:48.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:48.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:48.309 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:22:48.780 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:22:49.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:49.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:49.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:49.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:49.254 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:22:49.726 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:22:50.198 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:22:50.671 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:22:51.144 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:22:51.616 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:22:52.087 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:22:52.560 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:22:52.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:22:52.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:22:52.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:52.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:52.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:52.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:52.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:52.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:52.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:22:52.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:22:52.635 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:22:52.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:52.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:52.636 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:52.636 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:52.636 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:52.636 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:52.636 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:52.636 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:52.636 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:22:57.637 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:22:57.637 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:22:57.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:57.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:57.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:57.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:57.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:57.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:22:57.647 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:57.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:22:57.647 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:22:57.652 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:22:57.653 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:22:57.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:22:57.653 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:57.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:57.653 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:22:57.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:22:57.654 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:22:57.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:22:57.657 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:22:57.658 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:22:57.658 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:22:57.658 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:57.658 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:57.658 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:22:57.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:22:57.659 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:22:57.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:22:57.662 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:22:57.662 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:22:57.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:22:57.662 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:22:57.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:22:57.663 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:22:57.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:22:57.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:22:57.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:22:57.668 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:22:57.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:22:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:22:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:22:57.669 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:22:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:22:57.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:22:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:22:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:22:57.669 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:22:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:57.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:22:57.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:57.670 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:22:57.670 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:22:57.670 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:22:57.670 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:22:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:57.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:57.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:22:57.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:57.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:57.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:57.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:57.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:57.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:57.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:57.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:57.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:57.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:57.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:22:57.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:22:57.673 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:22:57.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:02.681 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:23:02.681 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:23:02.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:02.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:02.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:02.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:02.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:02.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:23:02.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:02.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:23:02.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:23:02.691 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:23:02.691 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:23:02.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:23:02.692 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:02.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:02.692 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:23:02.693 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:23:02.693 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:23:02.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:02.695 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:23:02.695 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:23:02.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:23:02.695 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:02.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:02.696 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:23:02.696 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:23:02.696 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:23:02.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:02.697 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:23:02.697 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:23:02.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:23:02.697 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:02.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:02.697 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:23:02.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:23:02.697 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:23:02.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:23:02.700 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:23:02.700 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:23:02.700 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:23:02.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:02.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:02.705 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:23:03.182 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:23:03.227 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:23:03.229 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:23:03.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:23:03.231 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:23:03.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:23:03.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:23:03.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:23:03.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:23:03.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:23:03.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:23:03.236 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:23:03.236 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:23:03.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:23:03.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:23:03.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:23:03.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:23:03.650 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:23:03.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:03.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:03.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:03.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:04.121 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:23:04.595 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:23:04.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:04.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:04.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:04.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:05.067 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:23:05.539 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:23:05.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:05.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:05.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:05.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:06.010 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:23:06.483 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:23:06.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:06.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:06.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:06.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:06.956 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:23:07.428 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:23:07.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:07.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:07.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:07.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:07.899 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:23:08.372 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:23:08.844 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:23:09.316 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:23:09.787 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:23:10.261 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:23:10.733 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:23:11.205 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:23:11.679 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:23:12.151 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:23:12.623 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:23:13.096 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:23:13.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:23:13.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:23:13.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:13.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:13.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:13.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:13.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:13.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:13.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:13.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:13.286 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:23:13.286 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:23:13.286 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:23:13.286 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:23:13.286 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:23:13.286 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:23:13.286 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:23:13.286 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:23:13.286 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:23:13.286 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:23:18.289 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:23:18.289 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:23:18.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:18.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:18.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:18.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:18.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:18.295 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:23:18.295 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:18.295 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:23:18.296 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:23:18.298 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:23:18.298 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:23:18.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:23:18.299 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:18.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:18.299 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:23:18.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:23:18.299 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:23:18.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:18.301 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:23:18.301 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:23:18.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:23:18.301 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:18.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:18.301 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:23:18.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:23:18.301 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:23:18.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:18.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:23:18.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:23:18.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:23:18.303 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:18.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:18.303 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:23:18.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:23:18.304 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:23:18.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:18.306 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:23:18.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:23:18.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:23:18.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:23:18.306 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:23:18.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:23:18.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:23:18.307 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:23:18.307 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:23:18.307 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:18.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:18.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:23:18.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:23:18.308 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:23:23.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:23:23.315 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:23:23.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:23.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:23.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:23.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:23.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:23.325 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:23:23.326 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:23.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:23:23.326 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:23:23.329 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:23:23.329 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:23:23.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:23:23.330 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:23.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:23.330 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:23:23.331 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:23:23.331 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:23:23.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:23.332 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:23:23.332 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:23:23.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:23:23.332 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:23.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:23.333 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:23:23.333 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:23:23.333 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:23:23.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:23.335 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:23:23.335 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:23:23.335 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:23:23.335 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:23.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:23.335 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:23:23.335 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:23:23.335 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:23:23.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:23:23.338 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:23:23.338 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:23:23.338 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:23.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:23.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:23.343 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:23:23.820 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:23:23.863 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:23:23.864 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:23:23.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:23:23.866 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:23:23.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:23:23.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:23:23.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:23:23.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:23:23.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:23:23.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:23:23.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:23:23.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:23:23.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:23:23.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:23:23.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:23:23.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:23:24.292 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:23:24.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:24.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:24.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:24.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:24.763 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:23:25.234 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:23:25.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:25.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:25.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:25.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:25.708 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:23:26.180 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:23:26.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:26.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:26.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:26.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:26.652 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:23:27.126 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:23:27.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:27.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:27.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:27.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:27.598 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:23:28.070 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:23:28.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:28.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:28.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:28.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:28.541 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:23:29.014 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:23:29.487 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:23:29.959 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:23:30.430 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:23:30.903 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:23:31.389 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:23:31.861 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:23:32.332 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:23:32.806 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:23:33.278 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:23:33.750 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:23:34.221 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:23:34.695 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:23:34.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:23:34.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:23:34.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:34.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:34.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:34.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:34.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:34.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:34.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:34.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:23:34.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:23:34.920 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:23:34.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:39.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:23:39.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:23:39.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:39.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:39.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:39.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:39.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:39.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:23:39.936 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:39.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:23:39.936 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:23:39.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:23:39.938 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:23:39.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:23:39.939 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:39.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:39.939 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:23:39.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:23:39.940 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:23:39.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:39.941 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:23:39.941 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:23:39.941 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:23:39.941 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:39.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:39.942 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:23:39.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:23:39.942 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:23:39.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:39.944 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:23:39.944 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:23:39.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:23:39.944 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:39.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:39.944 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:23:39.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:23:39.945 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:23:39.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:39.948 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:23:39.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:23:39.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:23:39.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:23:39.948 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:23:39.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:23:39.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:23:39.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:23:39.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:39.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:23:39.949 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:23:39.949 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:23:39.949 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:39.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:39.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:39.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:39.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:39.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:39.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:39.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:39.951 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:23:39.951 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:23:39.951 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:23:44.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:23:44.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:23:44.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:44.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:44.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:44.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:44.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:44.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:23:44.967 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:44.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:23:44.968 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:23:44.970 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:23:44.970 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:23:44.970 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:23:44.971 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:44.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:44.971 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:23:44.971 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:23:44.971 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:23:44.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:44.973 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:23:44.973 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:23:44.973 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:23:44.973 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:44.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:44.973 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:23:44.973 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:23:44.973 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:23:44.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:44.975 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:23:44.975 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:23:44.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:23:44.975 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:23:44.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:23:44.975 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:23:44.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:23:44.975 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:23:44.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:44.977 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:23:44.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:23:44.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:23:44.978 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:23:44.978 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:23:44.978 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:44.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:44.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:23:44.983 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:23:45.460 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:23:45.492 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:23:45.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:23:45.494 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:23:45.496 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:23:45.932 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:23:45.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:45.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:45.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:45.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:46.408 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:23:46.879 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:23:46.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:46.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:46.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:46.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:47.355 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:23:47.826 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:23:47.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:47.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:47.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:47.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:48.301 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:23:48.773 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:23:48.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:48.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:48.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:48.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:49.249 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:23:49.720 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:23:49.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:49.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:49.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:49.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:50.196 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:23:50.668 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:23:51.142 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:23:51.614 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:23:52.086 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:23:52.561 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:23:53.033 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:23:53.508 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:23:53.979 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:23:54.451 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:23:54.925 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:23:55.397 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:23:55.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:23:55.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:23:55.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:23:55.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:23:55.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:23:55.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:23:55.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:23:55.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:23:55.506 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:23:55.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:23:55.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:24:00.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:24:00.513 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:24:00.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:24:00.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:24:00.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:24:00.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:24:00.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:24:00.516 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:24:00.516 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:00.516 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:24:00.516 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:24:00.517 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:24:00.517 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:24:00.517 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:24:00.517 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:00.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:24:00.518 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:24:00.518 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:24:00.518 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:24:00.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:00.518 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:24:00.518 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:24:00.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:24:00.519 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:00.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:24:00.519 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:24:00.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:24:00.519 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:24:00.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:00.520 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:24:00.520 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:24:00.520 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:24:00.520 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:00.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:24:00.520 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:24:00.520 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:24:00.520 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:24:00.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:24:00.522 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:24:00.522 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:24:00.522 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:00.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:00.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:00.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:24:00.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:24:00.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:24:00.524 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:24:00.524 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:24:00.524 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:24:00.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:24:05.534 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:24:05.534 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:24:05.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:24:05.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:24:05.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:24:05.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:24:05.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:24:05.545 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:24:05.545 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:05.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:24:05.546 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:24:05.550 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:24:05.551 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:24:05.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:24:05.551 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:05.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:24:05.552 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:24:05.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:24:05.553 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:24:05.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:05.554 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:24:05.555 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:24:05.555 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:24:05.555 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:05.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:24:05.555 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:24:05.556 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:24:05.556 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:24:05.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:05.557 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:24:05.558 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:24:05.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:24:05.558 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:05.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:24:05.558 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:24:05.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:24:05.558 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:24:05.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:05.561 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:24:05.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:24:05.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:24:05.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:24:05.561 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:24:05.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:24:05.562 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:24:05.562 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:24:05.562 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:05.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:05.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:05.567 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:24:06.044 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:24:06.092 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:24:06.094 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:24:06.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:24:06.097 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:24:06.520 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:24:06.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:06.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:06.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:06.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:06.992 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:24:07.467 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:24:07.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:07.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:07.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:07.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:07.939 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:24:08.414 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:24:08.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:08.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:08.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:08.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:08.891 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:24:09.363 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:24:09.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:09.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:09.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:09.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:09.838 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:24:10.310 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:24:10.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:10.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:10.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:10.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:10.785 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:24:11.257 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:24:11.732 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:24:12.204 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:24:12.678 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:24:13.150 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:24:13.622 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:24:14.096 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:24:14.565 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:24:15.028 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:24:15.500 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:24:15.972 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:24:16.447 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:24:16.917 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:24:17.380 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:24:17.844 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:24:18.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:18.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:18.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:18.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:18.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:24:18.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:24:18.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:24:18.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:24:18.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:24:18.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:24:18.115 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:24:18.116 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2713 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:24:18.116 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2713 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:24:18.116 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2713 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:24:18.116 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2713 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:24:18.116 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2713 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:24:18.116 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2713 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:24:18.116 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2713 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:24:23.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:24:23.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:24:23.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:24:23.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:24:23.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:24:23.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:24:23.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:24:23.128 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:24:23.129 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:23.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:24:23.129 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:24:23.134 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:24:23.135 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:24:23.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:24:23.135 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:23.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:24:23.137 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:24:23.137 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:24:23.137 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:24:23.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:23.140 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:24:23.140 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:24:23.140 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:24:23.141 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:23.141 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:24:23.141 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:24:23.142 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:24:23.142 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:24:23.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:23.144 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:24:23.144 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:24:23.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:24:23.144 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:23.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:24:23.144 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:24:23.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:24:23.144 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:24:23.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:23.148 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:23.149 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:24:23.149 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:24:23.149 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:24:23.149 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:23.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:23.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:23.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:23.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:23.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:23.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:23.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:23.154 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:24:23.634 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:24:23.679 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:24:23.682 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:24:23.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:24:23.684 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:24:23.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:24:23.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:24:23.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:24:23.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:24:23.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:24:23.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:24:23.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:24:23.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:24:24.106 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:24:24.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:24.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:24.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:24.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:24.577 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:24:25.050 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:24:25.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:25.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:25.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:25.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:25.523 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:24:25.995 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:24:26.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:26.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:26.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:26.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:26.466 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:24:26.939 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:24:27.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:27.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:27.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:27.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:27.412 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:24:27.884 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:24:28.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:28.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:28.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:28.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:28.358 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:24:28.830 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:24:29.302 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:24:29.775 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:24:30.248 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:24:30.720 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:24:31.191 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:24:31.664 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:24:32.137 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:24:32.609 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:24:33.080 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:24:33.553 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:24:34.025 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:24:34.497 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:24:34.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:24:34.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:24:34.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:34.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:34.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:34.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:34.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:24:34.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:24:34.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:24:34.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:24:34.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:24:34.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:24:34.735 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:24:34.735 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2501 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:24:34.735 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2501 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:24:34.735 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2501 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:24:34.735 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2501 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:24:34.735 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2501 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:24:39.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:24:39.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:24:39.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:24:39.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:24:39.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:24:39.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:24:39.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:24:39.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:24:39.747 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:39.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:24:39.747 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:24:39.750 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:24:39.750 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:24:39.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:24:39.751 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:39.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:24:39.751 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:24:39.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:24:39.752 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:24:39.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:39.753 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:24:39.753 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:24:39.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:24:39.753 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:39.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:24:39.754 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:24:39.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:24:39.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:24:39.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:39.756 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:24:39.756 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:24:39.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:24:39.756 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:24:39.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:24:39.756 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:24:39.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:24:39.756 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:24:39.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:39.759 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:24:39.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:24:39.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:24:39.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:24:39.760 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:24:39.760 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:24:39.760 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:24:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:24:39.765 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:24:40.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:24:40.286 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:24:40.289 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:24:40.290 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:24:40.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:24:40.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:24:40.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:24:40.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:24:40.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:24:40.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:24:40.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:24:40.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:24:40.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:24:40.715 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:24:40.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:40.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:40.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:40.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:41.186 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:24:41.660 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:24:41.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:41.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:41.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:41.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:42.132 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:24:42.605 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:24:42.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:42.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:42.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:42.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:43.078 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:24:43.550 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:24:43.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:43.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:43.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:43.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:44.022 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:24:44.493 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:24:44.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:44.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:44.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:44.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:44.967 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:24:45.439 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:24:45.911 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:24:46.382 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:24:46.853 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:24:47.326 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:24:47.799 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:24:48.271 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:24:48.742 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:24:49.215 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:24:49.687 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:24:50.160 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:24:50.631 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:24:51.103 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:24:51.576 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:24:52.048 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:24:52.519 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:24:52.993 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:24:53.465 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:24:53.937 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:24:54.408 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:24:54.881 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:24:55.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:24:55.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:24:55.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:24:55.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:24:55.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:24:55.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:24:55.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:24:55.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:24:55.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:24:55.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:24:55.341 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:24:55.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:24:55.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:25:00.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:25:00.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:25:00.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:25:00.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:25:00.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:25:00.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:25:00.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:25:00.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:25:00.355 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:00.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:25:00.355 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:25:00.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:25:00.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:25:00.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:25:00.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:00.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:25:00.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:25:00.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:25:00.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:25:00.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:00.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:25:00.362 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:25:00.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:25:00.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:00.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:25:00.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:25:00.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:25:00.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:25:00.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:00.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:25:00.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:25:00.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:25:00.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:00.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:25:00.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:25:00.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:25:00.365 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:25:00.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:25:00.368 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:25:00.368 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:25:00.368 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:00.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:00.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:00.373 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:25:00.850 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:25:00.892 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:25:00.893 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:25:00.895 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:25:00.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:00.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:00.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:00.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:00.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:00.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:00.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:00.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:25:00.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:25:00.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:00.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:00.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:00.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:00.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:00.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:00.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:25:00.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:25:00.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:25:00.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:25:00.956 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:25:00.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:25:00.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:25:05.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:25:05.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:25:05.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:25:05.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:25:05.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:25:05.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:25:05.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:25:05.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:25:05.967 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:05.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:25:05.968 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:25:05.970 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:25:05.971 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:25:05.971 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:25:05.971 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:05.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:25:05.972 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:25:05.972 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:25:05.972 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:25:05.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:05.974 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:25:05.974 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:25:05.974 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:25:05.974 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:05.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:25:05.975 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:25:05.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:25:05.975 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:25:05.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:05.976 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:25:05.977 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:25:05.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:25:05.977 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:05.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:25:05.977 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:25:05.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:25:05.977 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:25:05.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:05.980 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:25:05.980 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:25:05.980 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:25:05.980 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:05.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:05.985 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:25:06.464 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:25:06.507 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:25:06.509 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:25:06.511 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:25:06.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:06.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:06.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:06.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:06.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:06.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:06.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:06.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:06.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:06.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:06.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:06.555 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:25:06.555 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:25:06.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:06.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:06.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:06.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:06.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:06.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:06.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:06.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:06.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:06.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:06.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:06.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:06.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:06.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:06.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:06.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:06.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:06.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:06.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:25:06.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:25:06.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:06.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:06.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:06.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:06.936 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:25:06.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:06.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:06.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:06.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:06.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:06.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:06.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:06.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:07.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:07.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:07.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:07.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:07.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:07.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:07.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:07.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:07.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:07.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:07.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:25:07.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:25:07.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:07.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:07.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:07.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:07.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:07.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:07.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:07.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:07.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:07.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:07.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:07.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:07.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:07.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:07.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:07.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:07.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:07.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:07.356 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:25:07.356 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:25:07.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:07.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:07.406 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:25:07.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:07.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:07.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:07.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:07.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:07.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:07.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:07.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:07.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:07.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:07.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:25:07.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:25:07.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:25:07.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:25:07.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:25:07.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:25:07.741 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:25:12.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:25:12.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:25:12.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:25:12.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:25:12.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:25:12.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:25:12.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:25:12.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:25:12.761 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:12.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:25:12.761 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:25:12.763 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:25:12.764 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:25:12.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:25:12.764 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:12.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:25:12.765 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:25:12.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:25:12.765 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:25:12.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:12.767 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:25:12.767 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:25:12.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:25:12.767 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:12.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:25:12.767 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:25:12.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:25:12.767 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:25:12.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:12.769 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:25:12.769 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:25:12.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:25:12.769 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:12.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:25:12.769 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:25:12.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:25:12.769 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:25:12.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:12.772 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:25:12.772 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:25:12.772 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:25:12.773 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:12.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:12.777 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:25:13.256 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:25:13.298 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:25:13.301 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:25:13.302 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:25:13.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:13.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:13.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:13.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:13.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:13.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:13.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:13.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:13.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:13.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:13.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:13.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:25:13.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:25:13.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:13.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:13.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:13.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:13.726 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:25:13.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:13.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:13.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:13.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:14.199 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:25:14.671 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:25:14.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:14.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:14.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:14.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:15.145 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:25:15.617 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:25:15.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:15.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:15.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:15.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:16.090 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:25:16.561 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:25:16.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:16.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:16.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:16.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:17.032 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:25:17.505 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:25:17.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:17.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:17.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:17.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:17.977 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:25:18.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:18.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:18.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:18.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:18.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:18.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:18.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:18.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:18.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:18.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:18.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:18.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:18.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:18.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:18.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:25:18.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:25:18.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:18.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:18.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:18.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:18.449 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:25:18.921 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:25:19.391 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:25:19.865 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:25:20.337 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:25:20.810 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:25:21.283 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:25:21.755 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:25:22.227 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:25:22.698 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:25:23.169 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:25:23.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:23.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:23.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:23.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:23.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:23.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:23.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:23.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:23.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:23.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:23.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:23.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:23.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:23.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:23.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:25:23.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:25:23.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:23.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:23.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:23.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:23.639 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:25:24.110 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:25:24.583 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:25:25.056 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:25:25.528 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:25:25.999 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:25:26.472 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:25:26.945 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:25:27.417 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:25:27.888 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:25:28.361 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:25:28.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:28.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:28.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:28.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:28.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:28.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:28.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:28.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:28.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:28.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:28.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:28.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:28.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:28.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:28.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:25:28.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:25:28.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:28.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:28.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:28.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:28.834 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:25:29.306 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:25:29.779 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:25:30.251 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:25:30.724 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:25:31.197 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:25:31.670 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:25:32.141 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:25:32.613 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:25:33.086 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:25:33.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:33.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:33.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:33.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:33.558 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:25:33.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:33.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:33.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:33.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:33.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:25:33.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:25:33.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:25:33.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:25:33.566 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:25:33.566 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:25:33.566 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:25:33.566 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4492 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:25:33.566 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4492 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:25:33.566 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4492 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:25:33.567 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:25:33.567 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:25:33.567 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:25:38.566 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:25:38.566 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:25:38.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:25:38.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:25:38.566 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:25:38.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:25:38.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:25:38.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:25:38.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:38.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:25:38.576 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:25:38.579 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:25:38.580 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:25:38.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:25:38.580 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:38.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:25:38.580 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:25:38.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:25:38.580 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:25:38.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:38.583 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:25:38.583 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:25:38.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:25:38.583 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:38.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:25:38.583 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:25:38.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:25:38.584 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:25:38.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:38.585 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:25:38.586 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:25:38.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:25:38.586 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:25:38.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:25:38.586 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:25:38.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:25:38.586 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:25:38.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:25:38.589 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:25:38.589 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:25:38.589 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:25:38.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:38.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:25:38.594 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:25:39.072 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:25:39.114 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:25:39.116 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:25:39.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:39.117 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:25:39.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:39.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:39.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:39.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:39.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:39.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:39.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:39.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:39.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:39.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:39.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:25:39.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:25:39.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:39.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:39.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:39.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:39.543 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:25:39.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:39.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:39.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:39.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:40.015 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:25:40.489 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:25:40.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:40.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:40.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:40.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:40.961 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:25:41.434 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:25:41.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:41.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:41.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:41.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:41.904 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:25:42.378 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:25:42.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:42.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:42.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:42.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:42.850 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:25:43.323 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:25:43.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:43.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:43.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:43.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:43.794 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:25:44.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:44.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:44.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:44.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:44.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:44.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:44.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:44.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:44.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:44.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:44.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:44.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:44.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:44.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:44.245 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:25:44.245 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:25:44.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:44.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:44.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:44.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:44.266 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:25:44.738 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:25:45.211 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:25:45.682 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:25:46.155 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:25:46.628 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:25:47.099 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:25:47.571 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:25:48.041 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:25:48.515 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:25:48.988 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:25:49.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:49.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:49.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:49.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:49.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:49.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:49.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:49.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:49.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:49.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:49.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:49.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:49.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:49.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:49.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:25:49.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:25:49.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:49.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:49.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:49.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:49.459 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:25:49.931 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:25:50.401 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:25:50.875 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:25:51.347 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:25:51.820 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:25:52.293 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:25:52.765 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:25:53.237 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:25:53.708 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:25:54.181 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:25:54.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:54.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:54.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:54.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:54.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:54.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:54.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:54.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:54.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:54.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:25:54.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:54.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:54.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:54.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:54.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:25:54.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:25:54.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:25:54.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:25:54.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:54.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:54.654 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:25:55.126 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:25:55.597 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:25:56.070 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:25:56.542 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:25:57.014 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:25:57.485 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:25:57.959 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:25:58.431 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:25:58.903 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:25:59.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:25:59.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:25:59.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:25:59.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:25:59.374 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:25:59.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:25:59.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:25:59.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:25:59.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:25:59.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:25:59.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:25:59.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:25:59.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:25:59.385 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:25:59.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:25:59.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:25:59.385 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4492 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:25:59.386 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4492 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:25:59.386 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4492 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:25:59.386 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4492 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:25:59.386 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:25:59.386 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:25:59.386 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:04.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:26:04.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:26:04.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:26:04.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:26:04.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:26:04.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:26:04.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:26:04.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:26:04.389 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:26:04.390 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:26:04.390 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:26:04.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:26:04.391 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:26:04.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:26:04.391 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:26:04.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:26:04.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:26:04.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:26:04.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:26:04.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:04.392 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:26:04.392 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:26:04.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:26:04.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:26:04.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:26:04.392 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:26:04.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:26:04.393 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:26:04.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:04.394 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:26:04.394 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:26:04.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:26:04.395 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:26:04.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:26:04.395 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:26:04.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:26:04.395 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:26:04.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:04.397 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:26:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:26:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:26:04.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:04.398 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:26:04.398 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:26:04.398 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:26:04.398 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:04.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:04.403 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:26:04.880 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:26:04.928 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:26:04.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:04.932 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:26:04.934 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:26:04.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:04.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:04.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:04.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:04.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:04.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:04.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:04.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:04.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:04.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:04.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:26:04.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:26:05.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:05.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:05.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:05.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:05.351 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:26:05.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:05.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:05.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:05.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:05.824 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:26:06.296 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:26:06.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:06.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:06.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:06.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:06.767 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:26:07.241 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:26:07.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:07.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:07.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:07.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:07.713 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:26:08.185 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:26:08.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:08.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:08.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:08.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:08.656 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:26:09.130 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:26:09.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:09.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:09.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:09.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:09.603 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:26:10.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:10.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:10.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:10.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:10.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:10.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:10.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:10.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:10.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:10.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:10.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:10.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:10.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:10.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:10.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:26:10.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:26:10.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:10.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:10.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:10.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:10.075 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:26:10.548 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:26:11.021 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:26:11.494 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:26:11.966 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:26:12.439 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:26:12.910 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:26:13.383 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:26:13.855 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:26:14.328 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:26:14.798 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:26:15.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:15.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:15.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:15.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:15.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:15.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:15.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:15.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:15.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:15.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:15.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:15.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:15.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:15.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:15.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:26:15.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:26:15.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:15.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:15.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:15.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:15.269 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:26:15.740 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:26:16.213 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:26:16.686 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:26:17.158 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:26:17.629 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:26:18.102 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:26:18.575 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:26:19.046 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:26:19.518 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:26:19.991 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:26:20.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:20.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:20.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:20.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:20.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:20.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:20.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:20.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:20.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:20.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:20.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:20.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:20.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:20.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:20.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:26:20.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:26:20.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:20.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:20.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:20.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:20.463 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:26:20.935 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:26:21.409 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:26:21.881 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:26:22.353 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:26:22.824 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:26:23.297 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:26:23.769 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:26:24.242 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:26:24.713 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:26:25.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:25.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:25.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:25.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:25.186 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:26:25.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:25.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:25.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:25.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:25.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:26:25.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:26:25.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:26:25.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:26:25.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:26:25.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:26:25.197 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:26:25.197 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4493 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:25.197 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:25.197 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:25.197 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:25.197 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:25.197 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:25.197 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:30.199 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:26:30.199 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:26:30.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:26:30.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:26:30.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:26:30.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:26:30.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:26:30.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:26:30.208 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:26:30.209 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:26:30.209 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:26:30.211 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:26:30.212 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:26:30.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:26:30.212 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:26:30.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:26:30.213 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:26:30.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:26:30.213 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:26:30.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:30.214 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:26:30.214 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:26:30.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:26:30.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:26:30.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:26:30.215 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:26:30.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:26:30.215 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:26:30.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:30.217 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:26:30.217 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:26:30.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:26:30.217 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:26:30.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:26:30.217 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:26:30.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:26:30.217 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:26:30.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:26:30.220 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:26:30.220 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:26:30.220 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:30.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:30.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:30.225 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:26:30.703 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:26:30.744 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:26:30.746 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:26:30.748 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:26:30.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:30.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:30.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:30.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:30.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:30.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:30.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:30.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:30.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:30.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:30.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:30.791 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:26:30.791 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:26:30.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:30.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:30.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:30.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:31.175 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:26:31.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:31.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:31.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:31.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:31.647 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:26:32.120 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:26:32.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:32.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:32.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:32.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:32.593 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:26:33.065 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:26:33.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:33.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:33.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:33.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:33.536 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:26:34.007 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:26:34.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:34.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:34.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:34.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:34.477 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:26:34.951 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:26:35.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:35.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:35.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:35.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:35.424 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:26:35.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:35.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:35.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:35.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:35.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:35.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:35.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:35.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:35.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:35.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:35.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:35.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:35.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:35.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:35.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:26:35.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:26:35.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:35.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:35.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:35.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:35.895 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:26:36.367 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:26:36.837 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:26:37.311 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:26:37.783 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:26:38.256 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:26:38.730 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:26:39.202 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:26:39.673 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:26:40.147 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:26:40.619 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:26:40.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:40.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:40.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:40.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:40.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:40.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:40.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:40.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:40.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:40.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:40.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:40.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:40.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:40.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:40.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:26:40.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:26:40.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:40.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:40.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:40.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:41.090 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:26:41.562 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:26:42.034 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:26:42.505 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:26:42.978 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:26:43.451 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:26:43.923 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:26:44.394 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:26:44.867 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:26:45.339 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:26:45.811 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:26:45.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:45.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:45.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:45.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:45.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:45.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:45.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:45.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:45.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:45.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:45.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:45.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:45.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:45.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:45.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:26:45.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:26:45.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:45.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:45.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:45.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:46.282 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:26:46.753 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:26:47.227 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:26:47.699 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:26:48.171 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:26:48.642 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:26:49.115 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:26:49.587 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:26:50.059 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:26:50.530 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:26:50.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:50.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:50.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:50.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:50.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:50.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:50.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:50.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:50.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:26:50.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:26:50.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:26:50.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:26:50.963 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:26:50.963 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:26:50.963 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:26:50.963 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4482 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:50.963 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4482 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:50.963 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4482 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:50.963 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4482 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:50.963 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4482 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:50.963 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4482 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:50.963 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4482 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:55.970 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:26:55.970 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:26:55.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:26:55.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:26:55.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:26:55.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:26:55.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:26:55.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:26:55.973 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:26:55.974 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:26:55.974 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:26:55.974 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:26:55.975 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:26:55.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:26:55.975 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:26:55.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:26:55.975 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:26:55.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:26:55.975 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:26:55.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:55.976 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:26:55.976 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:26:55.976 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:26:55.976 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:26:55.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:26:55.976 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:26:55.976 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:26:55.976 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:26:55.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:55.977 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:26:55.977 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:26:55.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:26:55.977 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:26:55.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:26:55.977 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:26:55.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:26:55.977 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:26:55.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:55.979 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:26:55.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:26:55.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:26:55.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:26:55.980 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:26:55.980 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:26:55.980 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:55.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:26:55.984 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:26:56.462 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:26:56.506 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:26:56.508 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:26:56.510 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:26:56.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:56.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:56.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:56.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:56.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:56.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:56.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:56.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:56.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:56.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:56.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:56.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:26:56.560 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:26:56.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:56.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:56.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:56.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:56.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:56.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:56.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:56.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:56.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:56.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:56.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:56.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:56.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:56.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:56.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:56.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:56.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:56.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:56.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:26:56.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:26:56.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:56.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:56.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:56.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:56.931 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:26:56.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:56.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:56.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:56.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:57.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:57.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:57.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:57.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:57.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:57.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:57.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:57.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:57.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:57.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:57.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:57.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:57.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:57.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:57.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:26:57.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:26:57.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:57.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:57.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:57.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:57.403 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:26:57.876 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:26:57.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:57.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:57.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:57.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:58.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:58.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:58.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:58.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:58.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:58.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:58.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:58.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:58.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:58.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:26:58.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:58.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:58.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:58.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:58.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:26:58.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:26:58.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:26:58.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:26:58.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:58.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:58.348 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:26:58.819 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:26:58.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:26:58.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:26:58.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:26:58.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:26:58.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:26:58.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:26:58.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:26:58.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:26:58.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:26:58.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:26:58.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:26:58.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:26:58.920 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:26:58.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:26:58.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:26:58.920 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=636 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:58.920 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=636 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:58.920 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=636 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:58.920 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=636 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:58.920 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=636 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:58.920 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=636 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:26:58.920 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=636 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:27:03.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:27:03.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:27:03.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:27:03.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:27:03.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:27:03.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:27:03.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:27:03.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:27:03.933 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:27:03.933 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:27:03.933 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:27:03.936 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:27:03.936 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:27:03.936 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:27:03.936 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:27:03.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:27:03.937 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:27:03.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:27:03.937 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:27:03.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:27:03.938 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:27:03.938 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:27:03.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:27:03.939 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:27:03.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:27:03.939 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:27:03.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:27:03.939 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:27:03.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:27:03.941 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:27:03.941 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:27:03.941 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:27:03.941 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:27:03.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:27:03.941 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:27:03.941 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:27:03.941 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:27:03.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:27:03.945 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:27:03.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:27:03.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:27:03.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:27:03.945 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:27:03.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:27:03.946 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:27:03.946 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:27:03.946 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:27:03.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:27:03.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:27:03.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:27:03.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:27:03.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:27:03.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:27:03.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:27:03.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:27:03.951 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:27:04.429 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:27:04.474 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:27:04.477 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:27:04.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:27:04.479 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:27:04.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:27:04.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:27:04.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:27:04.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:27:04.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:27:04.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:27:04.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:27:04.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:27:04.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:27:04.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:27:04.535 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:27:04.535 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:27:04.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:27:04.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:27:04.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:27:04.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:27:04.902 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:27:04.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:27:04.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:27:04.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:27:04.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:27:05.373 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:27:05.846 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:27:05.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:27:05.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:27:05.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:27:05.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:27:06.319 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:27:06.791 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:27:06.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:27:06.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:27:06.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:27:06.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:27:07.262 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:27:07.733 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:27:07.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:27:07.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:27:07.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:27:07.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:27:08.207 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:27:08.679 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:27:08.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:27:08.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:27:08.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:27:08.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:27:09.153 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:27:09.625 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:27:10.098 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:27:10.571 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:27:11.044 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:27:11.516 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:27:11.989 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:27:12.462 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:27:12.934 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:27:13.408 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:27:13.881 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:27:14.353 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:27:14.826 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:27:15.299 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:27:15.772 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:27:16.242 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:27:16.713 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:27:17.186 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:27:17.659 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:27:18.132 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:27:18.602 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:27:19.076 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:27:19.548 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:27:20.021 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:27:20.492 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:27:20.965 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:27:21.438 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:27:21.910 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:27:22.381 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:27:22.854 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:27:23.327 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:27:23.800 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:27:24.273 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:27:24.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:27:24.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:27:24.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:27:24.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:27:24.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:27:24.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:27:24.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:27:24.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:27:24.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:27:24.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:27:24.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:27:24.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:27:24.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:27:24.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:27:24.586 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:27:24.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:27:24.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:27:24.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:27:24.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:27:24.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:27:24.745 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:27:25.217 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:27:25.688 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:27:26.162 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:27:26.634 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:27:27.107 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:27:27.578 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:27:28.049 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:27:28.519 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:27:28.992 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:27:29.465 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:27:29.937 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:27:30.408 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:27:30.881 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:27:31.354 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:27:31.826 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:27:32.299 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:27:32.772 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:27:33.244 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 02:27:33.715 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 02:27:34.188 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 02:27:34.661 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 02:27:35.133 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 02:27:35.604 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 02:27:36.077 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 02:27:36.549 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 02:27:37.022 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 02:27:37.495 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 02:27:37.967 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 02:27:38.440 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 02:27:38.910 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 02:27:39.381 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 02:27:39.852 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 02:27:40.325 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 02:27:40.798 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 02:27:41.270 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 02:27:41.741 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 02:27:42.215 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 02:27:42.687 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 02:27:43.159 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 02:27:43.633 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 02:27:44.105 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 02:27:44.578 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 02:27:44.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:27:44.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:27:44.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:27:44.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:27:44.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:27:44.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:27:44.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:27:44.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:27:44.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:27:44.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:27:44.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:27:44.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:27:44.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:27:44.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:27:44.621 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:27:44.621 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:27:44.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:27:44.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:27:44.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:27:44.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:27:45.048 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 02:27:45.522 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 02:27:45.994 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 02:27:46.466 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 02:27:46.940 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 02:27:47.412 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 02:27:47.884 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 02:27:48.355 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 02:27:48.829 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 02:27:49.301 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 02:27:49.773 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 02:27:50.244 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 02:27:50.715 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 02:27:51.186 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 02:27:51.659 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 02:27:52.131 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-03 02:27:52.603 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-03 02:27:53.077 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-03 02:27:53.549 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-03 02:27:54.022 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-03 02:27:54.492 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-03 02:27:54.966 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-03 02:27:55.438 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-03 02:27:55.910 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-03 02:27:56.381 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-03 02:27:56.854 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-03 02:27:57.327 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-03 02:27:57.799 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-03 02:27:58.270 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-03 02:27:58.741 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-03 02:27:59.214 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-03 02:27:59.686 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-03 02:28:00.158 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-03 02:28:00.630 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-03 02:28:01.103 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-03 02:28:01.575 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-03 02:28:02.048 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-03 02:28:02.517 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-03 02:28:02.982 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-03 02:28:03.447 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-03 02:28:03.911 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-03 02:28:04.376 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-03 02:28:04.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:04.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:04.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:04.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:04.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:04.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:04.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:04.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:04.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:04.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:04.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:04.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:04.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:04.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:04.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:28:04.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:28:04.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:04.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:04.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:04.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:04.841 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-03 02:28:05.304 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-03 02:28:05.771 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-03 02:28:06.236 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-03 02:28:06.706 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-03 02:28:07.179 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-03 02:28:07.648 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-03 02:28:08.117 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-03 02:28:08.587 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-03 02:28:09.057 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-03 02:28:09.530 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-03 02:28:10.001 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-03 02:28:10.473 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-03 02:28:10.946 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-03 02:28:11.418 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-03 02:28:11.890 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-03 02:28:12.361 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-03 02:28:12.835 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-03 02:28:13.307 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-03 02:28:13.780 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-03 02:28:14.251 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-03 02:28:14.724 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-03 02:28:15.197 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-03 02:28:15.669 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-03 02:28:16.140 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-03 02:28:16.613 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-03 02:28:17.085 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-03 02:28:17.557 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-03 02:28:18.028 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-03 02:28:18.502 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-03 02:28:18.974 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-03 02:28:19.446 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-03 02:28:19.917 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-03 02:28:20.390 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-03 02:28:20.863 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-03 02:28:21.335 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-03 02:28:21.806 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-03 02:28:22.277 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-03 02:28:22.750 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-03 02:28:23.222 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-03 02:28:23.694 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-03 02:28:24.165 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-03 02:28:24.639 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-03 02:28:24.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:24.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:24.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:24.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:24.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:28:24.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:28:24.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:28:24.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:28:24.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:28:24.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:28:24.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:28:24.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:28:24.723 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:28:24.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:28:24.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:28:24.724 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=17463 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:28:24.724 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=17463 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:28:24.724 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=17463 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:28:24.724 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=17463 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:28:24.724 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=17463 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:28:24.724 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=17463 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:28:24.724 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=17463 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:28:29.726 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:28:29.726 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:28:29.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:28:29.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:28:29.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:28:29.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:28:29.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:28:29.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:28:29.736 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:28:29.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:28:29.736 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:28:29.739 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:28:29.739 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:28:29.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:28:29.739 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:28:29.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:28:29.740 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:28:29.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:28:29.740 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:28:29.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:28:29.742 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:28:29.742 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:28:29.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:28:29.742 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:28:29.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:28:29.742 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:28:29.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:28:29.742 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:28:29.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:28:29.744 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:28:29.744 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:28:29.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:28:29.744 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:28:29.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:28:29.744 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:28:29.744 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:28:29.744 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:28:29.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:28:29.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:28:29.747 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:28:29.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:29.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:29.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:28:29.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:29.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:29.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:29.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:29.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:29.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:29.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:29.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:28:29.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:28:29.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:28:29.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:28:29.749 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:28:29.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:28:34.757 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:28:34.757 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:28:34.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:28:34.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:28:34.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:28:34.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:28:34.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:28:34.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:28:34.765 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:28:34.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:28:34.766 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:28:34.769 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:28:34.770 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:28:34.770 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:28:34.770 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:28:34.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:28:34.771 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:28:34.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:28:34.772 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:28:34.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:28:34.773 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:28:34.774 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:28:34.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:28:34.774 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:28:34.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:28:34.774 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:28:34.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:28:34.775 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:28:34.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:28:34.778 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:28:34.778 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:28:34.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:28:34.778 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:28:34.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:28:34.779 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:28:34.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:28:34.779 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:28:34.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:34.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:28:34.788 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:28:34.788 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:28:34.788 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:34.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:34.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:34.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:34.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:34.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:34.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:34.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:34.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:34.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:34.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:34.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:34.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:34.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:34.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:34.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:34.793 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:28:35.270 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:28:35.322 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:28:35.324 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:28:35.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:35.327 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:28:35.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:35.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:35.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:35.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:35.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:35.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:35.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:35.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:35.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:35.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:35.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:28:35.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:28:35.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:35.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:35.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:35.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:35.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:35.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:35.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:35.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:35.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:35.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:35.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:35.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:35.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:35.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:35.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:35.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:28:35.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:28:35.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:35.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:35.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:35.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:35.740 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:28:35.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:28:35.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:28:35.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:28:35.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:28:35.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:35.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:35.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:35.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:35.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:35.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:35.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:35.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:35.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:35.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:35.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:35.863 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:28:35.863 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:28:35.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:35.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:35.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:35.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:36.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:36.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:36.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:36.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:36.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:36.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:36.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:36.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:36.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:36.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:36.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:36.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:36.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:36.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:36.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:28:36.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:28:36.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:36.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:36.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:36.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:36.211 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:28:36.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:36.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:36.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:36.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:36.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:36.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:36.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:36.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:36.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:36.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:36.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:36.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:28:36.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:28:36.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:36.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:36.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:36.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:36.684 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:28:36.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:36.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:36.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:36.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:36.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:36.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:36.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:36.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:36.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:36.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:36.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:36.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:28:36.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:28:36.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:28:36.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:28:36.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:28:36.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:28:36.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:36.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:36.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:36.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:37.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:37.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:37.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:37.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:37.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:37.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:37.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:37.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:37.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:37.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:37.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:37.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:37.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:37.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:37.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:28:37.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:28:37.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:37.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:37.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:37.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:37.156 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:28:37.627 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:28:37.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:28:37.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:28:37.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:28:37.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:28:38.100 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:28:38.573 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:28:38.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:28:38.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:28:38.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:28:38.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:28:39.045 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:28:39.516 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:28:39.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:39.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:39.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:39.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:39.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:39.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:39.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:39.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:39.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:39.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:39.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:39.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:28:39.684 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:28:39.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:39.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:39.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:39.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:39.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:28:39.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:28:39.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:28:39.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:28:39.989 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:28:40.461 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:28:40.934 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:28:41.404 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:28:41.878 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:28:42.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:42.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:42.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:42.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:42.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:42.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:42.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:42.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:42.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:42.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:42.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:42.288 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:28:42.288 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:28:42.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:42.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:42.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:42.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:42.350 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:28:42.822 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:28:43.296 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:28:43.768 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:28:44.240 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:28:44.711 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:28:44.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:44.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:44.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:44.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:44.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:44.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:44.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:44.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:44.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:44.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:44.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:44.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:44.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:44.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:44.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:28:44.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:28:44.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:44.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:44.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:44.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:45.184 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:28:45.657 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:28:46.129 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:28:46.602 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:28:47.075 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:28:47.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:47.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:47.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:47.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:47.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:47.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:47.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:47.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:47.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:47.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:47.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:47.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:28:47.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:28:47.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:47.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:47.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:47.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:47.546 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:28:48.018 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:28:48.489 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:28:48.962 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:28:49.434 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:28:49.906 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:28:49.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:49.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:49.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:49.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:50.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:50.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:50.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:50.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:50.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:50.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:50.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:50.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:28:50.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:28:50.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:50.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:50.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:50.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:50.377 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:28:50.851 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:28:51.323 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:28:51.795 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:28:52.266 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:28:52.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:52.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:52.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:52.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:52.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:28:52.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:28:52.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:28:52.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:28:52.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:28:52.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:28:52.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:28:52.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:28:52.601 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:28:52.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:28:52.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:28:57.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:28:57.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:28:57.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:28:57.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:28:57.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:28:57.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:28:57.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:28:57.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:28:57.610 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:28:57.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:28:57.610 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:28:57.611 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:28:57.611 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:28:57.611 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:28:57.611 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:28:57.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:28:57.611 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:28:57.611 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:28:57.611 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:28:57.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:28:57.612 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:28:57.612 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:28:57.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:28:57.612 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:28:57.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:28:57.612 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:28:57.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:28:57.612 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:28:57.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:28:57.613 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:28:57.613 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:28:57.613 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:28:57.613 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:28:57.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:28:57.613 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:28:57.613 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:28:57.613 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:28:57.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:28:57.615 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:28:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:28:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:28:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:28:57.615 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:28:57.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:28:57.616 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:28:57.616 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:28:57.616 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:28:57.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:28:57.620 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:28:58.098 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:28:58.141 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:28:58.143 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:28:58.145 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:28:58.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:58.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:58.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:58.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:58.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:28:58.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:28:58.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:28:58.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:28:58.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:58.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:58.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:58.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:28:58.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:28:58.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:28:58.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:28:58.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:58.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:28:58.569 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:28:58.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:28:58.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:28:58.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:28:58.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:28:59.042 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:28:59.515 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:28:59.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:28:59.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:28:59.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:28:59.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:28:59.988 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:29:00.461 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:29:00.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:00.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:00.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:00.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:00.933 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:29:01.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:01.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:01.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:01.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:01.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:01.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:01.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:01.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:01.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:01.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:01.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:01.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:01.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:01.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:01.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:01.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:01.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:01.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:01.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:01.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:01.404 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:29:01.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:01.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:01.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:01.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:01.875 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:29:02.345 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:29:02.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:02.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:02.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:02.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:02.819 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:29:03.292 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:29:03.763 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:29:04.233 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:29:04.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:04.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:04.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:04.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:04.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:04.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:04.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:04.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:04.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:04.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:04.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:04.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:04.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:04.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:04.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:04.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:04.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:04.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:04.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:04.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:04.706 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:29:05.179 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:29:05.652 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:29:06.125 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:29:06.598 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:29:07.070 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:29:07.541 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:29:07.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:07.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:07.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:07.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:07.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:07.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:07.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:07.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:07.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:07.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:07.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:07.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:07.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:07.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:07.954 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:07.954 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:07.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:07.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:07.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:07.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:08.013 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:29:08.486 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:29:08.958 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:29:09.429 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:29:09.902 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:29:10.375 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:29:10.847 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:29:11.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:11.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:11.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:11.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:11.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:11.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:11.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:11.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:11.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:29:11.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:29:11.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:29:11.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:29:11.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:29:11.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:29:11.182 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:29:16.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:29:16.188 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:29:16.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:29:16.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:29:16.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:29:16.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:29:16.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:29:16.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:29:16.197 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:16.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:29:16.197 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:29:16.199 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:29:16.200 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:29:16.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:29:16.200 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:16.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:29:16.201 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:29:16.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:29:16.201 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:29:16.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:16.202 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:29:16.202 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:29:16.202 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:29:16.202 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:16.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:29:16.202 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:29:16.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:29:16.203 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:29:16.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:16.204 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:29:16.204 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:29:16.204 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:29:16.204 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:16.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:29:16.205 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:29:16.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:29:16.205 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:29:16.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:16.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:29:16.208 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:29:16.208 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:29:16.208 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:16.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:16.212 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:29:16.690 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:29:16.731 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:29:16.734 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:29:16.736 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:29:16.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:16.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:16.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:16.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:16.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:16.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:16.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:16.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:16.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:16.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:16.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:16.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:16.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:16.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:16.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:16.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:16.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:17.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:17.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:17.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:17.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:17.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:17.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:17.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:17.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:17.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:17.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:17.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:17.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:17.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:17.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:17.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:17.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:17.160 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:29:17.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:17.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:17.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:17.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:17.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:17.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:17.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:17.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:17.633 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:29:17.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:17.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:17.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:17.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:17.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:17.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:17.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:17.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:17.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:17.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:17.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:17.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:17.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:17.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:17.677 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:17.677 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:17.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:17.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:17.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:17.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:18.105 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:29:18.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:18.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:18.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:18.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:18.576 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:29:19.049 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:29:19.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:19.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:19.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:19.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:19.521 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:29:19.993 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:29:20.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:20.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:20.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:20.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:20.464 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:29:20.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:20.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:20.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:20.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:20.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:20.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:20.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:20.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:20.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:20.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:20.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:20.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:20.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:20.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:20.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:20.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:20.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:20.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:20.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:20.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:20.935 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:29:21.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:21.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:21.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:21.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:21.408 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:29:21.881 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:29:22.353 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:29:22.824 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:29:23.296 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:29:23.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:23.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:23.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:23.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:23.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:23.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:23.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:23.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:23.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:29:23.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:29:23.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:29:23.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:29:23.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:29:23.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:29:23.628 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:29:28.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:29:28.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:29:28.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:29:28.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:29:28.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:29:28.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:29:28.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:29:28.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:29:28.644 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:28.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:29:28.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:29:28.650 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:29:28.650 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:29:28.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:29:28.651 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:28.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:29:28.651 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:29:28.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:29:28.651 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:29:28.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:28.655 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:29:28.655 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:29:28.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:29:28.656 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:28.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:29:28.656 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:29:28.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:29:28.656 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:29:28.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:28.659 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:29:28.660 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:29:28.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:29:28.660 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:28.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:29:28.660 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:29:28.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:29:28.660 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:29:28.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:28.664 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:29:28.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:29:28.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:29:28.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:29:28.664 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:29:28.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:29:28.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:29:28.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:29:28.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:29:28.665 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:29:28.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:28.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:28.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:28.670 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:29:29.144 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:29:29.197 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:29:29.199 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:29:29.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:29.202 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:29:29.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:29.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:29.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:29.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:29.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:29.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:29.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:29.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:29.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:29.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:29.231 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:29.231 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:29.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:29.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:29.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:29.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:29.616 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:29:29.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:29.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:29.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:29.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:30.088 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:29:30.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:30.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:30.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:30.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:30.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:30.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:30.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:30.561 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:29:30.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:30.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:30.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:30.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:30.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:30.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:30.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:30.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:30.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:30.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:30.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:30.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:30.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:30.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:30.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:30.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:30.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:31.033 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:29:31.505 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:29:31.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:31.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:31.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:31.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:31.979 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:29:32.452 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:29:32.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:32.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:32.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:32.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:32.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:32.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:32.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:32.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:32.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:32.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:32.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:32.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:32.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:32.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:32.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:32.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:32.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:32.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:32.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:32.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:32.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:32.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:32.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:32.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:32.923 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:29:33.395 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:29:33.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:33.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:33.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:33.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:33.865 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:29:34.339 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:29:34.811 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:29:35.283 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:29:35.754 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:29:36.227 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:29:36.700 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:29:37.172 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:29:37.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:37.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:37.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:37.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:37.643 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:29:37.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:37.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:37.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:37.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:37.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:37.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:37.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:37.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:37.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:37.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:37.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:37.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:37.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:37.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:37.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:37.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:38.113 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:29:38.585 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:29:39.058 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:29:39.530 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:29:40.002 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:29:40.473 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:29:40.946 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:29:41.419 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:29:41.891 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:29:42.364 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:29:42.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:42.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:42.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:42.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:42.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:42.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:42.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:42.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:42.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:29:42.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:29:42.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:29:42.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:29:42.535 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:29:42.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:29:42.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:29:47.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:29:47.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:29:47.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:29:47.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:29:47.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:29:47.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:29:47.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:29:47.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:29:47.552 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:47.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:29:47.552 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:29:47.555 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:29:47.555 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:29:47.555 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:29:47.555 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:47.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:29:47.556 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:29:47.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:29:47.556 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:29:47.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:47.558 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:29:47.558 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:29:47.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:29:47.559 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:47.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:29:47.559 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:29:47.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:29:47.559 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:29:47.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:47.561 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:29:47.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:29:47.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:29:47.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:47.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:29:47.561 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:29:47.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:29:47.561 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:29:47.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:29:47.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:29:47.564 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:29:47.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:47.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:47.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:47.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:29:48.048 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:29:48.091 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:29:48.093 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:29:48.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:48.095 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:29:48.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:48.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:48.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:48.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:48.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:48.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:48.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:48.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:48.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:48.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:48.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:48.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:48.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:48.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:48.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:48.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:48.520 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:29:48.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:48.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:48.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:48.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:48.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:48.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:48.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:48.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:48.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:48.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:48.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:48.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:48.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:48.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:48.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:48.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:48.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:48.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:48.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:48.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:48.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:48.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:48.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:48.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:48.991 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:29:49.462 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:29:49.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:49.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:49.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:49.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:49.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:49.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:49.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:49.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:49.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:49.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:49.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:49.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:49.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:49.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:49.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:49.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:49.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:49.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:49.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:49.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:49.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:49.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:49.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:49.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:49.935 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:29:50.407 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:29:50.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:50.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:50.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:50.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:50.880 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:29:51.351 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:29:51.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:51.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:51.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:51.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:51.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:51.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:51.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:51.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:51.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:51.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:51.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:51.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:51.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:51.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:51.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:51.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:51.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:51.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:51.772 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:51.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:51.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:51.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:51.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:51.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:51.821 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:29:52.292 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:29:52.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:52.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:52.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:52.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:52.765 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:29:53.238 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:29:53.710 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:29:53.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:53.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:53.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:53.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:53.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:53.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:53.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:53.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:53.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:29:53.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:29:53.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:29:53.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:29:53.813 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:29:53.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:29:53.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:29:53.813 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1350 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:29:53.813 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1350 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:29:53.813 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1350 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:29:53.813 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1350 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:29:53.814 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1350 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:29:53.814 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1350 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:29:53.814 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1350 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:29:58.816 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:29:58.816 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:29:58.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:29:58.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:29:58.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:29:58.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:29:58.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:29:58.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:29:58.824 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:58.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:29:58.825 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:29:58.827 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:29:58.827 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:29:58.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:29:58.827 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:58.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:29:58.828 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:29:58.828 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:29:58.828 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:29:58.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:58.829 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:29:58.829 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:29:58.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:29:58.830 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:58.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:29:58.830 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:29:58.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:29:58.830 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:29:58.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:58.831 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:29:58.832 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:29:58.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:29:58.832 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:29:58.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:29:58.832 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:29:58.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:29:58.832 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:29:58.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:29:58.834 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:29:58.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:29:58.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:29:58.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:29:58.834 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:29:58.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:29:58.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:29:58.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:29:58.835 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:29:58.835 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:29:58.835 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:29:58.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:58.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:29:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:29:58.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:58.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:29:58.839 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:29:59.318 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:29:59.355 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:29:59.356 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:29:59.357 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:29:59.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:59.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:59.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:59.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:59.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:29:59.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:29:59.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:29:59.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:29:59.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:59.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:59.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:59.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:29:59.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:29:59.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:29:59.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:29:59.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:59.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:29:59.789 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:29:59.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:29:59.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:29:59.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:29:59.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:00.261 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:30:00.732 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:30:00.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:00.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:00.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:00.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:01.203 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:30:01.674 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:30:01.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:01.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:01.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:01.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:01.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:01.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:01.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:01.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:01.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:01.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:01.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:01.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:01.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:01.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:01.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:01.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:01.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:01.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:01.862 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:30:01.862 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:30:01.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:01.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:01.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:01.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:02.144 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:30:02.615 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:30:02.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:02.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:02.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:02.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:03.086 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:30:03.556 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:30:03.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:03.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:03.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:03.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:04.027 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:30:04.498 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:30:04.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:04.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:04.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:04.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:04.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:04.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:04.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:04.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:04.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:04.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:04.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:04.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:04.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:04.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:04.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:30:04.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:30:04.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:04.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:04.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:04.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:04.969 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:30:05.442 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:30:05.915 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:30:06.387 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:30:06.858 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:30:07.331 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:30:07.804 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:30:07.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:07.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:07.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:07.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:07.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:07.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:07.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:07.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:07.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:07.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:07.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:07.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:07.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:07.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:07.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:30:07.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:30:08.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:08.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:08.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:08.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:08.275 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:30:08.747 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:30:09.220 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:30:09.692 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:30:10.164 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:30:10.635 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:30:11.109 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:30:11.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:11.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:11.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:11.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:11.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:11.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:11.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:11.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:11.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:30:11.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:30:11.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:30:11.434 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:30:11.434 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:30:11.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:30:11.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:30:16.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:30:16.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:30:16.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:30:16.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:30:16.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:30:16.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:30:16.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:30:16.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:30:16.449 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:30:16.450 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:30:16.450 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:30:16.454 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:30:16.454 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:30:16.454 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:30:16.454 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:30:16.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:30:16.455 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:30:16.455 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:30:16.455 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:30:16.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:16.459 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:30:16.459 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:30:16.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:30:16.460 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:30:16.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:30:16.461 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:30:16.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:30:16.462 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:30:16.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:16.464 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:30:16.464 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:30:16.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:30:16.464 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:30:16.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:30:16.465 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:30:16.465 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:30:16.465 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:30:16.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:16.469 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:30:16.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:30:16.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:16.470 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:30:16.470 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:30:16.470 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:30:16.470 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:30:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:16.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:30:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:16.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:16.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:16.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:16.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:16.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:16.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:16.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:16.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:16.475 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:30:16.952 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:30:16.996 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:30:16.998 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:30:17.000 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:30:17.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:17.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:17.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:17.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:17.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:17.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:17.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:17.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:17.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:17.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:17.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:17.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:30:17.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:30:17.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:17.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:17.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:17.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:17.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:17.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:17.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:17.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:17.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:17.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:17.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:17.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:17.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:17.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:17.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:17.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:17.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:17.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:17.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:30:17.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:30:17.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:17.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:17.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:17.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:17.422 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:30:17.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:17.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:17.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:17.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:17.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:17.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:17.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:17.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:17.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:17.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:17.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:17.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:17.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:17.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:17.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:17.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:17.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:17.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:17.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:30:17.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:30:17.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:17.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:17.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:17.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:17.894 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:30:18.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:18.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:18.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:18.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:18.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:18.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:18.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:18.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:18.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:18.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:18.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:18.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:18.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:18.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:18.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:30:18.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:30:18.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:18.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:18.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:18.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:18.366 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:30:18.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:18.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:18.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:18.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:18.838 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:30:18.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:18.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:18.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:18.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:18.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:18.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:18.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:18.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:18.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:30:18.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:30:18.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:30:18.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:30:18.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:30:18.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:30:18.936 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:30:18.936 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:30:18.936 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:30:18.936 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:30:18.936 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:30:23.940 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:30:23.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:30:23.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:30:23.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:30:23.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:30:23.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:30:23.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:30:23.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:30:23.949 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:30:23.950 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:30:23.950 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:30:23.953 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:30:23.953 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:30:23.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:30:23.953 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:30:23.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:30:23.954 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:30:23.954 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:30:23.954 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:30:23.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:23.957 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:30:23.957 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:30:23.957 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:30:23.958 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:30:23.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:30:23.958 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:30:23.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:30:23.958 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:30:23.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:23.960 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:30:23.960 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:30:23.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:30:23.960 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:30:23.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:30:23.961 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:30:23.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:30:23.961 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:30:23.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:30:23.964 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:30:23.964 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:30:23.964 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:30:23.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:30:23.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:30:23.969 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:30:24.447 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:30:24.487 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:30:24.488 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:30:24.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:24.490 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:30:24.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:24.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:24.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:24.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:24.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:24.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:24.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:24.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:24.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:24.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:24.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:30:24.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:30:24.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:24.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:24.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:24.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:24.920 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:30:24.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:24.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:24.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:24.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:25.391 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:30:25.864 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:30:25.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:25.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:25.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:25.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:26.337 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:30:26.809 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:30:26.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:26.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:26.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:26.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:27.283 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:30:27.755 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:30:27.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:27.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:27.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:27.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:28.228 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:30:28.701 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:30:28.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:30:28.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:30:28.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:30:28.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:30:29.174 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:30:29.646 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:30:30.117 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:30:30.591 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:30:31.063 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:30:31.536 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:30:32.007 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:30:32.480 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:30:32.953 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:30:33.425 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:30:33.899 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:30:34.371 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:30:34.844 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:30:35.317 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:30:35.790 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:30:36.262 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:30:36.736 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:30:37.208 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:30:37.681 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:30:38.154 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:30:38.627 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:30:39.099 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:30:39.573 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:30:40.046 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:30:40.518 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:30:40.991 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:30:41.464 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:30:41.936 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:30:42.410 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:30:42.882 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:30:43.355 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:30:43.828 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:30:44.301 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:30:44.773 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:30:45.244 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:30:45.717 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:30:46.190 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:30:46.662 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:30:47.133 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:30:47.606 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:30:48.079 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:30:48.551 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:30:49.022 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:30:49.496 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:30:49.968 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:30:50.441 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:30:50.912 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:30:51.385 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:30:51.858 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:30:52.330 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:30:52.801 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:30:53.274 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 02:30:53.747 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 02:30:54.219 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 02:30:54.690 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 02:30:55.161 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 02:30:55.634 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 02:30:56.107 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 02:30:56.579 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 02:30:57.053 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 02:30:57.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:57.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:57.526 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 02:30:57.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:57.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:57.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:57.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:57.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:57.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:30:57.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:30:57.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:30:57.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:30:57.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:57.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:57.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:57.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:30:57.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:30:57.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:30:57.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:30:57.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:57.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:30:57.997 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 02:30:58.469 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 02:30:58.942 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 02:30:59.415 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 02:30:59.887 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 02:31:00.358 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 02:31:00.829 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 02:31:01.299 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 02:31:01.772 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 02:31:02.246 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 02:31:02.718 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 02:31:03.191 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 02:31:03.664 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 02:31:04.136 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 02:31:04.607 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 02:31:05.078 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 02:31:05.551 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 02:31:06.024 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 02:31:06.497 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 02:31:06.967 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 02:31:07.441 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 02:31:07.913 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 02:31:08.386 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 02:31:08.859 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 02:31:09.332 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 02:31:09.804 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 02:31:10.275 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 02:31:10.748 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 02:31:11.220 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 02:31:11.693 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 02:31:12.164 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-03 02:31:12.634 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-03 02:31:13.105 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-03 02:31:13.576 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-03 02:31:14.047 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-03 02:31:14.520 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-03 02:31:14.993 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-03 02:31:15.465 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-03 02:31:15.936 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-03 02:31:16.407 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-03 02:31:16.881 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-03 02:31:17.353 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-03 02:31:17.825 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-03 02:31:18.296 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-03 02:31:18.767 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-03 02:31:19.241 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-03 02:31:19.713 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-03 02:31:20.185 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-03 02:31:20.659 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-03 02:31:21.131 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-03 02:31:21.603 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-03 02:31:22.077 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-03 02:31:22.549 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-03 02:31:23.021 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-03 02:31:23.492 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-03 02:31:23.963 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-03 02:31:24.434 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-03 02:31:24.905 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-03 02:31:25.375 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-03 02:31:25.849 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-03 02:31:26.321 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-03 02:31:26.794 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-03 02:31:27.267 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-03 02:31:27.739 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-03 02:31:28.212 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-03 02:31:28.683 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-03 02:31:29.156 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-03 02:31:29.628 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-03 02:31:30.101 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-03 02:31:30.572 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-03 02:31:31.042 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-03 02:31:31.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:31:31.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:31:31.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:31:31.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:31:31.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:31:31.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:31:31.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:31:31.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:31:31.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:31:31.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:31:31.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:31:31.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:31:31.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:31:31.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:31:31.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:31:31.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:31:31.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:31:31.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:31:31.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:31:31.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:31:31.513 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-03 02:31:31.984 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-03 02:31:32.457 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-03 02:31:32.930 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-03 02:31:33.402 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-03 02:31:33.873 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-03 02:31:34.346 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-03 02:31:34.818 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-03 02:31:35.290 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-03 02:31:35.761 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-03 02:31:36.232 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-03 02:31:36.706 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-03 02:31:37.178 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-03 02:31:37.650 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-03 02:31:38.121 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-03 02:31:38.594 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-03 02:31:39.067 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-03 02:31:39.539 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-03 02:31:40.010 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-03 02:31:40.481 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-03 02:31:40.954 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-03 02:31:41.427 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-03 02:31:41.899 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-03 02:31:42.370 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-03 02:31:42.843 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-03 02:31:43.316 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-03 02:31:43.788 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-03 02:31:44.259 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-03 02:31:44.732 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-03 02:31:45.205 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-03 02:31:45.677 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-03 02:31:46.148 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-03 02:31:46.621 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-03 02:31:47.094 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-03 02:31:47.566 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-03 02:31:48.037 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-03 02:31:48.510 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-03 02:31:48.983 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-03 02:31:49.455 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-03 02:31:49.926 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-03 02:31:50.397 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-03 02:31:50.870 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-03 02:31:51.343 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-03 02:31:51.815 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-03 02:31:52.286 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-03 02:31:52.759 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-03 02:31:53.232 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-03 02:31:53.704 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-03 02:31:54.177 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-03 02:31:54.650 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-05-03 02:31:55.122 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-05-03 02:31:55.593 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-05-03 02:31:56.064 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-05-03 02:31:56.537 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-05-03 02:31:57.009 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-05-03 02:31:57.481 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-05-03 02:31:57.952 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-05-03 02:31:58.426 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-05-03 02:31:58.898 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-05-03 02:31:59.370 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-05-03 02:31:59.841 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-05-03 02:32:00.312 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-05-03 02:32:00.783 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-05-03 02:32:01.253 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-05-03 02:32:01.727 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-05-03 02:32:02.199 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-05-03 02:32:02.671 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-05-03 02:32:03.142 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-05-03 02:32:03.616 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-05-03 02:32:04.088 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-05-03 02:32:04.560 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-05-03 02:32:05.031 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-05-03 02:32:05.504 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-05-03 02:32:05.977 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-05-03 02:32:06.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:06.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:32:06.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:06.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:06.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:06.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:06.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:32:06.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:06.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:06.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:32:06.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:32:06.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:06.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:32:06.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:32:06.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:32:06.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:32:06.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:32:06.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:32:06.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:06.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:06.448 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-05-03 02:32:06.920 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-05-03 02:32:07.392 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-05-03 02:32:07.865 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-05-03 02:32:08.337 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-05-03 02:32:08.808 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-05-03 02:32:09.281 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-05-03 02:32:09.754 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-05-03 02:32:10.226 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-05-03 02:32:10.697 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-05-03 02:32:11.171 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-05-03 02:32:11.643 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-05-03 02:32:12.115 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-05-03 02:32:12.586 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-05-03 02:32:13.060 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-05-03 02:32:13.532 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-05-03 02:32:14.004 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-05-03 02:32:14.475 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-05-03 02:32:14.948 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-05-03 02:32:15.421 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-05-03 02:32:15.893 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-05-03 02:32:16.364 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-05-03 02:32:16.837 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-05-03 02:32:17.310 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-05-03 02:32:17.782 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-05-03 02:32:18.253 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-05-03 02:32:18.726 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-05-03 02:32:19.199 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-05-03 02:32:19.671 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-05-03 02:32:20.144 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-05-03 02:32:20.617 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-05-03 02:32:21.088 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-05-03 02:32:21.560 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-05-03 02:32:22.030 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-05-03 02:32:22.504 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-05-03 02:32:22.976 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-05-03 02:32:23.448 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-05-03 02:32:23.919 [DEBUG] clck_gen.py:113 IND CLOCK 25908
2026-05-03 02:32:24.393 [DEBUG] clck_gen.py:113 IND CLOCK 26010
2026-05-03 02:32:24.865 [DEBUG] clck_gen.py:113 IND CLOCK 26112
2026-05-03 02:32:25.337 [DEBUG] clck_gen.py:113 IND CLOCK 26214
2026-05-03 02:32:25.808 [DEBUG] clck_gen.py:113 IND CLOCK 26316
2026-05-03 02:32:26.281 [DEBUG] clck_gen.py:113 IND CLOCK 26418
2026-05-03 02:32:26.754 [DEBUG] clck_gen.py:113 IND CLOCK 26520
2026-05-03 02:32:27.225 [DEBUG] clck_gen.py:113 IND CLOCK 26622
2026-05-03 02:32:27.697 [DEBUG] clck_gen.py:113 IND CLOCK 26724
2026-05-03 02:32:28.170 [DEBUG] clck_gen.py:113 IND CLOCK 26826
2026-05-03 02:32:28.643 [DEBUG] clck_gen.py:113 IND CLOCK 26928
2026-05-03 02:32:29.115 [DEBUG] clck_gen.py:113 IND CLOCK 27030
2026-05-03 02:32:29.586 [DEBUG] clck_gen.py:113 IND CLOCK 27132
2026-05-03 02:32:30.059 [DEBUG] clck_gen.py:113 IND CLOCK 27234
2026-05-03 02:32:30.531 [DEBUG] clck_gen.py:113 IND CLOCK 27336
2026-05-03 02:32:31.003 [DEBUG] clck_gen.py:113 IND CLOCK 27438
2026-05-03 02:32:31.475 [DEBUG] clck_gen.py:113 IND CLOCK 27540
2026-05-03 02:32:31.948 [DEBUG] clck_gen.py:113 IND CLOCK 27642
2026-05-03 02:32:32.420 [DEBUG] clck_gen.py:113 IND CLOCK 27744
2026-05-03 02:32:32.893 [DEBUG] clck_gen.py:113 IND CLOCK 27846
2026-05-03 02:32:33.366 [DEBUG] clck_gen.py:113 IND CLOCK 27948
2026-05-03 02:32:33.838 [DEBUG] clck_gen.py:113 IND CLOCK 28050
2026-05-03 02:32:34.310 [DEBUG] clck_gen.py:113 IND CLOCK 28152
2026-05-03 02:32:34.781 [DEBUG] clck_gen.py:113 IND CLOCK 28254
2026-05-03 02:32:35.255 [DEBUG] clck_gen.py:113 IND CLOCK 28356
2026-05-03 02:32:35.727 [DEBUG] clck_gen.py:113 IND CLOCK 28458
2026-05-03 02:32:36.199 [DEBUG] clck_gen.py:113 IND CLOCK 28560
2026-05-03 02:32:36.670 [DEBUG] clck_gen.py:113 IND CLOCK 28662
2026-05-03 02:32:37.143 [DEBUG] clck_gen.py:113 IND CLOCK 28764
2026-05-03 02:32:37.615 [DEBUG] clck_gen.py:113 IND CLOCK 28866
2026-05-03 02:32:38.087 [DEBUG] clck_gen.py:113 IND CLOCK 28968
2026-05-03 02:32:38.559 [DEBUG] clck_gen.py:113 IND CLOCK 29070
2026-05-03 02:32:39.032 [DEBUG] clck_gen.py:113 IND CLOCK 29172
2026-05-03 02:32:39.504 [DEBUG] clck_gen.py:113 IND CLOCK 29274
2026-05-03 02:32:39.976 [DEBUG] clck_gen.py:113 IND CLOCK 29376
2026-05-03 02:32:40.447 [DEBUG] clck_gen.py:113 IND CLOCK 29478
2026-05-03 02:32:40.921 [DEBUG] clck_gen.py:113 IND CLOCK 29580
2026-05-03 02:32:41.393 [DEBUG] clck_gen.py:113 IND CLOCK 29682
2026-05-03 02:32:41.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:32:41.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:41.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:41.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:41.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:32:41.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:32:41.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:32:41.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:32:41.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:32:41.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:32:41.681 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:32:41.681 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:32:41.681 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:32:41.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:32:41.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:32:41.681 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=29746 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:32:41.681 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=29746 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:32:41.681 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=29746 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:32:41.681 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=29746 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:32:41.681 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=29746 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:32:41.681 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=29746 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:32:41.681 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=29746 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:32:46.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:32:46.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:32:46.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:32:46.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:32:46.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:32:46.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:32:46.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:32:46.698 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:32:46.698 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:32:46.698 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:32:46.698 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:32:46.703 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:32:46.703 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:32:46.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:32:46.703 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:32:46.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:32:46.704 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:32:46.704 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:32:46.704 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:32:46.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:32:46.707 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:32:46.707 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:32:46.707 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:32:46.707 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:32:46.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:32:46.708 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:32:46.708 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:32:46.708 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:32:46.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:32:46.710 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:32:46.710 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:32:46.710 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:32:46.710 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:32:46.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:32:46.711 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:32:46.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:32:46.711 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:32:46.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:32:46.714 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:32:46.714 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:32:46.714 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:46.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:46.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:32:46.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:46.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:46.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:46.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:46.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:46.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:46.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:46.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:46.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:46.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:46.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:32:46.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:32:46.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:32:46.716 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:32:51.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:32:51.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:32:51.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:32:51.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:32:51.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:32:51.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:32:51.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:32:51.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:32:51.727 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:32:51.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:32:51.727 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:32:51.728 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:32:51.729 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:32:51.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:32:51.729 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:32:51.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:32:51.729 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:32:51.730 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:32:51.730 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:32:51.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:32:51.731 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:32:51.731 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:32:51.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:32:51.731 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:32:51.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:32:51.731 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:32:51.732 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:32:51.732 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:32:51.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:32:51.733 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:32:51.733 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:32:51.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:32:51.734 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:32:51.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:32:51.734 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:32:51.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:32:51.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:32:51.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:32:51.736 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:32:51.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:32:51.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:32:51.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:32:51.736 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:32:51.737 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:32:51.737 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:32:51.737 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:51.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:51.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:32:51.742 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:32:52.220 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:32:52.264 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:32:52.266 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:32:52.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:32:52.267 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:32:52.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:52.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:52.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:32:52.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:52.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:52.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:32:52.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:32:52.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:52.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:32:52.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:32:52.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:32:52.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:32:52.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:32:52.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:32:52.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:52.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:52.691 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:32:52.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:32:52.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:32:52.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:32:52.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:32:53.164 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:32:53.634 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:32:53.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:32:53.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:32:53.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:32:53.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:32:53.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:53.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:32:53.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:53.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:53.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:53.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:53.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:32:53.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:53.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:53.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:32:53.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:32:53.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:53.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:32:53.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:32:53.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:32:53.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:32:53.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:32:53.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:32:53.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:53.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:54.105 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:32:54.578 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:32:54.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:32:54.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:32:54.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:32:54.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:32:55.051 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:32:55.523 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:32:55.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:32:55.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:32:55.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:32:55.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:32:55.997 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:32:56.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:56.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:32:56.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:56.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:56.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:56.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:56.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:32:56.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:56.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:56.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:32:56.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:32:56.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:56.174 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:32:56.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:32:56.174 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:32:56.174 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:32:56.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:32:56.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:32:56.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:56.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:56.468 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:32:56.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:32:56.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:32:56.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:32:56.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:32:56.940 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:32:57.412 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:32:57.883 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:32:58.357 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:32:58.829 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:32:59.301 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:32:59.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:59.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:32:59.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:59.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:59.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:59.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:59.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:32:59.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:32:59.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:32:59.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:32:59.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:32:59.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:59.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:32:59.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:32:59.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:32:59.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:32:59.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:32:59.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:32:59.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:59.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:32:59.772 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:33:00.243 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:33:00.716 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:33:01.189 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:33:01.661 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:33:02.131 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:33:02.602 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:33:03.076 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:33:03.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:03.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:33:03.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:33:03.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:33:03.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:33:03.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:33:03.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:33:03.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:33:03.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:33:03.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:33:03.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:33:03.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:33:03.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:33:03.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:33:03.175 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:33:03.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2472 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:33:03.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2472 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:33:03.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2472 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:33:03.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2472 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:33:03.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2472 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:33:03.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2472 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:33:08.178 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:33:08.178 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:33:08.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:33:08.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:33:08.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:33:08.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:33:08.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:33:08.187 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:33:08.187 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:33:08.187 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:33:08.187 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:33:08.191 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:33:08.191 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:33:08.192 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:33:08.192 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:33:08.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:33:08.192 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:33:08.192 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:33:08.192 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:33:08.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:33:08.196 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:33:08.196 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:33:08.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:33:08.196 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:33:08.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:33:08.196 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:33:08.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:33:08.196 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:33:08.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:33:08.199 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:33:08.199 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:33:08.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:33:08.199 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:33:08.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:33:08.199 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:33:08.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:33:08.200 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:33:08.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:33:08.203 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:33:08.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:33:08.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:33:08.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:33:08.203 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:33:08.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:33:08.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:33:08.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:33:08.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:33:08.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:33:08.203 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:33:08.204 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:33:08.204 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:33:08.204 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:33:08.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:33:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:33:08.209 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:33:08.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:33:08.737 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:33:08.739 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:33:08.740 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:33:08.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:33:08.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:33:08.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:33:08.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:33:08.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:33:08.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:33:08.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:33:08.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:33:08.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:08.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:33:08.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:33:08.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:33:08.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:33:08.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:33:08.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:33:08.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:08.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:09.159 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:33:09.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:33:09.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:33:09.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:33:09.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:33:09.630 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:33:10.101 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:33:10.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:33:10.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:33:10.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:33:10.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:33:10.575 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:33:11.047 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:33:11.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:33:11.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:33:11.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:33:11.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:33:11.520 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:33:11.991 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:33:12.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:33:12.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:33:12.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:33:12.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:33:12.461 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:33:12.935 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:33:13.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:33:13.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:33:13.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:33:13.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:33:13.408 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:33:13.880 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:33:14.353 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:33:14.826 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:33:15.299 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:33:15.772 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:33:16.245 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:33:16.717 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:33:17.191 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:33:17.663 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:33:18.136 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:33:18.607 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:33:19.080 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:33:19.553 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:33:20.025 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:33:20.496 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:33:20.969 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:33:21.442 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:33:21.915 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:33:22.385 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:33:22.854 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:33:23.326 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:33:23.798 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:33:24.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:24.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:33:24.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:33:24.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:33:24.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:33:24.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:33:24.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:33:24.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:33:24.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:33:24.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:33:24.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:33:24.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:24.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:33:24.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:33:24.121 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:33:24.121 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:33:24.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:33:24.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:33:24.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:24.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:24.269 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:33:24.742 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:33:25.215 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:33:25.687 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:33:26.158 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:33:26.628 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:33:27.099 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:33:27.572 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:33:28.045 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:33:28.518 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:33:28.991 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:33:29.464 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:33:29.936 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:33:30.407 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:33:30.878 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:33:31.349 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:33:31.822 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:33:32.294 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:33:32.766 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:33:33.237 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:33:33.708 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:33:34.181 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:33:34.654 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:33:35.126 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:33:35.600 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:33:36.072 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:33:36.545 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:33:37.018 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:33:37.490 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 02:33:37.962 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 02:33:38.433 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 02:33:38.904 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 02:33:39.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:39.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:33:39.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:33:39.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:33:39.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:33:39.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:33:39.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:33:39.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:33:39.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:33:39.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:33:39.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:33:39.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:39.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:33:39.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:33:39.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:33:39.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:33:39.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:33:39.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:33:39.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:39.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:39.375 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 02:33:39.846 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 02:33:40.319 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 02:33:40.791 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 02:33:41.263 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 02:33:41.737 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 02:33:42.209 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 02:33:42.681 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 02:33:43.152 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 02:33:43.625 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 02:33:44.098 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 02:33:44.570 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 02:33:45.041 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 02:33:45.515 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 02:33:45.987 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 02:33:46.459 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 02:33:46.930 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 02:33:47.401 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 02:33:47.874 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 02:33:48.347 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 02:33:48.819 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 02:33:49.290 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 02:33:49.760 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 02:33:50.231 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 02:33:50.705 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 02:33:51.177 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 02:33:51.649 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 02:33:52.120 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 02:33:52.594 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 02:33:53.066 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 02:33:53.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:53.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:33:53.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:33:53.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:33:53.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:33:53.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:33:53.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:33:53.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:33:53.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:33:53.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:33:53.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:33:53.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:53.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:33:53.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:33:53.531 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:33:53.531 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:33:53.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:33:53.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:33:53.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:53.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:33:53.538 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 02:33:54.009 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 02:33:54.482 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 02:33:54.955 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 02:33:55.426 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 02:33:55.898 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 02:33:56.371 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-03 02:33:56.843 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-03 02:33:57.316 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-03 02:33:57.789 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-03 02:33:58.261 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-03 02:33:58.733 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-03 02:33:59.204 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-03 02:33:59.678 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-03 02:34:00.150 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-03 02:34:00.622 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-03 02:34:01.093 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-03 02:34:01.567 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-03 02:34:02.039 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-03 02:34:02.511 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-03 02:34:02.982 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-03 02:34:03.455 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-03 02:34:03.928 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-03 02:34:04.400 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-03 02:34:04.873 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-03 02:34:05.346 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-03 02:34:05.818 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-03 02:34:06.289 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-03 02:34:06.762 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-03 02:34:07.235 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-03 02:34:07.706 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-03 02:34:08.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:08.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:08.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:08.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:08.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:34:08.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:34:08.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:34:08.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:34:08.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:34:08.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:34:08.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:34:08.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:34:08.120 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:34:08.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:34:08.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:34:13.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:34:13.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:34:13.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:34:13.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:34:13.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:34:13.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:34:13.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:34:13.133 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:34:13.133 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:34:13.133 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:34:13.133 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:34:13.137 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:34:13.138 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:34:13.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:34:13.138 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:34:13.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:34:13.138 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:34:13.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:34:13.139 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:34:13.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:34:13.143 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:34:13.143 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:34:13.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:34:13.143 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:34:13.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:34:13.143 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:34:13.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:34:13.144 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:34:13.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:34:13.147 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:34:13.147 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:34:13.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:34:13.148 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:34:13.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:34:13.148 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:34:13.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:34:13.148 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:34:13.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:34:13.152 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:34:13.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:13.153 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:34:13.153 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:34:13.153 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:34:13.154 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:34:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:13.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:34:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:13.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:13.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:13.158 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:34:13.636 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:34:13.679 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:34:13.681 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:34:13.683 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:34:13.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:13.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:13.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:13.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:13.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:13.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:13.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:13.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:13.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:13.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:13.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:13.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:34:13.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:34:13.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:13.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:13.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:13.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:14.106 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:34:14.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:34:14.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:34:14.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:34:14.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:34:14.579 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:34:15.052 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:34:15.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:34:15.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:34:15.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:34:15.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:34:15.525 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:34:15.998 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:34:16.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:34:16.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:34:16.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:34:16.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:34:16.470 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:34:16.944 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:34:17.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:34:17.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:34:17.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:34:17.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:34:17.416 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:34:17.889 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:34:18.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:34:18.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:34:18.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:34:18.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:34:18.360 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:34:18.830 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:34:19.301 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:34:19.772 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:34:20.245 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:34:20.718 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:34:21.190 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:34:21.661 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:34:22.135 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:34:22.607 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:34:23.080 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:34:23.551 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:34:24.021 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:34:24.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:24.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:24.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:24.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:24.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:24.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:24.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:24.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:24.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:24.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:24.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:24.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:24.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:24.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:24.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:34:24.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:34:24.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:24.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:24.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:24.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:24.492 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:34:24.963 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:34:25.436 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:34:25.909 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:34:26.381 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:34:26.855 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:34:27.327 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:34:27.799 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:34:28.273 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:34:28.745 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:34:29.217 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:34:29.689 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:34:30.159 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:34:30.633 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:34:31.105 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:34:31.578 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:34:32.049 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:34:32.519 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:34:32.993 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:34:33.465 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:34:33.938 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:34:34.411 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:34:34.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:34.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:34.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:34.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:34.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:34.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:34.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:34.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:34.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:34.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:34.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:34.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:34.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:34.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:34.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:34:34.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:34:34.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:34.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:34.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:34.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:34.883 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:34:35.355 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:34:35.828 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:34:36.301 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:34:36.773 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:34:37.244 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:34:37.717 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:34:38.189 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:34:38.661 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:34:39.132 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:34:39.606 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:34:40.078 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:34:40.550 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:34:41.021 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:34:41.492 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:34:41.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:41.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:41.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:41.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:41.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:41.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:41.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:41.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:41.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:41.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:41.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:41.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:41.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:41.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:41.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:34:41.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:34:41.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:41.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:41.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:41.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:41.963 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:34:42.436 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 02:34:42.908 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 02:34:43.381 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 02:34:43.851 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 02:34:44.325 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 02:34:44.797 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 02:34:45.269 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 02:34:45.740 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 02:34:46.214 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 02:34:46.686 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 02:34:47.158 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 02:34:47.629 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 02:34:48.103 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 02:34:48.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:48.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:48.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:48.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:48.575 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 02:34:48.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:34:48.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:34:48.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:34:48.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:34:48.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:34:48.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:34:48.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:34:48.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:34:48.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:34:48.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:34:48.581 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:34:53.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:34:53.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:34:53.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:34:53.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:34:53.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:34:53.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:34:53.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:34:53.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:34:53.596 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:34:53.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:34:53.597 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:34:53.602 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:34:53.602 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:34:53.603 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:34:53.603 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:34:53.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:34:53.604 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:34:53.604 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:34:53.604 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:34:53.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:34:53.607 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:34:53.607 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:34:53.607 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:34:53.607 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:34:53.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:34:53.608 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:34:53.608 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:34:53.608 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:34:53.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:34:53.611 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:34:53.611 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:34:53.611 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:34:53.611 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:34:53.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:34:53.611 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:34:53.611 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:34:53.612 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:34:53.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:34:53.615 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:34:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:34:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:34:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:34:53.615 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:34:53.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:34:53.616 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:34:53.616 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:34:53.616 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:53.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:34:53.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:34:53.621 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:34:54.099 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:34:54.143 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:34:54.145 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:34:54.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:54.147 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:34:54.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:54.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:54.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:54.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:54.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:54.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:54.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:54.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:54.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:54.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:54.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:34:54.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:34:54.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:54.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:54.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:54.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:54.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:54.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:54.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:54.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:54.569 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:34:54.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:54.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:54.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:54.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:54.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:54.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:54.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:54.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:54.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:54.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:54.584 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:34:54.584 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:34:54.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:54.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:54.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:54.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:54.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:34:54.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:34:54.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:34:54.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:34:55.041 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:34:55.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:55.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:55.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:55.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:55.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:55.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:55.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:55.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:55.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:55.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:55.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:55.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:55.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:55.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:55.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:34:55.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:34:55.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:55.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:55.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:55.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:55.513 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:34:55.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:34:55.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:34:55.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:34:55.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:34:55.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:55.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:55.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:55.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:55.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:55.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:55.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:55.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:55.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:55.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:34:55.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:55.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:55.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:55.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:55.936 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:34:55.936 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:34:55.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:34:55.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:34:55.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:55.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:55.984 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:34:56.456 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:34:56.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:34:56.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:34:56.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:34:56.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:34:56.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:34:56.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:34:56.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:34:56.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:34:56.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:34:56.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:34:56.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:34:56.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:34:56.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:34:56.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:34:56.791 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:34:56.791 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:34:56.791 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:34:56.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:34:56.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:35:01.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:35:01.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:35:01.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:35:01.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:35:01.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:35:01.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:35:01.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:35:01.807 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:35:01.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:01.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:35:01.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:35:01.809 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:35:01.810 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:35:01.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:35:01.810 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:01.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:35:01.810 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:35:01.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:35:01.810 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:35:01.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:01.811 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:35:01.811 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:35:01.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:35:01.812 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:01.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:35:01.812 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:35:01.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:35:01.812 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:35:01.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:01.813 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:35:01.813 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:35:01.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:35:01.813 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:01.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:35:01.813 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:35:01.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:35:01.813 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:35:01.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:01.815 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:35:01.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:35:01.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:35:01.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:35:01.815 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:35:01.816 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:35:01.816 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:35:01.816 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:01.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:01.821 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:35:02.298 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:35:02.337 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:35:02.338 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:35:02.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:02.340 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:35:02.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:02.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:02.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:02.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:02.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:02.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:02.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:02.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:02.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:02.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:02.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:35:02.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:35:02.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:02.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:02.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:02.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:02.770 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:35:02.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:02.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:02.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:02.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:03.242 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:35:03.715 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:35:03.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:03.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:03.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:03.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:04.188 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:35:04.660 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:35:04.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:04.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:04.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:04.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:05.131 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:35:05.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:05.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:05.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:05.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:05.604 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:35:05.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:05.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:05.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:05.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:05.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:05.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:05.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:05.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:05.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:05.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:05.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:35:05.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:35:05.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:05.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:05.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:05.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:05.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:05.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:05.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:05.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:06.077 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:35:06.549 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:35:06.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:06.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:06.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:06.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:07.020 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:35:07.491 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:35:07.964 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:35:08.436 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:35:08.909 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:35:09.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:09.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:09.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:09.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:09.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:09.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:09.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:09.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:09.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:09.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:09.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:09.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:09.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:09.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:09.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:35:09.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:35:09.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:09.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:09.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:09.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:09.382 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:35:09.854 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:35:10.327 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:35:10.797 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:35:11.268 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:35:11.742 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:35:12.214 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:35:12.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:12.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:12.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:12.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:12.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:12.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:12.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:12.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:12.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:12.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:12.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:12.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:12.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:12.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:12.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:35:12.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:35:12.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:12.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:12.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:12.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:12.686 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:35:13.157 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:35:13.628 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:35:14.101 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:35:14.574 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:35:15.046 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:35:15.517 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:35:15.988 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:35:16.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:16.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:16.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:16.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:16.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:16.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:16.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:16.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:16.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:35:16.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:35:16.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:35:16.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:35:16.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:35:16.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:35:16.323 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:35:21.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:35:21.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:35:21.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:35:21.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:35:21.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:35:21.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:35:21.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:35:21.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:35:21.337 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:21.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:35:21.338 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:35:21.340 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:35:21.340 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:35:21.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:35:21.340 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:21.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:35:21.341 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:35:21.341 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:35:21.341 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:35:21.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:21.343 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:35:21.343 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:35:21.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:35:21.343 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:21.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:35:21.343 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:35:21.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:35:21.343 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:35:21.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:21.345 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:35:21.345 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:35:21.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:35:21.345 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:21.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:35:21.345 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:35:21.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:35:21.345 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:35:21.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:35:21.348 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:35:21.348 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:35:21.348 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:21.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:21.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:21.353 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:35:21.831 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:35:21.868 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:35:21.869 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:35:21.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:21.871 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:35:21.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:21.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:21.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:21.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:21.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:21.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:21.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:21.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:21.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:21.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:21.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:35:21.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:35:21.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:21.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:21.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:21.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:22.302 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:35:22.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:22.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:22.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:22.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:22.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:22.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:22.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:22.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:22.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:22.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:22.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:22.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:22.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:22.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:22.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:22.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:22.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:22.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:22.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:35:22.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:35:22.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:22.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:22.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:22.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:22.774 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:35:22.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:22.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:22.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:22.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:22.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:22.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:22.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:22.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:22.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:22.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:22.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:22.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:22.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:22.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:22.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:35:22.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:35:23.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:23.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:23.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:23.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:23.246 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:35:23.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:23.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:23.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:23.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:23.720 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:35:24.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:24.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:24.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:24.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:24.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:24.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:24.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:24.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:24.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:24.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:24.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:24.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:24.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:24.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:24.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:35:24.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:35:24.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:24.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:24.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:24.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:24.192 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:35:24.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:24.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:24.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:24.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:24.664 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:35:25.135 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:35:25.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:25.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:25.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:25.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:25.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:25.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:25.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:25.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:25.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:35:25.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:35:25.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:35:25.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:35:25.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:35:25.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:35:25.232 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:35:25.232 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=839 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:35:25.232 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=839 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:35:25.232 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=839 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:35:25.232 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=839 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:35:25.232 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:35:30.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:35:30.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:35:30.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:35:30.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:35:30.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:35:30.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:35:30.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:35:30.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:35:30.250 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:30.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:35:30.250 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:35:30.252 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:35:30.252 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:35:30.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:35:30.252 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:30.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:35:30.253 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:35:30.253 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:35:30.253 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:35:30.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:30.255 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:35:30.255 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:35:30.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:35:30.255 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:30.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:35:30.255 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:35:30.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:35:30.256 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:35:30.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:30.258 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:35:30.258 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:35:30.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:35:30.258 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:30.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:35:30.258 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:35:30.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:35:30.258 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:35:30.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:35:30.262 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:35:30.262 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:35:30.262 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:35:30.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:30.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:30.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:30.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:30.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:30.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:30.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:30.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:30.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:30.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:30.267 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:35:30.744 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:35:30.792 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:35:30.794 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:35:30.796 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:35:30.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:30.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:30.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:30.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:30.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:30.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:30.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:30.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:30.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:30.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:30.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:30.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:35:30.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:35:30.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:30.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:30.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:30.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:31.216 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:35:31.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:31.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:31.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:31.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:31.690 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:35:32.162 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:35:32.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:32.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:32.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:32.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:32.635 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:35:33.108 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:35:33.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:33.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:33.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:33.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:33.581 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:35:33.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:33.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:33.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:33.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:33.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:33.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:33.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:33.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:33.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:33.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:33.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:33.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:33.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:33.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:33.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:35:33.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:35:33.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:33.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:33.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:33.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:34.053 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:35:34.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:34.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:34.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:34.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:34.524 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:35:34.995 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:35:35.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:35.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:35.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:35.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:35.468 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:35:35.941 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:35:36.413 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:35:36.884 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:35:37.355 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:35:37.829 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:35:38.301 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:35:38.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:38.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:38.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:38.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:38.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:38.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:38.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:38.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:38.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:38.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:38.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:38.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:38.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:38.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:38.397 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:35:38.397 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:35:38.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:38.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:38.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:38.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:38.773 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:35:39.244 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:35:39.715 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:35:40.185 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:35:40.656 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:35:41.130 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:35:41.602 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:35:42.074 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:35:42.545 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:35:43.018 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:35:43.491 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:35:43.963 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:35:44.434 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:35:44.907 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:35:45.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:45.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:45.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:45.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:45.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:45.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:45.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:45.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:45.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:45.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:45.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:45.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:45.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:45.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:45.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:35:45.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:35:45.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:45.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:45.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:45.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:45.377 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:35:45.850 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:35:46.322 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:35:46.793 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:35:47.267 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:35:47.739 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:35:48.211 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:35:48.682 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:35:49.155 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:35:49.628 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:35:50.100 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:35:50.571 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:35:51.044 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:35:51.516 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:35:51.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:51.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:51.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:51.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:51.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:51.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:51.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:51.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:51.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:35:51.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:35:51.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:35:51.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:35:51.855 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:35:51.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:35:51.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:35:51.855 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4665 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:35:51.855 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4665 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:35:51.855 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4665 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:35:51.855 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4665 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:35:51.855 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4665 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:35:51.855 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4665 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:35:51.855 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4665 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:35:56.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:35:56.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:35:56.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:35:56.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:35:56.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:35:56.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:35:56.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:35:56.861 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:35:56.861 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:56.861 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:35:56.861 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:35:56.862 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:35:56.862 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:35:56.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:35:56.862 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:56.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:35:56.863 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:35:56.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:35:56.863 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:35:56.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:56.863 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:35:56.863 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:35:56.863 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:35:56.863 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:56.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:35:56.864 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:35:56.864 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:35:56.864 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:35:56.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:56.865 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:35:56.865 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:35:56.865 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:35:56.865 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:35:56.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:35:56.865 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:35:56.865 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:35:56.865 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:35:56.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:35:56.867 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:35:56.867 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:35:56.867 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:56.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:56.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:35:56.872 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:35:57.349 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:35:57.396 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:35:57.398 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:35:57.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:57.400 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:35:57.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:57.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:57.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:57.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:57.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:57.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:57.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:57.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:57.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:57.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:57.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:35:57.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:35:57.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:57.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:57.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:57.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:57.819 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:35:57.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:57.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:57.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:57.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:58.292 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:35:58.764 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:35:58.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:58.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:58.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:58.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:35:59.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:59.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:59.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:59.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:59.235 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:35:59.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:59.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:59.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:59.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:35:59.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:35:59.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:35:59.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:35:59.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:59.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:59.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:59.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:35:59.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:35:59.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:35:59.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:35:59.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:59.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:35:59.706 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:35:59.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:35:59.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:35:59.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:35:59.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:00.179 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:36:00.652 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:36:00.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:00.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:00.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:00.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:01.124 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:36:01.595 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:36:01.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:01.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:01.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:01.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:02.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:36:02.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:02.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:36:02.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:36:02.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:36:02.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:36:02.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:36:02.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:36:02.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:36:02.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:36:02.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:02.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:36:02.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:36:02.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:36:02.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:36:02.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:36:02.068 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:36:02.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:36:02.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:36:02.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:36:02.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:36:02.540 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:36:03.012 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:36:03.483 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:36:03.954 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:36:04.425 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:36:04.898 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:36:05.371 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:36:05.843 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:36:06.314 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:36:06.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:36:06.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:06.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:36:06.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:36:06.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:36:06.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:36:06.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:36:06.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:36:06.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:36:06.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:36:06.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:06.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:36:06.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:36:06.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:36:06.501 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:36:06.501 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:36:06.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:36:06.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:36:06.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:36:06.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:36:06.784 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:36:07.255 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:36:07.729 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:36:08.201 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:36:08.673 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:36:09.144 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:36:09.617 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:36:10.090 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:36:10.562 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:36:10.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:36:10.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:10.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:36:10.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:36:10.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:10.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:10.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:10.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:10.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:10.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:10.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:10.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:10.897 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:36:10.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:10.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:15.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:15.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:15.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:15.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:15.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:15.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:15.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:15.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:36:15.906 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:15.907 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:36:15.907 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:36:15.907 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:36:15.908 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:36:15.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:36:15.908 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:15.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:15.908 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:36:15.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:36:15.908 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:36:15.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:15.909 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:36:15.909 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:36:15.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:36:15.909 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:15.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:15.909 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:36:15.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:36:15.909 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:36:15.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:15.910 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:36:15.910 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:36:15.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:36:15.910 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:15.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:15.910 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:36:15.910 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:36:15.910 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:36:15.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:15.912 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:36:15.912 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:36:15.912 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:36:15.913 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:15.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:15.917 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:36:16.395 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:36:16.439 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:36:16.441 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:36:16.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:16.442 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:36:16.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:16.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:16.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:16.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:16.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:16.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:16.863 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:36:16.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:16.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:16.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:16.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:17.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:17.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:17.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:17.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:17.336 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:36:17.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:17.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:17.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:17.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:17.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:17.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:17.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:17.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:17.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:17.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:17.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:17.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:17.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:17.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:17.761 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:36:17.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:17.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:17.761 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=400 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:17.762 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=400 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:17.762 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=400 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:17.762 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=400 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:17.762 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=400 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:17.762 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=400 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:17.762 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=400 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:22.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:22.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:22.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:22.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:22.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:22.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:22.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:22.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:36:22.765 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:22.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:36:22.766 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:36:22.766 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:36:22.767 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:36:22.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:36:22.767 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:22.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:22.767 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:36:22.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:36:22.767 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:36:22.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:22.768 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:36:22.768 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:36:22.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:36:22.768 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:22.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:22.768 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:36:22.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:36:22.768 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:36:22.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:22.769 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:36:22.769 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:36:22.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:36:22.769 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:22.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:22.769 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:36:22.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:36:22.769 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:36:22.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:22.771 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:36:22.771 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:36:22.772 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:36:22.772 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:22.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:22.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:36:23.254 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:36:23.294 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:36:23.295 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:36:23.296 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:36:23.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.724 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:36:23.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:23.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:23.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:23.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:23.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:23.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.196 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:36:24.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:24.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:24.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:24.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:24.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:24.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:24.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:24.642 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:24.642 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:24.642 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:36:24.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:24.642 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:29.649 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:29.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:29.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:29.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:29.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:29.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:29.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:29.662 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:36:29.662 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:29.662 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:36:29.662 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:36:29.665 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:36:29.665 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:36:29.665 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:36:29.665 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:29.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:29.665 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:36:29.665 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:36:29.665 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:36:29.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:29.667 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:36:29.667 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:36:29.667 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:36:29.667 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:29.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:29.667 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:36:29.667 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:36:29.667 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:36:29.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:29.668 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:36:29.668 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:36:29.668 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:36:29.668 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:29.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:29.669 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:36:29.669 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:36:29.669 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:36:29.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:29.670 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:36:29.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:36:29.671 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:36:29.671 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:36:29.671 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:29.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:29.676 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:36:30.152 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:36:30.195 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:36:30.197 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:36:30.199 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:36:30.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:30.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:30.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:30.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:30.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:30.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:30.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:30.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:30.622 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:36:30.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:30.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:30.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:30.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:30.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:30.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:30.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:30.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:30.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:31.095 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:36:31.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:31.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:31.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:31.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:31.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:31.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:31.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:31.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:31.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:31.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:31.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:31.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:31.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:31.567 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:36:31.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:31.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:31.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:31.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:31.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:31.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:31.569 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:36:31.569 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:31.569 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:31.569 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:36.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:36.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:36.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:36.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:36.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:36.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:36.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:36.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:36:36.585 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:36.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:36:36.585 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:36:36.587 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:36:36.587 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:36:36.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:36:36.587 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:36.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:36.588 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:36:36.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:36:36.588 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:36:36.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:36.589 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:36:36.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:36:36.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:36:36.590 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:36.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:36.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:36:36.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:36:36.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:36:36.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:36.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:36:36.591 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:36:36.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:36:36.591 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:36.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:36.591 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:36:36.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:36:36.591 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:36:36.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:36.593 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:36:36.593 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:36:36.593 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:36:36.594 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:36.598 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:36:37.076 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:36:37.120 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:36:37.122 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:36:37.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:37.122 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:36:37.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:37.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:37.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:37.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:37.546 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:36:37.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:37.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:37.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:37.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:37.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:37.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:37.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:37.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:38.018 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:36:38.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:38.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:38.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:38.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:38.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:38.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:38.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:38.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:38.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:38.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:38.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:38.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:38.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:38.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:38.465 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:36:38.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:38.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:43.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:43.471 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:43.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:43.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:43.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:43.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:43.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:43.480 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:36:43.480 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:43.480 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:36:43.480 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:36:43.483 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:36:43.483 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:36:43.483 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:36:43.483 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:43.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:43.484 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:36:43.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:36:43.484 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:36:43.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:43.485 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:36:43.485 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:36:43.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:36:43.485 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:43.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:43.486 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:36:43.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:36:43.486 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:36:43.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:43.487 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:36:43.488 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:36:43.488 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:36:43.488 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:43.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:43.488 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:36:43.488 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:36:43.488 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:36:43.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:43.490 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:36:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:36:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:36:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:36:43.490 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:36:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:36:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:36:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:36:43.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:36:43.491 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:36:43.491 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:43.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:43.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:43.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:43.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:43.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:43.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:43.495 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:36:43.973 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:36:44.018 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:36:44.020 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:36:44.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:44.022 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:36:44.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:44.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:44.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:44.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:44.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:44.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:44.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:44.442 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:36:44.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:44.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:44.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:44.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:44.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:44.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:44.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:44.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:44.916 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:36:45.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:45.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:45.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:45.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:45.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:45.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:45.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:45.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:45.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:45.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:45.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:45.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:45.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:45.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:45.345 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:36:45.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:45.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:45.345 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=401 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:45.346 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=401 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:45.346 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=401 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:45.346 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=401 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:45.346 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=401 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:45.346 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=401 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:45.346 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=401 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:50.352 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:50.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:50.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:50.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:50.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:50.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:50.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:50.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:36:50.363 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:50.364 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:36:50.364 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:36:50.369 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:36:50.369 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:36:50.369 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:36:50.370 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:50.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:50.371 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:36:50.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:36:50.371 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:36:50.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:50.373 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:36:50.374 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:36:50.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:36:50.374 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:50.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:50.375 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:36:50.375 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:36:50.375 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:36:50.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:50.378 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:36:50.378 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:36:50.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:36:50.378 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:50.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:50.379 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:36:50.379 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:36:50.379 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:36:50.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:50.383 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:50.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:50.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:50.385 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:36:50.385 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:36:50.385 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:36:50.385 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:36:50.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:50.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:50.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:50.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:36:50.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:50.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:50.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:50.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:50.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:50.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:50.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:50.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:50.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:50.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:50.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:50.390 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:36:50.867 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:36:50.923 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:36:50.925 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:36:50.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:50.928 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:36:50.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:50.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:50.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:50.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:50.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.333 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:36:51.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:51.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:51.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:51.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:51.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.804 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:36:51.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:51.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:52.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:52.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:52.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:52.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:52.275 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:36:52.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:52.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:52.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:52.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:52.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:52.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:52.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:52.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:52.277 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:36:52.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:52.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:57.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:57.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:57.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:57.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:57.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:57.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:57.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:57.296 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:36:57.296 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:57.297 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:36:57.297 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:36:57.299 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:36:57.299 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:36:57.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:36:57.299 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:57.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:57.299 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:36:57.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:36:57.299 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:36:57.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:57.301 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:36:57.301 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:36:57.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:36:57.301 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:57.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:57.302 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:36:57.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:36:57.302 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:36:57.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:57.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:36:57.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:36:57.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:36:57.303 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:36:57.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:57.303 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:36:57.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:36:57.303 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:36:57.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:57.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:36:57.306 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:36:57.306 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:36:57.306 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:36:57.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:57.310 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:36:57.783 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:36:57.832 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:36:57.835 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:36:57.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:57.837 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:36:57.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:36:57.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:57.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:57.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.249 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:36:58.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:58.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:58.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:58.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:58.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.721 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:36:58.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:58.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:59.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:59.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:59.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:36:59.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:36:59.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:36:59.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:36:59.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:36:59.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:36:59.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:36:59.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:36:59.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:36:59.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:36:59.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:36:59.180 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:36:59.181 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:36:59.181 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:04.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:04.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:04.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:04.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:04.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:04.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:04.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:04.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:04.213 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:04.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:04.214 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:37:04.224 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:37:04.225 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:37:04.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:04.225 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:04.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:04.226 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:37:04.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:04.227 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:37:04.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:04.231 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:37:04.232 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:37:04.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:04.232 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:04.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:04.233 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:37:04.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:04.233 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:37:04.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:04.237 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:37:04.237 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:37:04.238 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:04.238 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:04.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:04.239 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:37:04.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:04.239 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:37:04.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:04.243 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:37:04.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:37:04.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:37:04.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:37:04.243 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:37:04.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:37:04.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:37:04.244 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:37:04.244 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:37:04.244 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:04.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:04.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:37:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:04.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:04.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:04.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:04.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:04.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:04.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:04.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:04.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:04.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:04.249 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:37:04.728 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:37:04.777 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:37:04.778 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:37:04.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.780 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:37:04.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:04.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:04.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:04.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:04.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:04.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:04.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:04.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:04.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:04.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:04.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:04.850 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:37:09.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:09.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:09.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:09.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:09.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:09.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:09.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:09.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:09.872 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:09.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:09.873 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:37:09.875 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:37:09.875 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:37:09.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:09.875 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:09.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:09.875 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:37:09.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:09.876 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:37:09.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:09.877 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:37:09.877 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:37:09.877 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:09.877 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:09.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:09.877 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:37:09.877 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:09.877 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:37:09.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:09.879 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:37:09.879 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:37:09.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:09.879 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:09.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:09.879 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:37:09.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:09.879 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:37:09.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:09.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:37:09.882 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:37:09.882 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:37:09.882 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:09.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:09.886 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:37:10.364 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:37:10.408 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:37:10.410 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:37:10.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.413 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:37:10.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:10.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:10.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:10.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:10.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:10.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:10.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:10.521 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:10.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:10.521 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:37:10.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:10.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:15.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:15.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:15.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:15.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:15.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:15.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:15.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:15.535 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:15.535 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:15.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:15.536 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:37:15.539 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:37:15.539 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:37:15.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:15.540 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:15.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:15.541 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:37:15.541 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:15.541 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:37:15.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:15.543 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:37:15.543 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:37:15.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:15.543 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:15.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:15.543 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:37:15.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:15.543 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:37:15.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:15.546 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:37:15.546 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:37:15.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:15.546 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:15.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:15.546 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:37:15.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:15.546 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:37:15.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:37:15.550 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:37:15.550 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:37:15.550 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:15.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:15.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:15.555 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:37:16.033 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:37:16.078 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:37:16.081 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:37:16.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.083 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:37:16.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:16.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:16.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:16.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:16.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:16.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:16.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:16.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:16.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:16.177 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:37:16.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:16.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:16.177 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=135 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:16.177 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:16.177 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:16.177 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:16.177 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:16.177 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:16.177 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:21.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:21.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:21.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:21.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:21.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:21.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:21.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:21.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:21.192 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:21.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:21.193 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:37:21.198 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:37:21.198 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:37:21.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:21.199 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:21.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:21.199 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:37:21.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:21.199 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:37:21.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:21.204 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:37:21.204 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:37:21.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:21.205 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:21.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:21.205 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:37:21.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:21.205 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:37:21.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:21.210 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:37:21.210 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:37:21.210 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:21.210 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:21.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:21.210 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:37:21.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:21.211 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:37:21.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:21.216 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:37:21.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:37:21.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:37:21.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:37:21.216 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:37:21.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:37:21.217 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:37:21.217 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:37:21.217 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:21.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:21.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:21.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:37:21.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:21.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:21.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:21.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:21.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:21.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:21.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:21.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:21.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:21.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:21.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:21.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:21.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:21.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:21.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:21.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:21.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:21.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:21.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:21.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:21.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:21.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:21.222 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:37:21.699 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:37:21.743 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:37:21.745 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:37:21.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.747 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:37:21.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:21.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:21.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:21.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:21.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:21.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:21.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:21.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:21.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:21.814 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:37:21.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:21.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:26.816 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:26.816 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:26.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:26.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:26.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:26.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:26.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:26.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:26.825 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:26.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:26.825 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:37:26.828 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:37:26.829 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:37:26.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:26.829 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:26.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:26.829 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:37:26.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:26.829 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:37:26.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:26.832 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:37:26.833 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:37:26.833 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:26.833 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:26.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:26.833 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:37:26.833 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:26.833 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:37:26.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:26.837 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:37:26.837 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:37:26.837 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:26.837 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:26.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:26.837 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:37:26.837 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:26.837 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:37:26.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:26.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:37:26.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:37:26.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:37:26.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:37:26.843 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:37:26.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:37:26.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:37:26.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:26.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:37:26.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:37:26.844 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:37:26.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:26.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:26.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:26.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:26.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:26.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:26.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:26.844 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:37:26.844 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:37:26.844 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:37:26.844 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:37:26.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:26.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:26.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:26.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:37:26.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:26.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:26.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:26.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:26.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:26.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:26.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:26.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:26.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:26.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:26.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:26.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:26.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:26.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:26.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:26.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:26.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:26.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:26.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:26.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:26.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:26.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:26.849 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:37:27.327 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:37:27.373 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:37:27.374 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:37:27.376 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:37:27.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:27.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:27.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:27.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:27.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:27.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:27.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:27.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:27.438 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:27.438 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:27.439 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:37:27.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:27.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:27.439 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:27.439 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:27.439 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:27.439 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:27.439 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:27.439 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:27.439 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:32.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:32.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:32.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:32.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:32.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:32.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:32.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:32.451 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:32.451 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:32.451 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:32.451 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:37:32.454 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:37:32.454 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:37:32.455 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:32.455 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:32.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:32.455 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:37:32.455 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:32.455 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:37:32.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:32.457 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:37:32.457 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:37:32.458 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:32.458 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:32.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:32.458 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:37:32.458 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:32.458 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:37:32.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:32.460 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:37:32.460 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:37:32.460 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:32.460 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:32.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:32.460 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:37:32.460 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:32.460 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:37:32.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:32.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:37:32.464 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:37:32.464 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:37:32.464 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:32.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:32.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:32.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:32.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:32.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:32.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:32.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:32.468 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:37:32.947 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:37:32.988 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:37:32.990 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:37:32.991 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:37:32.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:33.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:33.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:33.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:33.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:33.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:33.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:33.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:33.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:33.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:33.103 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:37:33.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:33.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:38.110 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:38.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:38.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:38.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:38.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:38.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:38.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:38.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:38.122 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:38.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:38.123 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:37:38.127 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:37:38.127 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:37:38.128 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:38.128 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:38.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:38.129 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:37:38.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:38.129 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:37:38.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:38.132 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:37:38.133 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:37:38.133 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:38.133 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:38.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:38.134 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:37:38.134 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:38.134 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:37:38.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:38.137 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:37:38.137 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:37:38.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:38.137 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:38.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:38.138 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:37:38.138 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:38.138 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:37:38.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:38.143 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:37:38.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:37:38.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:37:38.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:37:38.143 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:37:38.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:37:38.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:37:38.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:38.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:37:38.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:37:38.144 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:37:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:38.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:38.144 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:37:38.144 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:37:38.144 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:37:38.144 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:37:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:38.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:38.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:37:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:38.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:38.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:38.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:38.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:38.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:38.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:38.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:38.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:38.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:38.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:38.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:38.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:38.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:38.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:38.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:38.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:38.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:38.149 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:37:38.626 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:37:38.676 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:37:38.677 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:37:38.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.678 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:37:38.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:38.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:38.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:38.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:38.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:38.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:38.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:38.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:38.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:38.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:38.762 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:37:38.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:38.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:43.767 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:43.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:43.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:43.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:43.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:43.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:43.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:43.776 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:43.776 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:43.776 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:43.776 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:37:43.779 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:37:43.779 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:37:43.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:43.780 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:43.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:43.781 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:37:43.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:43.781 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:37:43.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:43.782 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:37:43.783 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:37:43.783 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:43.783 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:43.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:43.783 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:37:43.783 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:43.783 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:37:43.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:43.785 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:37:43.785 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:37:43.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:43.785 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:43.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:43.785 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:37:43.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:43.785 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:37:43.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:43.788 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:37:43.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:37:43.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:37:43.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:37:43.788 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:37:43.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:37:43.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:37:43.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:37:43.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:43.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:43.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:37:43.788 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:37:43.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:43.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:37:43.789 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:37:43.789 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:37:43.789 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:43.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:43.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:43.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:43.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:43.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:43.793 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:37:44.271 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:37:44.312 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:37:44.314 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:37:44.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:44.316 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:37:44.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:37:44.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:37:44.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:37:44.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:37:44.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:37:44.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:37:44.321 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:37:44.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:37:44.744 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:37:44.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:44.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:44.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:44.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:45.215 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:37:45.688 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:37:45.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:45.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:45.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:45.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:46.161 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:37:46.632 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:37:46.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:46.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:46.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:46.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:47.104 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:37:47.577 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:37:47.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:37:47.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:37:47.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:47.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:47.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:47.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:47.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:47.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:47.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:47.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:47.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:47.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:47.787 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:37:52.793 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:52.793 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:52.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:52.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:52.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:52.793 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:52.802 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:52.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:52.804 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:52.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:52.805 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:37:52.809 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:37:52.810 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:37:52.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:52.810 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:52.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:52.811 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:37:52.811 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:52.811 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:37:52.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:52.813 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:37:52.813 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:37:52.813 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:52.814 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:52.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:52.814 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:37:52.814 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:52.814 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:37:52.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:52.816 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:37:52.816 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:37:52.816 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:52.816 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:52.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:52.817 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:37:52.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:52.817 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:37:52.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:52.820 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:37:52.820 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:37:52.820 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:37:52.820 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:52.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:52.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:52.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:52.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:52.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:52.825 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:37:53.303 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:37:53.343 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:37:53.344 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:37:53.345 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:37:53.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:53.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:37:53.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:37:53.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:37:53.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:37:53.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:37:53.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:37:53.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:37:53.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:37:53.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:37:53.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:37:53.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:37:53.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:37:53.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:37:53.775 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:37:53.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:53.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:53.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:53.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:53.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:37:53.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:37:53.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:37:53.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:37:53.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:37:53.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:37:53.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:37:53.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:37:53.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:37:53.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:53.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:37:53.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:37:53.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:53.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:53.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:53.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:53.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:53.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:53.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:53.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:53.928 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:37:53.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:53.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:53.928 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=239 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:53.928 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=239 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:53.928 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:53.928 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:53.928 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:53.928 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:53.928 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:37:58.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:37:58.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:37:58.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:58.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:58.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:58.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:58.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:37:58.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:58.940 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:58.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:37:58.940 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:37:58.945 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:37:58.945 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:37:58.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:58.946 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:58.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:37:58.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:37:58.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:37:58.947 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:37:58.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:58.949 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:37:58.949 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:37:58.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:58.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:58.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:37:58.950 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:37:58.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:37:58.950 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:37:58.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:58.952 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:37:58.952 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:37:58.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:58.952 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:37:58.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:37:58.952 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:37:58.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:37:58.952 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:37:58.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:37:58.956 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:37:58.956 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:37:58.956 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:37:58.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:37:58.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:37:58.961 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:37:59.438 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:37:59.478 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:37:59.479 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:37:59.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:59.481 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:37:59.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:37:59.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:37:59.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:37:59.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:37:59.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:37:59.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:37:59.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:37:59.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:37:59.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:37:59.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:37:59.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:37:59.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:37:59.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:37:59.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:37:59.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:37:59.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:37:59.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:37:59.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:37:59.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:37:59.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:37:59.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:37:59.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:37:59.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:37:59.909 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:37:59.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:37:59.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:37:59.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:37:59.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:38:00.381 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:38:00.852 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:38:00.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:38:00.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:38:00.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:38:00.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:38:01.323 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:38:01.796 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:38:01.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:38:01.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:38:01.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:38:01.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:38:02.269 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:38:02.741 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:38:02.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:38:02.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:38:02.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:38:02.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:38:03.212 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:38:03.682 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:38:03.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:38:03.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:38:03.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:38:03.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:38:04.154 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:38:04.627 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:38:05.099 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:38:05.572 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:38:06.043 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:38:06.516 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:38:06.989 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:38:07.461 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:38:07.932 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:38:08.402 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:38:08.876 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:38:09.348 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:38:09.820 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:38:10.291 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:38:10.765 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:38:11.237 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:38:11.709 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:38:12.183 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:38:12.656 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:38:13.128 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:38:13.601 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:38:14.074 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:38:14.546 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:38:14.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:38:14.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:38:14.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:38:14.842 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=3432 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:14.842 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=3432 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:14.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:38:14.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:38:14.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:38:14.861 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:38:14.861 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:38:14.861 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:38:14.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:38:14.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:38:14.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:38:14.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:38:14.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:38:14.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:38:14.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:38:14.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:38:14.878 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:38:14.878 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:38:14.879 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:38:14.879 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:38:14.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:38:14.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:38:14.879 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3440 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:14.879 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3440 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:14.879 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3440 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:14.879 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3440 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:14.879 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3440 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:14.879 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3440 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:14.879 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3440 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:19.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:38:19.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:38:19.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:38:19.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:38:19.882 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:38:19.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:38:19.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:38:19.888 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:38:19.888 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:19.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:38:19.889 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:38:19.891 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:38:19.892 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:38:19.892 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:38:19.892 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:19.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:38:19.893 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:38:19.893 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:38:19.893 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:38:19.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:38:19.894 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:38:19.894 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:38:19.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:38:19.894 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:19.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:38:19.895 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:38:19.895 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:38:19.895 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:38:19.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:38:19.897 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:38:19.897 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:38:19.897 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:38:19.897 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:19.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:38:19.897 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:38:19.897 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:38:19.897 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:38:19.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:38:19.901 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:38:19.901 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:38:19.901 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:19.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:19.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:19.906 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:38:20.383 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:38:20.427 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:38:20.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:38:20.430 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:38:20.432 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:38:20.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:38:20.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:38:20.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:38:20.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:38:20.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:38:20.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:38:20.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:38:20.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:38:20.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:38:20.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:38:20.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:38:20.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:38:20.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:38:20.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:38:20.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:38:20.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:38:20.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:38:20.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:38:20.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:38:20.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:38:20.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:38:20.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:38:20.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:38:20.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:38:20.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:38:20.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:38:20.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:38:20.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:38:20.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:38:20.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:38:20.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:38:20.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:38:20.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:38:20.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:38:20.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:38:20.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:38:20.818 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:38:20.818 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:38:20.819 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=198 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:20.819 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=198 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:20.819 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=198 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:20.819 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=198 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:20.819 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=198 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:20.819 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=198 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:20.819 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=198 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:25.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:38:25.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:38:25.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:38:25.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:38:25.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:38:25.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:38:25.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:38:25.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:38:25.833 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:25.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:38:25.833 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:38:25.835 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:38:25.835 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:38:25.836 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:38:25.836 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:25.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:38:25.836 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:38:25.836 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:38:25.836 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:38:25.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:38:25.838 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:38:25.838 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:38:25.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:38:25.838 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:25.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:38:25.838 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:38:25.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:38:25.838 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:38:25.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:38:25.840 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:38:25.840 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:38:25.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:38:25.840 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:25.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:38:25.840 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:38:25.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:38:25.840 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:38:25.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:38:25.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:38:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:38:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:38:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:38:25.843 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:38:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:38:25.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:38:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:25.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:38:25.844 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:38:25.844 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:38:25.844 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:25.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:25.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:25.848 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:38:26.325 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:38:26.362 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:38:26.362 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:38:26.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:38:26.363 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:38:26.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:38:26.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:38:26.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:38:26.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:38:26.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:38:26.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:38:26.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:38:26.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:38:26.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:38:26.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:38:26.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:38:26.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:38:26.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:38:26.798 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:38:26.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:38:26.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:38:26.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:38:26.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:38:27.271 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:38:27.744 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:38:27.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:38:27.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:38:27.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:38:27.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:38:28.216 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:38:28.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:38:28.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:38:28.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:38:28.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:38:28.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:38:28.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:38:28.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:38:28.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:38:28.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:38:28.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:38:28.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:38:28.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:38:28.498 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=573 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:38:28.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:38:28.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:38:28.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:38:28.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:38:28.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:38:28.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:38:28.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:38:28.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:38:28.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:38:28.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:38:28.509 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:38:33.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:38:33.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:38:33.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:38:33.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:38:33.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:38:33.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:38:33.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:38:33.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:38:33.528 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:33.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:38:33.528 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:38:33.531 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:38:33.531 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:38:33.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:38:33.531 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:33.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:38:33.532 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:38:33.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:38:33.532 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:38:33.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:38:33.533 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:38:33.534 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:38:33.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:38:33.534 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:33.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:38:33.535 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:38:33.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:38:33.535 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:38:33.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:38:33.536 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:38:33.536 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:38:33.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:38:33.536 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:33.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:38:33.536 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:38:33.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:38:33.536 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:38:33.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:33.541 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:38:33.541 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:38:33.541 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:38:33.541 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:38:33.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:33.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:33.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:33.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:38:33.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:33.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:33.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:33.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:33.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:33.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:33.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:33.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:33.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:38:33.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:38:33.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:38:33.543 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:38:38.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:38:38.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:38:38.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:38:38.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:38:38.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:38:38.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:38:38.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:38:38.548 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:38:38.549 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:38.549 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:38:38.549 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:38:38.549 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:38:38.549 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:38:38.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:38:38.549 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:38.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:38:38.550 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:38:38.550 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:38:38.550 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:38:38.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:38:38.551 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:38:38.551 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:38:38.551 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:38:38.551 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:38.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:38:38.551 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:38:38.551 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:38:38.551 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:38:38.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:38:38.552 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:38:38.552 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:38:38.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:38:38.552 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:38:38.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:38:38.552 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:38:38.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:38:38.552 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:38:38.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:38:38.554 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:38:38.554 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:38:38.554 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:38.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:38:38.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:38:38.555 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:38:38.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:38:43.237 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.37.20:5700'
2026-05-03 02:38:43.237 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.37.20:5802)
2026-05-03 02:38:43.237 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.37.20:5801)
2026-05-03 02:38:43.237 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.37.22:6700'
2026-05-03 02:38:43.237 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.37.22:6802)
2026-05-03 02:38:43.237 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.37.22:6801)
2026-05-03 02:38:43.237 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.37.20:5700/1'
2026-05-03 02:38:43.237 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.37.20:5804)
2026-05-03 02:38:43.237 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.37.20:5803)
2026-05-03 02:38:43.237 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.37.20:5700/2'
2026-05-03 02:38:43.237 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.37.20:5806)
2026-05-03 02:38:43.237 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.37.20:5805)
2026-05-03 02:38:43.237 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.37.20:5700/3'
2026-05-03 02:38:43.237 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.37.20:5808)
2026-05-03 02:38:43.237 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.37.20:5807)
2026-05-03 02:38:43.237 [INFO] fake_trx.py:429 Init complete
2026-05-03 02:38:43.237 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-05-03 02:38:43.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:38:43.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:38:43.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:38:43.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:38:43.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:38:43.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:39:00.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:39:00.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:39:00.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:39:00.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:39:00.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:39:00.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:39:05.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:39:05.957 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:39:05.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:39:05.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:39:05.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:39:05.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:39:10.994 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:39:10.994 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:39:10.995 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:39:10.995 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:39:10.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:39:10.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:39:16.031 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:39:16.031 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:39:16.031 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:39:16.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:39:16.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:39:16.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:39:21.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:39:21.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:39:21.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:39:21.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:39:21.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:39:21.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:39:26.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:39:26.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:39:26.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:39:26.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:39:26.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:39:26.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:39:31.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:39:31.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:39:31.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:39:31.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:39:31.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:39:31.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:39:36.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:39:36.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:39:36.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:39:36.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:39:36.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:39:36.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:39:41.203 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:39:41.203 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:39:41.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:39:41.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:39:41.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:39:41.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:39:46.244 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:39:46.244 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:39:46.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:39:46.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:39:46.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:39:46.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:39:46.268 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:39:46.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:39:46.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:39:46.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:39:46.268 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:39:46.268 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:39:46.268 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:39:46.268 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:39:46.268 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:39:46.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:39:46.269 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:39:46.269 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:39:46.269 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 0 -> 1
2026-05-03 02:39:46.269 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:39:46.269 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:39:46.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:39:46.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:39:46.269 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 0 -> 1
2026-05-03 02:39:46.269 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:39:46.269 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:39:46.269 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 0 -> 1
2026-05-03 02:39:46.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:39:46.269 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 0 -> 1
2026-05-03 02:39:46.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:39:51.286 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:39:51.286 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:39:51.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:39:51.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:39:51.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:39:51.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:39:56.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:39:56.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:39:56.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:39:56.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:39:56.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:39:56.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:39:56.328 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:39:56.328 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:39:56.328 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:39:56.328 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:40:01.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:40:01.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:40:01.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:01.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:01.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:01.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:06.393 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:40:06.394 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:40:06.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:06.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:06.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:06.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:11.421 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:40:11.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:40:11.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:11.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:11.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:11.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:16.459 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:40:16.459 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:40:16.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:16.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:16.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:16.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:22.610 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.37.20:5700'
2026-05-03 02:40:22.610 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.37.20:5802)
2026-05-03 02:40:22.610 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.37.20:5801)
2026-05-03 02:40:22.610 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.37.22:6700'
2026-05-03 02:40:22.610 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.37.22:6802)
2026-05-03 02:40:22.610 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.37.22:6801)
2026-05-03 02:40:22.610 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.37.20:5700/1'
2026-05-03 02:40:22.610 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.37.20:5804)
2026-05-03 02:40:22.610 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.37.20:5803)
2026-05-03 02:40:22.610 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.37.20:5700/2'
2026-05-03 02:40:22.610 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.37.20:5806)
2026-05-03 02:40:22.610 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.37.20:5805)
2026-05-03 02:40:22.610 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.37.20:5700/3'
2026-05-03 02:40:22.610 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.37.20:5808)
2026-05-03 02:40:22.610 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.37.20:5807)
2026-05-03 02:40:22.610 [INFO] fake_trx.py:429 Init complete
2026-05-03 02:40:22.610 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-05-03 02:40:23.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:40:23.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:40:23.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:23.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:23.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:23.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:27.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:27.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:40:27.104 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:27.105 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:40:27.105 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 0 -> 1
2026-05-03 02:40:27.111 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:40:27.112 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:40:27.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:40:27.113 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:27.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:27.114 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:40:27.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:40:27.114 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 0 -> 1
2026-05-03 02:40:27.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:27.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:40:27.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:40:27.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:40:27.119 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:27.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:27.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:40:27.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:40:27.121 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 0 -> 1
2026-05-03 02:40:27.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:27.125 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:40:27.125 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:40:27.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:40:27.126 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:27.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:27.126 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:40:27.126 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:40:27.126 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 0 -> 1
2026-05-03 02:40:27.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:27.130 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:40:27.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:40:27.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:40:27.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:40:27.130 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:40:27.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:40:27.130 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:40:27.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:27.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:40:27.131 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:40:27.131 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:40:27.131 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:40:27.131 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:40:27.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:27.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:40:27.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:40:27.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:27.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:27.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:27.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:27.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:27.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:27.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:27.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:27.136 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:40:27.614 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:40:27.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:27.680 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:40:27.683 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:40:27.685 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:40:27.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:27.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:27.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:27.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:27.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:27.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:27.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:27.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:27.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:27.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:27.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:27.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:27.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:28.086 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:40:28.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:28.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:28.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:28.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:28.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:28.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:28.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:28.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:28.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:28.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:28.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:28.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:28.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:28.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:28.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:28.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:28.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:28.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:28.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:28.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:28.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:28.557 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:40:28.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:28.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:28.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:28.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:28.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:28.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:28.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:28.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:28.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:28.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:28.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:28.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:28.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:29.030 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:40:29.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:29.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:29.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:29.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:29.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:29.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:29.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:29.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:29.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:29.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:29.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:29.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:29.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:29.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:29.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:29.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:29.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:29.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:29.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:29.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:29.503 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:40:29.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:29.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:29.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:29.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:29.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:29.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:29.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:29.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:29.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:29.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:29.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:29.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:29.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:29.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:29.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:29.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:29.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:29.974 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:40:30.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:30.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:30.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:30.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:30.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:30.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:30.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:30.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:30.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:30.446 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:40:30.917 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:40:30.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:30.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:30.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:30.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:30.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:30.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:30.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:30.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:30.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:30.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:30.998 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:30.998 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:31.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:31.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:31.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:31.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:31.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:31.187 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:40:31.187 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 02:40:31.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:31.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:31.388 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:40:31.861 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:40:32.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:32.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:32.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:32.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:32.007 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:40:32.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:32.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:32.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:32.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:32.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:32.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:32.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:32.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:32.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:32.134 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:40:32.134 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-03 02:40:32.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:32.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:32.333 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:40:32.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:32.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:32.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:32.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:32.547 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:40:32.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:32.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:32.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:32.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:32.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:32.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:32.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:32.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:32.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:32.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:32.806 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:40:32.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:32.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:32.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:32.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:33.280 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:40:33.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:33.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:33.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:33.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:33.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:33.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:33.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:33.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:33.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:33.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:33.595 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:33.595 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:33.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:33.751 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:40:33.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:33.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:33.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:33.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:34.223 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:40:34.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:34.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:34.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:34.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:34.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:34.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:34.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:34.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:34.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:34.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:34.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:34.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:34.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:34.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:34.695 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:40:34.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:34.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:34.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:34.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:35.169 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:40:35.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:35.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:35.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:35.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:35.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:35.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:35.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:35.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:35.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:35.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:35.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:35.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:35.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:35.641 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:40:35.676 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:40:35.676 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:40:35.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:35.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:36.115 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:40:36.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:36.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:36.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:36.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:36.459 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:40:36.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:36.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:36.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:36.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:36.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:36.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:36.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:36.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:36.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:36.587 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:40:36.624 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:40:36.624 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:40:36.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:36.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:37.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:37.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:37.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:37.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:37.005 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:40:37.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:37.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:37.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:37.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:37.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:37.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:37.025 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:37.025 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:37.059 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:40:37.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:37.122 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:40:37.122 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:40:37.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:37.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:37.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:37.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:37.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:37.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:37.217 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:40:37.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:37.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:37.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:37.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:37.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:37.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:37.236 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:37.236 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:37.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:37.330 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:40:37.330 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:40:37.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:37.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:37.531 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:40:37.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:37.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:37.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:37.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:37.708 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:40:37.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:37.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:37.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:37.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:37.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:37.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:37.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:37.726 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:37.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:37.828 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:40:37.828 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:40:37.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:37.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:38.004 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:40:38.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:38.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:38.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:38.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:38.201 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:40:38.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:38.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:38.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:38.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:38.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:38.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:38.222 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:38.222 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:38.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:38.303 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:40:38.304 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:40:38.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:38.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:38.476 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:40:38.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:38.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:38.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:38.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:38.690 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:40:38.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:38.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:38.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:38.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:38.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:38.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:38.703 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:38.703 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:38.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:38.774 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:40:38.774 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:40:38.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:38.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:38.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:38.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:38.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:38.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:38.870 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:40:38.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:38.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:38.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:38.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:38.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:38.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:38.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:38.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:38.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:38.947 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:40:38.982 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:40:38.983 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:40:38.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:38.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:39.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:39.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:39.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:39.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:39.360 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:40:39.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:39.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:39.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:39.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:39.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:39.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:39.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:39.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:39.421 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:40:39.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:39.481 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:40:39.481 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:40:39.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:39.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:39.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:39.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:39.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:39.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:39.850 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:40:39.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:39.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:39.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:39.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:39.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:40:39.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:40:39.862 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:40:39.862 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:40:39.893 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:40:39.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:39.957 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:40:39.957 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:40:39.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:39.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:40.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:40:40.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:40.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:40.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:40.344 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:40:40.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:40.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:40.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:40.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:40.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:40.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:40.352 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:40:40.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:40:40.352 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:40:40.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:40.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:45.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:40:45.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:40:45.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:45.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:45.359 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:45.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:45.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:45.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:40:45.366 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:45.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:40:45.367 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:40:45.370 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:40:45.370 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:40:45.370 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:40:45.370 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:45.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:45.371 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:40:45.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:40:45.371 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:40:45.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:45.373 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:40:45.373 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:40:45.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:40:45.373 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:45.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:45.373 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:40:45.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:40:45.373 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:40:45.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:45.375 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:40:45.375 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:40:45.376 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:40:45.376 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:45.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:45.376 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:40:45.376 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:40:45.376 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:40:45.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:45.378 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:40:45.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:40:45.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:40:45.379 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:40:45.379 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:40:45.379 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:45.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:45.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:45.384 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:40:45.861 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:40:45.904 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:40:45.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.907 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:40:45.908 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:40:45.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:45.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:45.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:45.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:45.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.326 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:40:46.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 02:40:46.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:46.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:46.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:46.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:46.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:46.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 02:40:46.792 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-05-03 02:40:47.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:47.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 02:40:47.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 02:40:47.257 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:40:47.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:47.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 02:40:47.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:47.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:47.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:47.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:47.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:47.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:47.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 02:40:47.722 [DEBUG] clck_gen.py:113 IND CLOCK 510
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2026-05-03 02:40:48.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.186 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:40:48.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 02:40:48.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:48.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:48.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:48.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:48.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
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2026-05-03 02:40:48.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:48.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:48.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:48.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:48.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:48.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:48.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:48.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:48.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:48.578 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:40:48.578 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:40:48.578 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:40:48.578 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=699 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:48.579 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=699 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:48.579 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=699 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:48.579 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=699 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:48.579 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=699 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:48.579 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=699 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:48.579 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=699 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:53.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:40:53.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:40:53.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:53.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:53.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:53.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:53.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:53.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:40:53.589 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:53.590 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:40:53.590 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:40:53.594 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:40:53.594 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:40:53.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:40:53.595 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:53.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:53.596 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:40:53.596 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:40:53.596 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:40:53.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:53.598 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:40:53.598 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:40:53.598 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:40:53.598 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:53.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:53.599 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:40:53.599 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:40:53.599 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:40:53.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:53.601 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:40:53.602 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:40:53.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:40:53.602 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:53.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:53.602 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:40:53.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:40:53.602 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:40:53.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:53.607 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:53.608 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:40:53.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:40:53.608 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:40:53.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:53.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:53.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:53.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:53.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:53.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:53.613 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:40:54.090 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:40:54.137 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:40:54.139 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:40:54.141 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:40:54.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:54.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:54.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:54.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:54.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:54.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:54.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:54.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:54.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:54.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:54.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:54.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:54.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:54.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:54.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:40:54.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:40:54.185 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:40:54.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:54.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:54.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:54.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:54.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:54.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:54.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:59.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:40:59.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:40:59.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:59.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:59.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:59.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:59.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:59.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:40:59.197 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:59.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:40:59.198 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:40:59.202 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:40:59.202 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:40:59.203 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:40:59.203 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:59.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:59.204 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:40:59.204 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:40:59.204 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:40:59.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:59.206 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:40:59.206 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:40:59.206 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:40:59.206 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:59.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:59.206 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:40:59.206 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:40:59.206 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:40:59.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:59.208 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:40:59.209 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:40:59.209 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:40:59.209 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:40:59.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:59.209 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:40:59.209 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:40:59.209 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:40:59.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:59.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:40:59.213 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:40:59.213 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:40:59.213 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:40:59.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:59.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:59.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:59.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:40:59.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:40:59.217 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:40:59.693 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:40:59.735 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:40:59.736 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:40:59.737 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:40:59.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:40:59.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:40:59.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:40:59.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:40:59.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:40:59.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:40:59.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:40:59.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:40:59.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:40:59.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:40:59.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:40:59.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:40:59.773 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:40:59.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:40:59.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:40:59.773 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:59.773 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:59.773 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:59.773 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:59.773 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:59.773 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:40:59.773 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:41:04.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:41:04.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:41:04.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:41:04.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:41:04.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:41:04.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:41:04.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:41:04.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:41:04.784 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:41:04.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:41:04.784 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:41:04.786 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:41:04.786 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:41:04.786 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:41:04.786 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:41:04.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:41:04.787 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:41:04.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:41:04.787 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:41:04.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:41:04.788 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:41:04.788 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:41:04.788 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:41:04.788 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:41:04.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:41:04.788 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:41:04.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:41:04.789 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:41:04.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:41:04.790 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:41:04.790 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:41:04.790 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:41:04.790 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:41:04.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:41:04.790 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:41:04.790 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:41:04.790 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:41:04.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:41:04.792 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:41:04.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:41:04.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:41:04.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:41:04.792 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:41:04.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:41:04.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:41:04.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:04.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:41:04.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:41:04.792 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:41:04.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:04.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:41:04.793 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:41:04.793 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:04.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:04.797 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:41:05.275 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:41:05.317 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:41:05.320 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:41:05.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:05.323 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:41:05.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:05.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:05.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:05.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:05.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:05.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:05.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:05.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:05.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:05.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:05.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:05.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:05.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:05.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:05.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:05.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:05.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:05.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:05.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:05.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:05.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:05.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:05.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:05.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:05.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:05.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:05.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:05.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:05.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:05.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:05.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:05.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:05.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:05.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:05.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:05.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:05.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:05.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:05.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:05.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:41:05.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:41:05.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:41:05.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:41:05.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:41:05.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:41:05.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:41:05.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:41:05.443 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:41:05.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:41:05.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:41:10.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:41:10.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:41:10.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:41:10.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:41:10.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:41:10.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:41:10.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:41:10.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:41:10.459 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:41:10.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:41:10.459 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:41:10.462 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:41:10.462 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:41:10.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:41:10.463 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:41:10.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:41:10.463 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:41:10.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:41:10.463 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:41:10.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:41:10.465 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:41:10.465 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:41:10.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:41:10.465 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:41:10.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:41:10.465 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:41:10.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:41:10.465 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:41:10.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:41:10.467 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:41:10.468 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:41:10.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:41:10.468 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:41:10.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:41:10.468 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:41:10.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:41:10.468 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:41:10.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:41:10.470 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:41:10.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:41:10.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:41:10.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:41:10.471 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:41:10.471 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:10.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:10.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:10.476 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:41:10.953 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:41:10.997 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:41:10.998 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:41:11.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:11.000 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:41:11.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:11.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:11.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:11.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:11.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:11.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:11.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:41:11.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:41:11.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:11.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:11.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:11.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:11.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:11.424 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:41:11.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:41:11.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:41:11.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:41:11.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:41:11.896 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:41:12.368 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:41:12.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:41:12.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:41:12.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:41:12.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:41:12.842 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:41:13.314 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:41:13.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:41:13.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:41:13.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:41:13.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:41:13.785 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:41:14.256 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:41:14.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:41:14.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:41:14.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:41:14.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:41:14.730 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:41:15.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:15.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:15.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:15.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:15.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:15.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:15.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:15.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:15.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:15.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:15.176 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:41:15.176 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:41:15.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:15.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:15.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:15.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:15.202 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:41:15.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:15.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:15.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:41:15.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:41:15.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:41:15.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:41:15.674 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:41:16.147 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:41:16.620 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:41:17.092 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:41:17.563 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:41:18.036 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:41:18.509 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:41:18.981 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:41:19.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:19.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:19.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:19.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:19.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:19.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:19.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:19.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:19.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:19.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:19.448 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:41:19.448 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:41:19.454 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:41:19.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:19.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:19.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:19.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:19.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:19.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:19.925 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:41:20.398 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:41:20.870 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:41:21.343 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:41:21.816 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:41:22.288 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:41:22.761 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:41:23.234 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:41:23.706 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:41:23.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:23.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:23.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:23.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:23.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:23.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:23.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:23.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:23.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:23.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:23.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:41:23.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:41:23.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:23.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:23.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:23.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:23.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:24.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:24.177 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:41:24.651 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:41:25.123 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:41:25.595 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:41:26.066 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:41:26.540 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:41:27.012 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:41:27.484 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:41:27.955 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:41:28.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:28.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:28.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:28.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:28.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:28.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:28.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:28.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:28.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:28.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:28.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:41:28.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:41:28.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:28.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:28.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:28.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:28.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:28.426 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:41:28.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:28.899 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:41:29.372 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:41:29.844 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:41:30.318 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:41:30.791 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:41:31.263 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:41:31.734 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:41:32.207 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:41:32.680 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:41:32.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:32.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:32.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:32.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:32.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:32.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:32.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:32.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:32.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:32.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:32.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:41:32.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:41:32.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:32.825 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:41:32.825 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 02:41:32.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:32.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:33.152 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:41:33.625 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:41:33.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:34.098 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:41:34.571 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:41:35.044 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:41:35.517 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:41:35.989 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:41:36.463 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:41:36.935 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:41:37.407 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:41:37.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:37.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:37.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:37.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:37.650 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:41:37.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:37.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:37.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:37.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:37.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:37.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:37.670 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:41:37.670 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:41:37.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:37.692 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:41:37.692 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-03 02:41:37.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:37.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:37.879 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:41:38.352 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:41:38.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:38.824 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:41:39.297 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:41:39.770 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 02:41:40.242 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 02:41:40.715 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 02:41:41.188 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 02:41:41.661 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 02:41:42.134 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 02:41:42.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:42.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:42.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:42.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:42.533 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:41:42.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:42.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:42.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:42.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:42.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:42.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:42.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:41:42.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:41:42.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:42.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:42.607 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 02:41:42.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:42.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:42.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:42.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:43.079 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 02:41:43.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:43.550 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 02:41:44.023 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 02:41:44.496 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 02:41:44.968 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 02:41:45.439 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 02:41:45.913 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 02:41:46.385 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 02:41:46.857 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 02:41:47.328 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 02:41:47.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:47.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:47.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:47.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:47.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:47.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:47.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:47.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:47.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:47.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:47.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:41:47.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:41:47.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:47.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:47.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:47.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:47.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:47.801 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 02:41:48.274 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 02:41:48.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:48.746 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 02:41:49.218 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 02:41:49.688 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 02:41:50.159 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 02:41:50.633 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 02:41:51.105 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 02:41:51.577 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 02:41:52.048 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 02:41:52.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:52.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:52.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:52.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:52.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:52.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:52.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:52.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:52.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:52.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:52.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:41:52.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:41:52.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:41:52.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:52.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:52.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:52.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:52.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:52.519 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 02:41:52.992 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 02:41:53.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:53.465 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 02:41:53.937 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 02:41:54.408 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 02:41:54.882 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 02:41:55.355 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 02:41:55.827 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 02:41:56.301 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 02:41:56.773 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 02:41:57.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:57.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:57.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:57.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:57.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:41:57.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:41:57.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:41:57.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:57.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:41:57.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:41:57.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:41:57.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:41:57.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:57.111 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:41:57.112 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:41:57.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:57.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:41:57.245 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 02:41:57.719 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 02:41:57.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:41:58.192 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 02:41:58.665 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-03 02:41:59.139 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-03 02:41:59.611 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-03 02:42:00.086 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-03 02:42:00.559 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-03 02:42:01.033 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-03 02:42:01.505 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-03 02:42:01.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:01.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:01.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:01.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:01.854 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:01.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:01.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:01.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:01.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:01.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:01.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:01.874 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:01.874 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:01.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:01.934 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:01.935 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:42:01.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:01.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:01.979 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-03 02:42:02.451 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-03 02:42:02.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:02.923 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-03 02:42:03.397 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-03 02:42:03.869 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-03 02:42:04.342 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-03 02:42:04.815 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-03 02:42:05.289 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-03 02:42:05.761 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-03 02:42:06.234 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-03 02:42:06.707 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-03 02:42:06.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:06.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:06.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:06.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:06.742 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:06.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:06.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:06.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:06.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:06.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:06.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:06.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:06.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:06.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:06.810 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:06.810 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:06.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:06.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:06.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:07.179 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-03 02:42:07.651 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-03 02:42:08.124 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-03 02:42:08.596 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-03 02:42:09.068 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-03 02:42:09.541 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-03 02:42:10.014 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-03 02:42:10.487 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-03 02:42:10.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:10.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:10.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:10.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:10.868 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:10.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:10.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:10.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:10.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:10.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:10.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:10.879 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:10.879 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:10.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:10.916 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:10.916 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:10.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:10.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:10.960 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-03 02:42:11.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:11.432 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-03 02:42:11.904 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-03 02:42:12.377 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-03 02:42:12.849 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-03 02:42:13.323 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-03 02:42:13.795 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-03 02:42:14.267 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-03 02:42:14.741 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-03 02:42:15.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:15.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:15.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:15.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:15.139 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:15.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:15.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:15.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:15.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:15.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:15.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:15.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:15.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:15.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:15.156 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:15.156 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:15.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:15.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:15.213 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-03 02:42:15.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:15.685 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-03 02:42:16.159 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-03 02:42:16.631 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-03 02:42:17.103 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-03 02:42:17.576 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-03 02:42:18.049 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-03 02:42:18.521 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-03 02:42:18.993 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-03 02:42:19.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:19.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:19.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:19.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:19.412 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:19.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:19.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:19.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:19.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:19.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:19.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:19.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:19.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:19.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:19.466 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-03 02:42:19.471 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:19.471 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:19.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:19.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:19.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:19.939 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-03 02:42:20.412 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-03 02:42:20.884 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-03 02:42:21.356 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-03 02:42:21.829 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-03 02:42:22.302 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-03 02:42:22.774 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-03 02:42:23.247 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-03 02:42:23.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:23.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:23.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:23.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:23.683 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:23.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:23.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:23.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:23.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:23.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:23.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:23.703 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:23.703 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:23.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:23.714 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:23.714 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:23.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:23.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:23.719 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-03 02:42:24.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:24.191 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-03 02:42:24.663 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-03 02:42:25.136 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-03 02:42:25.608 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-03 02:42:26.080 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-03 02:42:26.554 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-03 02:42:27.027 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-03 02:42:27.499 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-03 02:42:27.973 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-03 02:42:28.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:28.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:28.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:28.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:28.116 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:28.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:28.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:28.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:28.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:28.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:28.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:28.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:28.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:28.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:28.157 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:28.158 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:28.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:28.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:28.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:28.445 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-03 02:42:28.917 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-03 02:42:29.390 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-03 02:42:29.863 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-03 02:42:30.335 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-03 02:42:30.808 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-03 02:42:31.281 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-03 02:42:31.753 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-03 02:42:32.225 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-03 02:42:32.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:32.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:32.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:32.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:32.383 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:32.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:32.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:32.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:32.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:32.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:32.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:32.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:32.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:32.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:32.408 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:32.408 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:32.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:32.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:32.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:32.698 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-03 02:42:33.170 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-03 02:42:33.644 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-03 02:42:34.116 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-03 02:42:34.588 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-03 02:42:35.062 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-03 02:42:35.534 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-03 02:42:36.006 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-03 02:42:36.480 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-03 02:42:36.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:36.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:36.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:36.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:36.653 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:36.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:36.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:36.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:36.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:36.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:36.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:36.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:36.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:36.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:36.722 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:36.722 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:36.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:36.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:36.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:36.952 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-03 02:42:37.424 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-03 02:42:37.898 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-03 02:42:38.371 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-03 02:42:38.843 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-03 02:42:39.314 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-03 02:42:39.788 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-03 02:42:40.260 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-03 02:42:40.733 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-03 02:42:40.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:40.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:40.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:40.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:40.926 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:40.926 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=19526 tn=2 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:42:40.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:42:40.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:42:40.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:42:40.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:42:40.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:42:40.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:42:40.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:42:40.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:42:40.945 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:42:40.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:42:40.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:42:40.946 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19530 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:42:40.946 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19530 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:42:40.946 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19530 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:42:40.946 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19530 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:42:40.946 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19530 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:42:40.946 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19530 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:42:40.946 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19530 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:42:45.947 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:42:45.947 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:42:45.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:42:45.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:42:45.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:42:45.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:42:45.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:42:45.950 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:42:45.950 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:42:45.950 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:42:45.950 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:42:45.951 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:42:45.951 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:42:45.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:42:45.952 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:42:45.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:42:45.952 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:42:45.952 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:42:45.952 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:42:45.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:42:45.953 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:42:45.953 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:42:45.953 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:42:45.953 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:42:45.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:42:45.953 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:42:45.953 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:42:45.953 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:42:45.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:42:45.954 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:42:45.954 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:42:45.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:42:45.954 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:42:45.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:42:45.954 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:42:45.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:42:45.954 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:42:45.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:42:45.956 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:42:45.956 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:42:45.956 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:45.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:45.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:42:45.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:42:45.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:42:45.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:42:45.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:42:45.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:42:45.958 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:42:50.965 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:42:50.965 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:42:50.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:42:50.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:42:50.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:42:50.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:42:50.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:42:50.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:42:50.969 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:42:50.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:42:50.969 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:42:50.970 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:42:50.970 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:42:50.970 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:42:50.970 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:42:50.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:42:50.970 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:42:50.970 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:42:50.970 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:42:50.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:42:50.971 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:42:50.971 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:42:50.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:42:50.971 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:42:50.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:42:50.971 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:42:50.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:42:50.971 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:42:50.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:42:50.972 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:42:50.972 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:42:50.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:42:50.972 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:42:50.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:42:50.972 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:42:50.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:42:50.972 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:42:50.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:42:50.974 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:42:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:42:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:42:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:42:50.974 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:42:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:42:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:42:50.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:42:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:42:50.975 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:42:50.975 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:42:50.975 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:42:50.979 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:42:51.458 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:42:51.494 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:42:51.495 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:42:51.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:51.497 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:42:51.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:51.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:51.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:51.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:51.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:51.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:51.522 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:51.522 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:51.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:51.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:51.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:51.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:51.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:51.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:51.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:51.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:51.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:51.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:51.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:51.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:51.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:51.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:51.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:51.682 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:51.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:51.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:51.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:51.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:51.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:51.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:51.930 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:42:51.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:42:51.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:42:51.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:42:51.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:42:52.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:52.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:52.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:52.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:52.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:52.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:52.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:52.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:52.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:52.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:52.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:52.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:52.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:52.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:52.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:52.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:52.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:52.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:52.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:52.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:52.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:52.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:52.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:52.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:52.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:52.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:52.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:52.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:52.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:52.400 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:42:52.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:52.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:52.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:52.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:52.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:52.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:52.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:52.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:52.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:52.872 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:42:52.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:52.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:52.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:52.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:52.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:52.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:52.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:52.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:52.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:52.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:52.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:52.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:52.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:52.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:42:52.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:42:52.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:42:52.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:42:53.343 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:42:53.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:53.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:53.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:53.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:53.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:53.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:53.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:53.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:53.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:53.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:53.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:53.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:53.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:53.442 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:53.442 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 02:42:53.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:53.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:53.815 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:42:53.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:53.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:53.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:53.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:53.921 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:53.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:53.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:53.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:53.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:53.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:53.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:53.940 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:53.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:53.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:53.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:42:53.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:42:53.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:42:53.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:42:53.985 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:53.986 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-03 02:42:53.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:53.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:54.288 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:42:54.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:54.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:54.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:54.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:54.467 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:54.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:54.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:54.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:54.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:54.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:54.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:54.488 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:54.488 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:54.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:54.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:54.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:54.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:54.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:54.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:54.761 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:42:54.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:42:54.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:42:54.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:42:54.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:42:55.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:55.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:55.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:55.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:55.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:55.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:55.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:55.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:55.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:55.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:55.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:55.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:55.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:55.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:55.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:55.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:55.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:55.234 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:42:55.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:55.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:55.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:55.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:55.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:55.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:55.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:55.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:55.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:55.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:55.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:55.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:55.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:42:55.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:55.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:55.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:55.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:55.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:55.706 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:42:55.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:42:55.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:42:55.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:42:55.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:42:56.178 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:42:56.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:56.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:56.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:56.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:56.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:56.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:56.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:56.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:56.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:56.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:56.471 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:56.471 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:56.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:56.520 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:56.520 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:42:56.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:56.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:56.651 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:42:56.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:56.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:56.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:56.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:56.932 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:56.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:56.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:56.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:56.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:56.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:56.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:56.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:56.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:56.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:56.987 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:56.987 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:42:56.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:56.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:57.124 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:42:57.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:57.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:57.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:57.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:57.476 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:57.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:57.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:57.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:57.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:57.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:57.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:57.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:57.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:57.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:57.552 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:57.552 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:57.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:57.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:57.596 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:42:57.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:57.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:57.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:57.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:57.755 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:57.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:57.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:57.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:57.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:57.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:57.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:57.776 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:57.776 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:57.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:57.838 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:57.838 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:57.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:57.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:58.067 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:42:58.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:58.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:58.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:58.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:58.243 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:58.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:58.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:58.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:58.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:58.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:58.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:58.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:58.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:58.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:58.304 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:58.304 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:58.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:58.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:58.539 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:42:58.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:58.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:58.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:58.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:58.734 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:58.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:58.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:58.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:58.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:58.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:58.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:58.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:58.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:58.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:58.796 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:58.796 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:58.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:58.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:59.009 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:42:59.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:59.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:59.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:59.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:59.223 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:59.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:59.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:59.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:59.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:59.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:59.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:59.245 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:59.245 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:59.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:59.296 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:59.296 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:59.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:59.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:59.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:59.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:59.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:59.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:59.402 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:59.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:59.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:59.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:59.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:59.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:59.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:59.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:59.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:59.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:59.479 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:42:59.481 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:59.481 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:59.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:59.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:59.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:59.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:59.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:59.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:59.893 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:42:59.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:42:59.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:42:59.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:42:59.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:59.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:42:59.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:42:59.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:42:59.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:42:59.950 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:42:59.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:42:59.959 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:42:59.959 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:42:59.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:42:59.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:00.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:00.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:00.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:00.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:00.380 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:43:00.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:00.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:00.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:00.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:00.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:00.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:00.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:00.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:00.421 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:43:00.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:00.464 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:43:00.464 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:43:00.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:00.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:00.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:00.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:00.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:00.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:00.870 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:43:00.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:43:00.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:43:00.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:43:00.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:43:00.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:43:00.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:43:00.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:43:00.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:43:00.877 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:43:00.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:43:00.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:43:00.877 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2141 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:43:00.877 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2141 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:43:00.877 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2141 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:43:00.877 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:43:00.877 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:43:00.877 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:43:00.877 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:43:05.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:43:05.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:43:05.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:43:05.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:43:05.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:43:05.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:43:05.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:43:05.887 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:43:05.887 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:43:05.887 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:43:05.887 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:43:05.890 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:43:05.890 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:43:05.890 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:43:05.890 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:43:05.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:43:05.890 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:43:05.890 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:43:05.890 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:43:05.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:43:05.892 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:43:05.893 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:43:05.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:43:05.893 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:43:05.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:43:05.893 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:43:05.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:43:05.893 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:43:05.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:43:05.895 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:43:05.895 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:43:05.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:43:05.895 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:43:05.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:43:05.895 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:43:05.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:43:05.895 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:43:05.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:43:05.898 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:43:05.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:43:05.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:43:05.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:43:05.898 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:43:05.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:43:05.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:43:05.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:05.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:43:05.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:43:05.898 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:43:05.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:05.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:43:05.899 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:43:05.899 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:43:05.899 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:05.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:05.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:05.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:05.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:05.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:05.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:05.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:05.903 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:43:06.382 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:43:06.419 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:43:06.420 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:43:06.421 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:43:06.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:06.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:06.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:06.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:06.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:06.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:06.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:06.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:06.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:06.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:06.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:06.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:06.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:06.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:06.853 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:43:06.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:43:06.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:43:06.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:43:06.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:43:07.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:07.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:07.325 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:43:07.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:07.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:07.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:07.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:07.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:07.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:07.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:07.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:07.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:07.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:07.541 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:07.541 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:07.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:07.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:07.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:07.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:07.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:07.797 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:43:07.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:43:07.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:43:07.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:43:07.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:43:08.268 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:43:08.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:08.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:08.741 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:43:08.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:43:08.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:43:08.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:43:08.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:43:08.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:08.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:08.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:08.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:08.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:08.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:08.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:08.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:08.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:08.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:08.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:08.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:09.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:09.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:09.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:09.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:09.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:09.214 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:43:09.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:09.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:09.686 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:43:09.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:43:09.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:43:09.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:43:09.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:43:10.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:10.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:10.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:10.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:10.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:10.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:10.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:10.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:10.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:10.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:10.138 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:10.138 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:10.157 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:43:10.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:10.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:10.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:10.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:10.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:10.628 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:43:10.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:43:10.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:43:10.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:43:10.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:43:11.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:11.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:11.102 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:43:11.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:11.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:11.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:11.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:11.561 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=1223 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:43:11.574 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:43:11.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:11.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:11.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:11.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:11.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:11.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:11.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:11.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:11.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:11.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:11.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:11.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:11.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:12.045 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:43:12.519 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:43:12.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:12.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:12.991 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:43:13.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:13.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:13.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:13.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:13.121 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=1560 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:43:13.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:13.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:13.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:13.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:13.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:13.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:13.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:13.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:13.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:13.192 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:43:13.192 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 02:43:13.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:13.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:13.462 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:43:13.933 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:43:14.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:14.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:14.407 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:43:14.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:14.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:14.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:14.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:14.627 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:43:14.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:14.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:14.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:14.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:14.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:14.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:14.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:14.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:14.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:14.699 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:43:14.700 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-03 02:43:14.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:14.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:14.879 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:43:15.352 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:43:15.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:15.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:15.825 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:43:16.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:16.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:16.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:16.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:16.133 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:43:16.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:16.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:16.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:16.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:16.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:16.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:16.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:16.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:16.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:16.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:16.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:16.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:16.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:16.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:16.297 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:43:16.769 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:43:17.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:17.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:17.242 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:43:17.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:17.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:17.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:17.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:17.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:17.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:17.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:17.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:17.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:17.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:17.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:17.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:17.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:17.715 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:43:17.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:17.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:17.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:17.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:18.187 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:43:18.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:18.658 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:43:18.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:19.131 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:43:19.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:19.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:19.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:19.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:19.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:19.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:19.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:19.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:19.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:19.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:19.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:19.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:19.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:19.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:19.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:19.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:19.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:19.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:19.603 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:43:20.076 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:43:20.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:20.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:20.546 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:43:21.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:21.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:21.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:21.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:21.020 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:43:21.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:21.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:21.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:21.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:21.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:21.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:21.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:21.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:21.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:21.075 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:43:21.076 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:43:21.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:21.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:21.493 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:43:21.965 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:43:21.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:21.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:22.439 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:43:22.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:22.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:22.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:22.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:22.452 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:43:22.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:22.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:22.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:22.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:22.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:22.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:22.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:22.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:22.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:22.513 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:43:22.513 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:43:22.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:22.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:22.911 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:43:23.384 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:43:23.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:23.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:23.859 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:43:23.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:23.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:23.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:23.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:23.963 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:43:23.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:23.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:23.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:23.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:23.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:23.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:23.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:23.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:24.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:24.039 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:43:24.039 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:43:24.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:24.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:24.330 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:43:24.803 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:43:24.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:24.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:25.276 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:43:25.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:25.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:25.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:25.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:25.435 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:43:25.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:25.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:25.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:25.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:25.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:25.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:25.446 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:25.446 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:25.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:25.495 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:43:25.495 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:43:25.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:25.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:25.748 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:43:26.219 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:43:26.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:26.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:26.693 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:43:26.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:26.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:26.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:26.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:26.866 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:43:26.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:26.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:26.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:26.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:26.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:26.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:26.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:26.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:26.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:26.932 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:43:26.932 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:43:26.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:26.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:27.165 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:43:27.637 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:43:27.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:27.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:28.111 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:43:28.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:28.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:28.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:28.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:28.303 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:43:28.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:28.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:28.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:28.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:28.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:28.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:28.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:28.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:28.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:28.367 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:43:28.367 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:43:28.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:28.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:28.583 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:43:29.055 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:43:29.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:29.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:29.528 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:43:29.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:29.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:29.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:29.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:29.740 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:43:29.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:29.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:29.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:29.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:29.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:29.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:29.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:29.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:29.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:29.815 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:43:29.815 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:43:29.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:29.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:30.001 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:43:30.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:30.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:30.473 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:43:30.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:30.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:30.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:30.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:30.867 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:43:30.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:30.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:30.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:30.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:30.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:30.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:30.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:30.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:30.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:30.945 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:43:30.951 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:43:30.951 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:43:30.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:30.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:31.418 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:43:31.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:31.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:31.891 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:43:32.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:32.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:32.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:32.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:32.305 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:43:32.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:32.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:32.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:32.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:32.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:32.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:32.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:32.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:32.363 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:43:32.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:32.380 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:43:32.380 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:43:32.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:32.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:32.835 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:43:33.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:33.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:33.308 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:43:33.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:33.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:33.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:33.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:33.740 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:43:33.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:33.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:33.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:33.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:33.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:33.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:33.762 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:33.762 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:33.780 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:43:33.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:33.816 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:43:33.816 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:43:33.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:33.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:34.252 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:43:34.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:34.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:34.725 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:43:35.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:35.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:35.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:35.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:35.171 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:43:35.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:43:35.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:43:35.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:43:35.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:43:35.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:43:35.185 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:43:35.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:43:35.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:43:35.185 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:43:35.185 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:43:35.185 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:43:35.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:43:35.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:43:35.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:43:35.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:43:35.185 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:43:40.193 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:43:40.193 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:43:40.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:43:40.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:43:40.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:43:40.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:43:40.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:43:40.201 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:43:40.202 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:43:40.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:43:40.202 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:43:40.204 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:43:40.205 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:43:40.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:43:40.205 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:43:40.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:43:40.206 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:43:40.206 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:43:40.206 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:43:40.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:43:40.208 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:43:40.208 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:43:40.208 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:43:40.208 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:43:40.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:43:40.208 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:43:40.208 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:43:40.208 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:43:40.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:43:40.210 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:43:40.211 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:43:40.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:43:40.211 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:43:40.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:43:40.211 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:43:40.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:43:40.211 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:43:40.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:43:40.214 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:43:40.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:40.215 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:43:40.215 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:43:40.215 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:43:40.215 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:43:40.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:43:40.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:40.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:43:40.220 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:43:40.697 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:43:40.746 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:43:40.748 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:43:40.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:40.750 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:43:40.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:40.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:40.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:40.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:40.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:40.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:40.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:40.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:40.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:40.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:40.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:40.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:40.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:41.168 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:43:41.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:43:41.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:43:41.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:43:41.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:43:41.640 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:43:42.112 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:43:42.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:43:42.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:43:42.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:43:42.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:43:42.586 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:43:43.058 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:43:43.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:43:43.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:43:43.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:43:43.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:43:43.530 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:43:44.004 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:43:44.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:43:44.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:43:44.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:43:44.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:43:44.476 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:43:44.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:44.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:44.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:44.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:44.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:44.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:44.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:44.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:44.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:44.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:44.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:44.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:44.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:44.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:44.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:44.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:44.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:44.948 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:43:45.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:43:45.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:43:45.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:43:45.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:43:45.419 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:43:45.892 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:43:46.365 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:43:46.837 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:43:47.308 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:43:47.782 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:43:48.254 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:43:48.726 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:43:48.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:48.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:48.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:48.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:48.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:48.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:48.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:48.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:48.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:48.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:48.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:48.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:49.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:49.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:49.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:49.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:49.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:49.199 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:43:49.672 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:43:50.144 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:43:50.615 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:43:51.085 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:43:51.559 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:43:52.031 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:43:52.504 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:43:52.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:52.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:52.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:52.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:52.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:52.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:52.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:52.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:52.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:52.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:52.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:52.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:52.974 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:43:53.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:53.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:53.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:53.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:53.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:53.445 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:43:53.916 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:43:54.390 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:43:54.862 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:43:55.334 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:43:55.808 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:43:56.280 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:43:56.752 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:43:57.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:57.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:57.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:57.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:57.223 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:43:57.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:43:57.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:43:57.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:43:57.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:57.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:57.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:57.232 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:43:57.232 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:43:57.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:43:57.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:43:57.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:43:57.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:57.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:43:57.694 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:43:58.168 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:43:58.640 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:43:59.112 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:43:59.586 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:44:00.059 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:44:00.531 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:44:01.005 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:44:01.478 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:44:01.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:01.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:01.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:01.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:01.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:01.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:01.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:44:01.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:01.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:01.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:01.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:44:01.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:44:01.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:01.951 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:44:01.955 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:44:01.956 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 02:44:01.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:01.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:02.424 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:44:02.897 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:44:03.370 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:44:03.843 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:44:04.316 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:44:04.789 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:44:05.262 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:44:05.734 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:44:06.208 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:44:06.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:06.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:06.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:06.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:06.290 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:44:06.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:06.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:06.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:44:06.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:06.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:06.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:06.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:44:06.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:44:06.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:06.359 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:44:06.359 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-03 02:44:06.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:06.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:06.680 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:44:07.153 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:44:07.626 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:44:08.098 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:44:08.572 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:44:09.044 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:44:09.517 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 02:44:09.990 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 02:44:10.463 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 02:44:10.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:10.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:10.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:10.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:10.687 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:44:10.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:10.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:10.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:44:10.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:10.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:10.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:10.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:44:10.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:44:10.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:44:10.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:10.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:10.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:10.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:10.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:10.935 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 02:44:11.406 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 02:44:11.879 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 02:44:12.352 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 02:44:12.824 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 02:44:13.298 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 02:44:13.770 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 02:44:14.243 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 02:44:14.713 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 02:44:15.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:15.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:15.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:15.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:15.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:15.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:15.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:44:15.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:15.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:15.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:15.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:44:15.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:44:15.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:15.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:15.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:15.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:15.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:15.186 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 02:44:15.659 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 02:44:16.132 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 02:44:16.602 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 02:44:17.073 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 02:44:17.544 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 02:44:18.018 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 02:44:18.490 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 02:44:18.963 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 02:44:19.436 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 02:44:19.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:19.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:19.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:19.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:19.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:19.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:19.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:44:19.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:19.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:19.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:19.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:44:19.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:44:19.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:44:19.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:19.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:19.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:19.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:19.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:19.907 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 02:44:20.380 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 02:44:20.852 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 02:44:21.323 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 02:44:21.796 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 02:44:22.269 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 02:44:22.742 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 02:44:23.215 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 02:44:23.687 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 02:44:23.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:23.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:23.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:23.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:23.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:23.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:23.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:44:23.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:23.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:23.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:23.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:44:23.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:44:23.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:23.819 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:44:23.819 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:44:23.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:23.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:24.157 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 02:44:24.630 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 02:44:25.102 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 02:44:25.576 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 02:44:26.049 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 02:44:26.522 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 02:44:26.996 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 02:44:27.468 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 02:44:27.942 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 02:44:28.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:28.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:28.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:28.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:28.083 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:44:28.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:28.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:28.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:44:28.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:28.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:28.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:28.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:44:28.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:44:28.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:28.155 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:44:28.155 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:44:28.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:28.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:28.415 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-03 02:44:28.887 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-03 02:44:29.360 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-03 02:44:29.833 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-03 02:44:30.305 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-03 02:44:30.778 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-03 02:44:31.251 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-03 02:44:31.724 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-03 02:44:32.197 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-03 02:44:32.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:32.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:32.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:32.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:32.481 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:44:32.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:32.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:32.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:44:32.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:32.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:32.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:32.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:44:32.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:44:32.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:32.561 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:44:32.561 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:44:32.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:32.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:32.669 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-03 02:44:33.142 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-03 02:44:33.616 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-03 02:44:34.089 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-03 02:44:34.562 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-03 02:44:35.034 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-03 02:44:35.507 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-03 02:44:35.980 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-03 02:44:36.452 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-03 02:44:36.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:36.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:36.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:36.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:36.612 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:44:36.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:36.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:36.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:44:36.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:36.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:36.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:36.635 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:44:36.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:44:36.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:36.695 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:44:36.696 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:44:36.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:36.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:36.925 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-03 02:44:37.398 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-03 02:44:37.870 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-03 02:44:38.342 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-03 02:44:38.815 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-03 02:44:39.288 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-03 02:44:39.760 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-03 02:44:40.233 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-03 02:44:40.707 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-03 02:44:40.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:40.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:40.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:40.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:40.885 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:44:40.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:40.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:40.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:44:40.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:40.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:40.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:40.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:44:40.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:44:40.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:40.981 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:44:40.993 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:44:40.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:40.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:41.180 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-03 02:44:41.653 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-03 02:44:42.125 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-03 02:44:42.598 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-03 02:44:43.071 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-03 02:44:43.544 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-03 02:44:44.017 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-03 02:44:44.490 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-03 02:44:44.963 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-03 02:44:45.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:45.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:45.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:45.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:45.159 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:44:45.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:45.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:45.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:44:45.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:45.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:45.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:45.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:44:45.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:44:45.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:45.233 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:44:45.233 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:44:45.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:45.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:45.436 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-03 02:44:45.909 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-03 02:44:46.381 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-03 02:44:46.854 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-03 02:44:47.327 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-03 02:44:47.799 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-03 02:44:48.273 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-03 02:44:48.744 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-03 02:44:49.216 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-03 02:44:49.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:49.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:49.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:49.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:49.430 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:44:49.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:49.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:49.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:44:49.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:49.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:49.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:49.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:44:49.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:44:49.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:49.507 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:44:49.507 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:44:49.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:49.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:49.688 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-03 02:44:50.161 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-03 02:44:50.634 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-03 02:44:51.106 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-03 02:44:51.580 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-03 02:44:52.052 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-03 02:44:52.524 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-03 02:44:52.997 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-03 02:44:53.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:53.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:53.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:53.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:53.389 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:44:53.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:53.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:53.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:44:53.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:53.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:53.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:53.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:44:53.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:44:53.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:53.461 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:44:53.461 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:44:53.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:53.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:53.469 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-03 02:44:53.941 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-03 02:44:54.413 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-03 02:44:54.887 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-03 02:44:55.359 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-03 02:44:55.832 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-03 02:44:56.305 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-03 02:44:56.778 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-03 02:44:57.250 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-03 02:44:57.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:57.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:57.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:57.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:57.662 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:44:57.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:44:57.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:44:57.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:44:57.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:57.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:44:57.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:44:57.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:44:57.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:44:57.723 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-03 02:44:57.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:44:57.735 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:44:57.736 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:44:57.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:57.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:44:58.196 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-03 02:44:58.668 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-03 02:44:59.141 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-03 02:44:59.614 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-03 02:45:00.086 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-03 02:45:00.559 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-03 02:45:01.031 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-03 02:45:01.504 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-03 02:45:01.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:01.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:01.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:01.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:01.933 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:45:01.933 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=17639 tn=2 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:45:01.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:01.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:01.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:45:01.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:01.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:01.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:01.954 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:45:01.954 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:45:01.977 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-03 02:45:01.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:02.004 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:45:02.004 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:45:02.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:02.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:02.450 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-03 02:45:02.922 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-03 02:45:03.395 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-03 02:45:03.868 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-03 02:45:04.340 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-03 02:45:04.814 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-03 02:45:05.286 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-03 02:45:05.759 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-03 02:45:06.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:06.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:06.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:06.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:06.219 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:45:06.232 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-03 02:45:06.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:45:06.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:45:06.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:45:06.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:45:06.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:45:06.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:45:06.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:45:06.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:45:06.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:45:06.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:45:06.235 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:45:11.239 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:45:11.239 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:45:11.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:45:11.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:45:11.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:45:11.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:45:11.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:45:11.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:45:11.250 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:45:11.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:45:11.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:45:11.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:45:11.256 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:45:11.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:45:11.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:45:11.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:45:11.258 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:45:11.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:45:11.259 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:45:11.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:45:11.261 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:45:11.261 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:45:11.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:45:11.261 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:45:11.262 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:45:11.262 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:45:11.262 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:45:11.262 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:45:11.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:45:11.265 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:45:11.265 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:45:11.265 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:45:11.265 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:45:11.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:45:11.265 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:45:11.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:45:11.266 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:45:11.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:11.269 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:45:11.269 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:45:11.269 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:45:11.270 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:45:11.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:11.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:11.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:45:11.271 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:45:11.271 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:11.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:16.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:45:16.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:45:16.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:45:16.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:45:16.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:45:16.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:45:16.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:45:16.297 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:45:16.297 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:45:16.298 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:45:16.298 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:45:16.304 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:45:16.304 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:45:16.305 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:45:16.305 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:45:16.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:45:16.306 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:45:16.307 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:45:16.307 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:45:16.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:45:16.309 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:45:16.309 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:45:16.310 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:45:16.310 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:45:16.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:45:16.310 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:45:16.311 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:45:16.311 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:45:16.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:45:16.312 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:45:16.313 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:45:16.313 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:45:16.313 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:45:16.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:45:16.313 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:45:16.313 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:45:16.313 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:45:16.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:45:16.317 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:45:16.317 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:45:16.317 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:16.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:16.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:16.322 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:45:16.800 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:45:16.849 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:45:16.852 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:45:16.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:16.854 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:45:16.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:16.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:16.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:45:16.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:16.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:16.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:16.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:45:16.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:45:16.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:16.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:16.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:16.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:16.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:17.272 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:45:17.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:45:17.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:45:17.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:45:17.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:45:17.743 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:45:18.217 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:45:18.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:45:18.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:45:18.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:45:18.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:45:18.689 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:45:19.161 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:45:19.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:45:19.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:45:19.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:45:19.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:45:19.635 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:45:20.107 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:45:20.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:45:20.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:45:20.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:45:20.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:45:20.580 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:45:20.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:20.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:20.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:20.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:20.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:20.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:20.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:45:20.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:20.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:20.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:20.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:45:20.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:45:21.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:21.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:21.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:21.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:21.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:21.053 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:45:21.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:45:21.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:45:21.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:45:21.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:45:21.526 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:45:21.998 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:45:22.469 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:45:22.942 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:45:23.415 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:45:23.887 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:45:24.358 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:45:24.829 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:45:25.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:25.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:25.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:25.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:25.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:25.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:25.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:45:25.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:25.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:25.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:25.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:45:25.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:45:25.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:25.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:25.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:25.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:25.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:25.301 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:45:25.774 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:45:26.246 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:45:26.717 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:45:27.188 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:45:27.662 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:45:28.134 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:45:28.606 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:45:29.077 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:45:29.551 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:45:29.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:29.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:29.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:29.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:29.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:29.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:29.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:45:29.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:29.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:29.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:29.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:45:29.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:45:29.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:29.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:29.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:29.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:29.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:30.023 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:45:30.495 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:45:30.969 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:45:31.441 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:45:31.914 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:45:32.387 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:45:32.859 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:45:33.331 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:45:33.802 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:45:33.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:33.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:33.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:33.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:33.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:33.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:33.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:45:33.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:33.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:33.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:33.974 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:45:33.974 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:45:34.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:34.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:34.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:34.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:34.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:34.276 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:45:34.748 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:45:35.221 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:45:35.692 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:45:36.165 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:45:36.638 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:45:37.110 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:45:37.581 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:45:38.054 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:45:38.527 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:45:38.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:38.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:38.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:38.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:38.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:38.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:38.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:45:38.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:38.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:38.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:38.602 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:45:38.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:45:38.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:38.651 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:45:38.651 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 02:45:38.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:38.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:39.000 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:45:39.473 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:45:39.946 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:45:40.418 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:45:40.892 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:45:41.365 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:45:41.838 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:45:42.310 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:45:42.783 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:45:43.257 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:45:43.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:43.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:43.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:43.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:43.461 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:45:43.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:43.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:43.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:45:43.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:43.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:43.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:43.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:45:43.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:45:43.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:43.531 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:45:43.531 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-03 02:45:43.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:43.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:43.729 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:45:44.202 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:45:44.675 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:45:45.147 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:45:45.620 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 02:45:46.093 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 02:45:46.565 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 02:45:47.038 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 02:45:47.512 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 02:45:47.984 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 02:45:48.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:48.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:48.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:48.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:48.342 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:45:48.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:48.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:48.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:45:48.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:48.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:48.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:48.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:45:48.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:45:48.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:48.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:48.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:48.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:48.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:48.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:48.457 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 02:45:48.930 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 02:45:49.403 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 02:45:49.876 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 02:45:50.348 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 02:45:50.821 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 02:45:51.294 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 02:45:51.767 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 02:45:52.240 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 02:45:52.713 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 02:45:53.186 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 02:45:53.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:53.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:53.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:53.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:53.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:53.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:53.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:45:53.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:53.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:53.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:53.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:45:53.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:45:53.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:53.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:53.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:53.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:53.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:53.657 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 02:45:54.128 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 02:45:54.601 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 02:45:55.073 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 02:45:55.545 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 02:45:56.016 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 02:45:56.490 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 02:45:56.963 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 02:45:57.434 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 02:45:57.904 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 02:45:58.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:58.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:58.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:58.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:58.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:45:58.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:45:58.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:45:58.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:58.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:58.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:58.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:45:58.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:45:58.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:45:58.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:45:58.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:45:58.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:45:58.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:58.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:45:58.375 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 02:45:58.849 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 02:45:59.321 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 02:45:59.794 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 02:46:00.267 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 02:46:00.740 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 02:46:01.212 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 02:46:01.686 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 02:46:02.158 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 02:46:02.631 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 02:46:02.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:02.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:02.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:02.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:02.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:02.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:02.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:46:02.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:02.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:02.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:02.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:46:02.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:46:02.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:02.927 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:46:02.927 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:46:02.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:02.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:03.104 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 02:46:03.574 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 02:46:04.044 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 02:46:04.518 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-03 02:46:04.990 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-03 02:46:05.464 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-03 02:46:05.936 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-03 02:46:06.407 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-03 02:46:06.879 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-03 02:46:07.353 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-03 02:46:07.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:07.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:07.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:07.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:07.673 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:46:07.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:07.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:07.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:46:07.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:07.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:07.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:07.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:46:07.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:46:07.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:07.744 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:46:07.744 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:46:07.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:07.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:07.825 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-03 02:46:08.298 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-03 02:46:08.772 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-03 02:46:09.244 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-03 02:46:09.718 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-03 02:46:10.192 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-03 02:46:10.666 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-03 02:46:11.139 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-03 02:46:11.613 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-03 02:46:12.086 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-03 02:46:12.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:12.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:12.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:12.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:12.551 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:46:12.560 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-03 02:46:12.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:12.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:12.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:46:12.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:12.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:12.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:12.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:46:12.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:46:12.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:12.619 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:46:12.619 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:46:12.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:12.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:13.033 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-03 02:46:13.506 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-03 02:46:13.979 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-03 02:46:14.451 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-03 02:46:14.925 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-03 02:46:15.398 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-03 02:46:15.870 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-03 02:46:16.343 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-03 02:46:16.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:16.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:16.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:16.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:16.661 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:46:16.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:16.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:16.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:46:16.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:16.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:16.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:16.682 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:46:16.682 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:46:16.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:16.732 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:46:16.732 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:46:16.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:16.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:16.815 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-03 02:46:17.288 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-03 02:46:17.762 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-03 02:46:18.234 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-03 02:46:18.707 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-03 02:46:19.180 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-03 02:46:19.652 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-03 02:46:20.125 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-03 02:46:20.598 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-03 02:46:20.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:20.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:20.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:20.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:20.936 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:46:20.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:20.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:20.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:46:20.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:20.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:20.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:20.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:46:20.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:46:21.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:21.013 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:46:21.013 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:46:21.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:21.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:21.070 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-03 02:46:21.543 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-03 02:46:22.016 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-03 02:46:22.488 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-03 02:46:22.960 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-03 02:46:23.434 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-03 02:46:23.907 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-03 02:46:24.379 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-03 02:46:24.851 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-03 02:46:25.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:25.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:25.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:25.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:25.208 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:46:25.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:25.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:25.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:46:25.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:25.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:25.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:25.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:46:25.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:46:25.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:25.281 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:46:25.281 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:46:25.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:25.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:25.324 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-03 02:46:25.796 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-03 02:46:26.269 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-03 02:46:26.742 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-03 02:46:27.215 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-03 02:46:27.687 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-03 02:46:28.159 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-03 02:46:28.632 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-03 02:46:29.104 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-03 02:46:29.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:29.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:29.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:29.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:29.484 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:46:29.484 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=15792 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:46:29.484 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=15792 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:46:29.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:29.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:29.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:46:29.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:29.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:29.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:29.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:46:29.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:46:29.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:29.552 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:46:29.552 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:46:29.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:29.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:29.575 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-03 02:46:30.049 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-03 02:46:30.521 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-03 02:46:30.994 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-03 02:46:31.467 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-03 02:46:31.940 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-03 02:46:32.412 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-03 02:46:32.884 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-03 02:46:33.357 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-03 02:46:33.830 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-03 02:46:33.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:33.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:33.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:33.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:33.917 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:46:33.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:33.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:33.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:46:33.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:33.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:33.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:33.936 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:46:33.936 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:46:33.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:33.988 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:46:33.988 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:46:33.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:33.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:34.303 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-03 02:46:34.776 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-03 02:46:35.248 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-03 02:46:35.721 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-03 02:46:36.194 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-03 02:46:36.666 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-03 02:46:37.140 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-03 02:46:37.612 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-03 02:46:38.085 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-03 02:46:38.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:38.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:38.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:38.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:38.190 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:46:38.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:38.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:38.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:46:38.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:38.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:38.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:38.212 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:46:38.212 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:46:38.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:38.263 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:46:38.263 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:46:38.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:38.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:38.558 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-03 02:46:39.030 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-03 02:46:39.503 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-03 02:46:39.976 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-03 02:46:40.449 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-03 02:46:40.921 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-03 02:46:41.395 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-03 02:46:41.867 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-03 02:46:42.340 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-03 02:46:42.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:42.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:42.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:42.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:42.463 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:46:42.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:42.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:42.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:46:42.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:42.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:42.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:42.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:46:42.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:46:42.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:42.539 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:46:42.539 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:46:42.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:42.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:42.813 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-03 02:46:43.285 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-03 02:46:43.758 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-03 02:46:44.231 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-03 02:46:44.704 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-03 02:46:45.176 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-03 02:46:45.649 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-03 02:46:46.122 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-03 02:46:46.595 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-03 02:46:46.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:46.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:46.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:46.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:46.737 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:46:46.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:46:46.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:46:46.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:46:46.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:46:46.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:46:46.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:46:46.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:46:46.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:46:46.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:46:46.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:46:46.746 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:46:46.746 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19517 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:46:46.746 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19517 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:46:46.746 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19517 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:46:46.746 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19517 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:46:46.746 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19517 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:46:46.746 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=19517 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:46:51.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:46:51.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:46:51.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:46:51.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:46:51.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:46:51.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:46:51.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:46:51.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:46:51.761 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:46:51.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:46:51.762 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:46:51.766 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:46:51.766 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:46:51.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:46:51.766 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:46:51.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:46:51.767 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:46:51.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:46:51.767 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:46:51.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:46:51.770 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:46:51.771 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:46:51.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:46:51.771 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:46:51.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:46:51.772 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:46:51.772 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:46:51.772 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:46:51.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:46:51.774 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:46:51.774 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:46:51.774 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:46:51.774 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:46:51.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:46:51.774 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:46:51.774 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:46:51.774 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:46:51.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:46:51.779 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:46:51.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:46:51.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:46:51.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:46:51.779 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:46:51.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:46:51.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:46:51.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:46:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:46:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:46:51.780 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:46:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:46:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:46:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:46:51.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:46:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:46:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:46:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:46:51.780 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:46:51.780 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:46:51.780 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:46:51.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:46:51.780 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:46:51.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:46:51.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:46:51.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:46:51.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:46:51.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:46:51.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:46:51.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:46:51.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:46:51.782 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:46:51.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:46:51.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:46:51.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:46:56.789 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:46:56.789 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:46:56.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:46:56.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:46:56.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:46:56.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:46:56.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:46:56.797 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:46:56.797 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:46:56.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:46:56.798 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:46:56.802 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:46:56.803 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:46:56.803 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:46:56.803 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:46:56.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:46:56.803 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:46:56.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:46:56.804 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:46:56.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:46:56.807 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:46:56.807 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:46:56.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:46:56.808 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:46:56.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:46:56.808 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:46:56.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:46:56.808 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:46:56.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:46:56.811 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:46:56.811 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:46:56.811 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:46:56.811 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:46:56.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:46:56.811 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:46:56.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:46:56.812 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:46:56.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:46:56.815 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:46:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:46:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:46:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:46:56.815 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:46:56.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:46:56.816 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:46:56.816 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:46:56.816 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:46:56.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:46:56.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:46:56.821 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:46:57.298 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:46:57.347 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:46:57.350 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:46:57.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:57.353 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:46:57.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:57.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:57.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:46:57.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:57.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:57.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:57.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:46:57.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:46:57.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:57.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:57.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:57.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:57.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:57.769 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:46:57.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:46:57.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:46:57.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:46:57.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:46:58.241 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:46:58.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:58.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:58.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:58.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:58.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:58.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:58.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:46:58.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:58.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:58.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:58.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:46:58.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:46:58.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:58.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:58.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:58.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:58.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:58.714 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:46:58.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:46:58.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:46:58.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:46:58.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:46:59.187 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:46:59.659 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:46:59.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:46:59.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:46:59.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:46:59.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:46:59.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:59.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:59.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:59.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:59.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:46:59.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:46:59.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:46:59.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:59.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:59.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:59.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:46:59.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:46:59.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:46:59.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:46:59.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:46:59.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:46:59.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:00.132 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:47:00.604 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:47:00.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:47:00.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:47:00.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:47:00.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:47:01.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:01.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:01.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:01.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:01.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:01.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:01.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:01.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:01.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:01.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:01.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:01.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:01.076 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:47:01.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:01.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:01.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:01.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:01.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:01.548 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:47:01.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:47:01.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:47:01.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:47:01.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:47:02.021 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:47:02.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:02.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:02.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:02.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:02.493 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:47:02.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:02.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:02.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:02.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:02.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:02.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:02.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:02.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:02.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:02.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:02.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:02.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:02.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:02.965 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:47:03.437 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:47:03.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:03.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:03.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:03.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:03.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:03.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:03.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:03.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:03.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:03.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:03.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:03.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:03.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:03.628 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:03.628 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 02:47:03.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:03.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:03.910 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:47:04.383 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:47:04.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:04.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:04.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:04.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:04.583 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:04.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:04.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:04.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:04.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:04.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:04.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:04.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:04.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:04.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:04.652 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:04.652 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-03 02:47:04.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:04.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:04.859 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:47:05.331 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:47:05.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:05.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:05.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:05.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:05.610 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:05.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:05.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:05.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:05.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:05.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:05.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:05.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:05.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:05.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:47:05.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:05.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:05.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:05.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:05.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:05.804 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:47:06.278 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:47:06.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:06.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:06.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:06.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:06.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:06.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:06.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:06.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:06.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:06.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:06.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:06.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:06.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:06.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:06.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:06.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:06.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:06.750 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:47:07.221 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:47:07.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:07.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:07.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:07.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:07.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:07.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:07.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:07.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:07.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:07.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:07.678 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:07.678 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:07.694 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:47:07.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:47:07.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:07.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:07.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:07.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:07.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:08.167 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:47:08.640 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:47:09.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:09.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:09.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:09.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:09.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:09.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:09.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:09.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:09.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:09.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:09.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:09.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:09.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:09.112 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:09.112 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:47:09.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:09.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:09.113 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:47:09.585 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:47:10.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:10.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:10.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:10.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:10.008 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:10.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:10.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:10.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:10.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:10.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:10.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:10.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:10.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:10.057 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:47:10.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:10.079 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:10.079 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:47:10.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:10.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:10.530 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:47:11.003 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:47:11.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:11.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:11.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:11.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:11.033 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:11.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:11.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:11.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:11.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:11.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:11.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:11.054 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:11.054 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:11.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:11.107 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:11.107 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:47:11.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:11.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:11.475 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:47:11.948 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:47:12.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:12.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:12.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:12.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:12.106 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:12.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:12.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:12.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:12.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:12.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:12.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:12.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:12.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:12.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:12.167 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:12.168 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:47:12.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:12.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:12.421 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:47:12.893 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:47:13.367 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:47:13.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:13.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:13.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:13.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:13.541 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:13.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:13.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:13.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:13.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:13.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:13.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:13.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:13.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:13.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:13.608 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:13.608 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:47:13.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:13.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:13.839 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:47:14.310 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:47:14.782 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:47:14.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:14.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:14.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:14.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:14.977 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:14.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:14.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:14.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:14.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:14.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:14.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:14.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:14.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:15.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:15.039 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:15.039 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:47:15.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:15.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:15.255 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:47:15.727 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:47:16.200 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:47:16.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:16.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:16.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:16.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:16.413 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:16.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:16.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:16.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:16.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:16.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:16.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:16.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:16.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:16.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:16.477 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:16.477 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:47:16.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:16.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:16.673 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:47:17.146 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:47:17.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:17.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:17.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:17.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:17.541 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:17.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:17.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:17.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:17.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:17.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:17.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:17.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:17.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:17.618 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:47:17.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:17.627 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:17.627 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:47:17.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:17.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:18.091 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:47:18.564 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:47:18.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:18.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:18.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:18.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:18.977 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:18.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:18.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:18.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:18.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:18.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:18.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:18.999 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:18.999 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:19.036 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:47:19.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:19.046 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:19.046 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:47:19.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:19.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:19.510 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:47:19.982 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:47:20.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:20.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:20.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:20.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:20.414 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:20.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:20.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:20.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:20.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:20.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:20.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:20.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:20.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:20.453 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:47:20.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:20.489 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:20.489 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:47:20.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:20.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:20.925 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:47:21.398 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:47:21.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:21.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:21.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:21.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:21.844 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:21.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:47:21.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:47:21.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:47:21.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:47:21.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:47:21.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:47:21.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:47:21.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:47:21.860 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:47:21.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:47:21.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:47:21.861 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5406 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:47:21.861 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5406 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:47:21.861 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:47:21.861 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:47:21.861 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:47:21.861 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:47:21.861 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:47:26.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:47:26.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:47:26.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:47:26.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:47:26.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:47:26.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:47:26.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:47:26.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:47:26.872 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:47:26.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:47:26.872 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:47:26.875 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:47:26.875 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:47:26.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:47:26.876 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:47:26.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:47:26.876 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:47:26.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:47:26.876 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:47:26.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:47:26.878 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:47:26.878 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:47:26.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:47:26.878 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:47:26.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:47:26.878 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:47:26.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:47:26.878 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:47:26.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:47:26.880 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:47:26.880 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:47:26.880 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:47:26.880 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:47:26.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:47:26.880 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:47:26.880 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:47:26.880 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:47:26.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:47:26.883 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:47:26.883 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:47:26.883 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:47:26.883 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:47:26.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:47:26.888 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:47:27.364 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:47:27.405 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:47:27.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:27.408 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:47:27.410 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:47:27.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:27.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:27.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:27.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:27.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:27.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:27.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:27.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:27.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:47:27.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:27.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:27.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:27.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:27.835 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:47:27.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:47:27.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:47:27.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:47:27.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:47:28.307 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:47:28.780 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:47:28.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:47:28.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:47:28.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:47:28.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:47:29.250 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:47:29.721 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:47:29.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:47:29.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:47:29.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:47:29.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:47:30.195 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:47:30.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:30.667 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:47:30.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:47:30.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:47:30.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:47:30.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:47:31.140 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:47:31.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:31.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:31.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:31.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:31.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:31.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:31.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:31.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:31.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:31.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:31.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:47:31.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:31.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:31.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:31.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:31.612 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:47:31.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:47:31.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:47:31.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:47:31.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:47:32.085 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:47:32.558 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:47:33.029 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:47:33.502 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:47:33.975 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:47:34.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:34.447 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:47:34.921 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:47:35.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:35.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:35.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:35.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:35.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:35.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:35.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:35.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:35.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:35.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:35.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:35.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:35.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:47:35.141 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:35.141 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:47:35.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:35.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:35.394 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:47:35.867 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:47:36.340 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:47:36.813 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:47:37.286 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:47:37.759 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:47:38.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:38.233 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:47:38.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:38.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:38.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:38.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:38.687 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:38.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:38.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:38.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:38.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:38.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:38.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:38.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:47:38.705 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:38.705 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:47:38.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:38.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:38.706 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:47:39.180 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:47:39.654 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:47:40.127 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:47:40.600 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:47:41.074 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:47:41.547 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:47:41.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:42.020 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:47:42.492 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:47:42.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:42.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:42.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:42.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:42.551 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:42.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:42.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:42.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:42.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:42.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:42.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:42.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:42.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:42.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:47:42.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:42.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:42.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:42.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:42.964 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:47:43.436 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:47:43.909 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:47:44.382 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:47:44.854 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:47:45.327 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:47:45.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:45.800 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:47:46.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:46.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:46.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:46.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:46.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:46.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:46.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:46.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:46.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:46.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:46.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:47:46.272 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:47:46.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:46.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:46.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:46.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:46.743 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:47:47.213 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:47:47.684 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:47:48.158 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:47:48.630 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:47:49.102 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:47:49.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:49.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:49.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:49.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:49.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:49.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:49.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:49.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:49.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:49.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:49.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:49.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:49.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:49.573 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:47:49.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:47:49.601 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:49.601 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:47:49.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:49.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:50.046 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:47:50.520 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:47:50.993 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:47:51.466 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:47:51.939 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:47:52.412 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:47:52.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:52.885 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:47:53.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:53.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:53.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:53.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:53.279 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:53.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:47:53.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:53.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:47:53.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:47:53.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:47:53.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:47:53.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:47:53.307 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:47:53.307 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:47:53.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:53.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:53.357 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:47:53.829 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:47:54.302 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:47:54.773 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:47:55.246 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:47:55.720 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:47:56.192 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 02:47:56.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:56.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:47:56.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:47:56.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:47:56.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:47:56.585 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:47:56.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:47:56.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:47:56.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:47:56.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:47:56.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:47:56.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:47:56.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:47:56.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:47:56.598 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:47:56.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:47:56.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:47:56.598 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:47:56.598 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:47:56.598 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:47:56.598 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:47:56.598 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:47:56.598 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:47:56.598 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:01.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:48:01.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:48:01.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:48:01.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:48:01.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:48:01.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:48:01.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:48:01.606 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:48:01.606 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:48:01.606 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:48:01.607 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:48:01.607 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:48:01.607 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:48:01.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:48:01.608 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:48:01.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:48:01.608 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:48:01.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:48:01.608 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:48:01.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:48:01.609 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:48:01.609 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:48:01.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:48:01.609 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:48:01.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:48:01.609 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:48:01.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:48:01.609 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:48:01.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:48:01.610 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:48:01.610 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:48:01.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:48:01.610 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:48:01.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:48:01.610 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:48:01.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:48:01.610 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:48:01.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:48:01.612 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:48:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:48:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:48:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:48:01.612 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:48:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:48:01.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:48:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:48:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:48:01.612 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:48:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:01.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:01.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:48:01.613 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:48:01.613 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:48:01.613 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:01.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:01.617 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:48:02.094 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:48:02.143 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:48:02.145 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:48:02.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:02.147 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:48:02.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:02.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:02.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:02.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:02.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:02.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:02.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:02.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:02.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:02.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:02.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:02.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:02.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:02.564 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:48:02.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:48:02.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:48:02.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:48:02.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:48:03.037 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:48:03.510 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:48:03.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:48:03.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:48:03.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:48:03.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:48:03.980 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:48:04.451 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:48:04.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:48:04.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:48:04.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:48:04.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:48:04.924 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:48:05.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:05.398 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:48:05.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:48:05.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:48:05.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:48:05.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:48:05.870 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:48:05.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:05.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:05.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:05.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:05.944 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:05.944 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:05.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:05.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:05.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:05.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:05.945 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:05.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:05.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:05.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:05.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:05.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:05.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:06.343 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:48:06.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:48:06.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:48:06.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:48:06.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:48:06.816 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:48:07.288 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:48:07.759 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:48:08.233 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:48:08.706 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:48:08.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:09.180 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:48:09.652 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:48:09.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:09.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:09.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:09.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:09.802 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=1768 tn=2 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:09.802 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=1768 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:09.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:09.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:09.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:09.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:09.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:09.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:09.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:09.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:09.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:09.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:09.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:10.124 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:48:10.595 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:48:11.069 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:48:11.542 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:48:12.014 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:48:12.488 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:48:12.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:12.960 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:48:13.433 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:48:13.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:13.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:13.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:13.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:13.655 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=2600 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:13.655 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=2600 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:13.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:13.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:13.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:13.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:13.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:13.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:13.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:13.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:13.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:13.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:13.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:13.904 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:48:14.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:14.377 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:48:14.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:14.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:14.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:14.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:14.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:14.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:14.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:14.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:14.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:14.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:14.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:14.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:14.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:14.690 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:48:14.690 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:48:14.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:14.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:14.850 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:48:15.323 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:48:15.796 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:48:16.268 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:48:16.742 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:48:17.215 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:48:17.687 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:48:17.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:18.161 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:48:18.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:18.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:18.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:18.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:18.234 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:48:18.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:18.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:18.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:18.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:18.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:18.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:18.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:18.251 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:48:18.251 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:48:18.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:18.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:18.633 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:48:19.106 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:48:19.579 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:48:20.052 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:48:20.527 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:48:21.000 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:48:21.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:21.474 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:48:21.946 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:48:22.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:22.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:22.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:22.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:22.095 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:48:22.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:22.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:22.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:22.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:22.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:22.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:22.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:22.131 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:48:22.131 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:48:22.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:22.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:22.416 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:48:22.890 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:48:23.355 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:48:23.826 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:48:24.300 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:48:24.772 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:48:25.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:25.245 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:48:25.718 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:48:25.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:25.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:25.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:25.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:25.942 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:48:25.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:25.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:25.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:25.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:25.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:25.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:25.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:25.955 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:48:25.955 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:48:25.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:25.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:26.191 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:48:26.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:26.665 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:48:26.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:26.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:26.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:26.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:26.908 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:48:26.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:26.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:26.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:26.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:26.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:26.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:26.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:26.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:26.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:26.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:26.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:26.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:26.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:27.137 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:48:27.610 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:48:28.083 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:48:28.555 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:48:29.026 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:48:29.497 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:48:29.970 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:48:30.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:30.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:30.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:30.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:30.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:30.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:30.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:30.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:30.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:30.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:30.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:30.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:30.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:30.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:30.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:30.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:30.443 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:48:30.915 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 02:48:31.389 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 02:48:31.861 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 02:48:32.333 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 02:48:32.804 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 02:48:33.277 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 02:48:33.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:33.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:33.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:33.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:33.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:33.714 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=6931 tn=7 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:33.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:33.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:33.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:33.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:33.715 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:33.715 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:33.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:33.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:33.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:33.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:33.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:33.750 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 02:48:34.222 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 02:48:34.696 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 02:48:35.168 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 02:48:35.640 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 02:48:36.111 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 02:48:36.585 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 02:48:36.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:37.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:37.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:37.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:37.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:37.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:37.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:37.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:37.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:37.022 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:37.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:37.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:37.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:37.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:37.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:37.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:37.057 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 02:48:37.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:37.529 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 02:48:37.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:37.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:37.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:37.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:37.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:37.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:37.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:37.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:37.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:37.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:37.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:37.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:38.000 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 02:48:38.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:38.037 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:48:38.037 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:48:38.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:38.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:38.473 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 02:48:38.946 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 02:48:39.418 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 02:48:39.892 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 02:48:40.364 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 02:48:40.836 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 02:48:41.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:41.310 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 02:48:41.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:41.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:41.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:41.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:41.700 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:48:41.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:41.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:41.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:41.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:41.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:41.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:41.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:41.728 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:48:41.729 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:48:41.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:41.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:41.783 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 02:48:42.255 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 02:48:42.728 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 02:48:43.200 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 02:48:43.673 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 02:48:44.147 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 02:48:44.619 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 02:48:44.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:45.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:45.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:45.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:45.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:45.013 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:48:45.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:45.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:45.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:45.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:45.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:45.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:45.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:45.040 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:48:45.040 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:48:45.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:45.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:45.093 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 02:48:45.565 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 02:48:46.037 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 02:48:46.511 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 02:48:46.983 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 02:48:47.455 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 02:48:47.929 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 02:48:48.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:48.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:48.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:48.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:48.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:48.318 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:48:48.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:48.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:48.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:48.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:48.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:48.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:48.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:48:48.345 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:48:48.346 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:48:48.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:48.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:48.401 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 02:48:48.874 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 02:48:49.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:49.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:49.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:49.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:49.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:49.267 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:48:49.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:48:49.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:48:49.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:48:49.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:48:49.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:48:49.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:48:49.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:48:49.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:48:49.284 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:48:49.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:48:49.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:48:49.285 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=10291 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:49.285 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=10291 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:49.285 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=10291 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:49.285 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=10291 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:49.285 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=10291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:49.285 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=10291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:49.285 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=10291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:48:54.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:48:54.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:48:54.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:48:54.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:48:54.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:48:54.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:48:54.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:48:54.293 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:48:54.293 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:48:54.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:48:54.294 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:48:54.297 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:48:54.298 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:48:54.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:48:54.298 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:48:54.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:48:54.299 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:48:54.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:48:54.300 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:48:54.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:48:54.301 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:48:54.302 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:48:54.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:48:54.302 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:48:54.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:48:54.302 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:48:54.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:48:54.302 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:48:54.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:48:54.305 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:48:54.305 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:48:54.305 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:48:54.305 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:48:54.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:48:54.305 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:48:54.305 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:48:54.305 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:48:54.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:48:54.308 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:48:54.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:48:54.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:48:54.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:48:54.308 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:48:54.309 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:48:54.309 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:48:54.309 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:54.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:48:54.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:48:54.314 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:48:54.792 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:48:54.832 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:48:54.834 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:48:54.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:48:54.836 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:48:54.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:48:54.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:48:54.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:48:54.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:48:54.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:48:54.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:48:54.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:48:54.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:48:55.259 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:48:55.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:48:55.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:48:55.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:48:55.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:48:55.731 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:48:56.201 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:48:56.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:48:56.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:48:56.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:48:56.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:48:56.672 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:48:57.143 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:48:57.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:48:57.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:48:57.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:48:57.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:48:57.614 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:48:58.085 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:48:58.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:48:58.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:48:58.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:48:58.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:48:58.555 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:48:59.025 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:48:59.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:48:59.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:48:59.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:48:59.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:48:59.497 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:48:59.970 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:49:00.439 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:49:00.909 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:49:01.379 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:49:01.851 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:49:02.321 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:49:02.795 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:49:03.267 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:49:03.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:03.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:03.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:03.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:03.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:03.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:03.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:49:03.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:49:03.622 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:49:03.622 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:49:03.622 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:49:03.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:49:03.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:49:08.627 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:49:08.627 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:49:08.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:49:08.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:49:08.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:49:08.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:49:08.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:49:08.635 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:49:08.635 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:08.635 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:49:08.635 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:49:08.638 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:49:08.638 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:49:08.638 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:49:08.638 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:08.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:49:08.639 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:49:08.639 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:49:08.639 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:49:08.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:08.643 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:49:08.643 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:49:08.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:49:08.643 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:08.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:49:08.643 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:49:08.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:49:08.643 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:49:08.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:08.647 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:49:08.648 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:49:08.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:49:08.648 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:08.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:49:08.648 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:49:08.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:49:08.648 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:49:08.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:08.653 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:49:08.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:08.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:08.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:08.655 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:49:08.655 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:49:08.655 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:49:08.655 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:49:08.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:08.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:08.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:08.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:49:08.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:08.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:08.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:08.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:08.660 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:49:09.135 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:49:09.187 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:49:09.189 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:49:09.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:09.192 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:49:09.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:09.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:09.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:09.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:09.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:09.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:09.196 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:09.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:09.607 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:49:09.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:09.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:09.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:09.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:10.078 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:49:10.549 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:49:10.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:10.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:10.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:10.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:11.020 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:49:11.491 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:49:11.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:11.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:11.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:11.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:11.960 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:49:12.431 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:49:12.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:12.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:12.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:12.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:12.903 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:49:13.374 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:49:13.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:13.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:13.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:13.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:13.844 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:49:14.313 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:49:14.781 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:49:15.251 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:49:15.723 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:49:16.194 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:49:16.664 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:49:17.135 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:49:17.605 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:49:17.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:17.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:17.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:17.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:17.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:17.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:17.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:49:17.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:49:17.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:49:17.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:49:17.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:49:17.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:49:17.960 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:49:17.960 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2017 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:49:17.960 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2017 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:49:17.960 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2017 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:49:17.960 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2017 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:49:17.960 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2017 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:49:17.960 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2017 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:49:22.965 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:49:22.965 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:49:22.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:49:22.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:49:22.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:49:22.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:49:22.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:49:22.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:49:22.975 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:22.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:49:22.975 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:49:22.978 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:49:22.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:49:22.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:49:22.979 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:22.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:49:22.979 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:49:22.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:49:22.979 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:49:22.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:22.982 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:49:22.982 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:49:22.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:49:22.982 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:22.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:49:22.982 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:49:22.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:49:22.982 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:49:22.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:22.984 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:49:22.984 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:49:22.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:49:22.984 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:22.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:49:22.985 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:49:22.985 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:49:22.985 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:49:22.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:22.989 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:49:22.989 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:49:22.990 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:49:22.990 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:49:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:22.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:49:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:22.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:22.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:22.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:22.994 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:49:23.472 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:49:23.519 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:49:23.521 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:49:23.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:23.523 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:49:23.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:23.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:23.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:23.944 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:49:23.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:23.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:23.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:23.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:24.418 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:49:24.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:24.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:24.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:24.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:24.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:24.890 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:49:24.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:24.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:24.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:24.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:25.361 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:49:25.833 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:49:25.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:25.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:25.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:25.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:26.305 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:49:26.775 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:49:26.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:26.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:26.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:26.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:27.246 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:49:27.717 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:49:27.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:27.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:27.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:27.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:28.188 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:49:28.659 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:49:29.130 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:49:29.603 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:49:30.076 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:49:30.548 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:49:31.019 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:49:31.492 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:49:31.965 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:49:32.437 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:49:32.907 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:49:33.378 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:49:33.849 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:49:34.320 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:49:34.794 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:49:35.266 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:49:35.738 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:49:36.209 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:49:36.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:36.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:36.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:36.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:36.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:36.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:36.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:49:36.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:49:36.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:49:36.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:49:36.336 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:49:36.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:49:36.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:49:41.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:49:41.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:49:41.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:49:41.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:49:41.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:49:41.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:49:41.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:49:41.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:49:41.354 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:41.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:49:41.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:49:41.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:49:41.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:49:41.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:49:41.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:41.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:49:41.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:49:41.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:49:41.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:49:41.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:41.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:49:41.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:49:41.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:49:41.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:41.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:49:41.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:49:41.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:49:41.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:49:41.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:41.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:49:41.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:49:41.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:49:41.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:41.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:49:41.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:49:41.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:49:41.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:49:41.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:41.367 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:49:41.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:49:41.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:49:41.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:49:41.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:49:41.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:49:41.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:49:41.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:49:41.368 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:49:41.368 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:49:41.368 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:41.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:41.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:41.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:41.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:41.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:41.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:41.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:41.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:41.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:41.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:41.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:41.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:41.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:41.373 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:49:41.850 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:49:41.882 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:49:41.882 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:49:41.883 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:49:41.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:41.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:41.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:41.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:41.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:41.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:41.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:41.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:41.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:42.322 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:49:42.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:42.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:42.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:42.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:42.794 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:49:42.893 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:49:43.266 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:49:43.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:43.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:43.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:43.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:43.401 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:49:43.739 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:49:43.941 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:49:44.211 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:49:44.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:44.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:44.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:44.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:44.685 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:49:45.157 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:49:45.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:45.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:45.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:45.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:45.629 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:49:45.956 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:49:46.100 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:49:46.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:46.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:46.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:46.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:46.464 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:49:46.571 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:49:47.007 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:49:47.044 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:49:47.517 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:49:47.529 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:49:47.989 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:49:48.462 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:49:48.934 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:49:49.406 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:49:49.544 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:49:49.880 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:49:50.352 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:49:50.824 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:49:51.295 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:49:51.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:51.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:51.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:51.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:51.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:51.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:51.589 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:49:51.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:49:51.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:49:51.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:49:51.589 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:49:51.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:49:51.590 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:49:51.590 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2208 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:49:51.590 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2208 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:49:51.590 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2208 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:49:51.590 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2208 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:49:51.590 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2208 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:49:51.591 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2208 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:49:51.591 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:49:56.591 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:49:56.591 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:49:56.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:49:56.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:49:56.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:49:56.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:49:56.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:49:56.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:49:56.617 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:56.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:49:56.617 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:49:56.622 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:49:56.622 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:49:56.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:49:56.623 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:56.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:49:56.625 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:49:56.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:49:56.626 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:49:56.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:56.629 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:49:56.629 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:49:56.630 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:49:56.630 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:56.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:49:56.631 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:49:56.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:49:56.631 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:49:56.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:56.634 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:49:56.635 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:49:56.636 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:49:56.636 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:49:56.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:49:56.637 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:49:56.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:49:56.637 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:49:56.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:56.643 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:49:56.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:49:56.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:49:56.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:49:56.643 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:49:56.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:49:56.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:49:56.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:49:56.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:49:56.644 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:49:56.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:56.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:56.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:56.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:56.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:56.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:56.644 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:49:56.644 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:49:56.644 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:49:56.645 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:49:56.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:56.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:56.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:56.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:49:56.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:56.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:56.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:56.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:56.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:56.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:56.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:56.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:56.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:56.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:56.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:56.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:56.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:56.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:56.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:56.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:56.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:49:56.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:56.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:56.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:56.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:49:56.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:56.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:56.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:49:56.649 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:49:57.127 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:49:57.173 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:49:57.176 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:49:57.177 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:49:57.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:57.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:57.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:57.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:57.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:57.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:57.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:57.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:57.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:57.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:57.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:57.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:57.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:57.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:57.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:57.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:57.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:57.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:57.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:57.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:57.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:57.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:57.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:57.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:57.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:57.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:57.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:57.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:57.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:57.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:57.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:57.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:57.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:57.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:57.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:57.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:57.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:57.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:57.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:57.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:57.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:57.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:57.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:57.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:57.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:57.599 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:49:57.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:57.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:57.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:57.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:57.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:57.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:57.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:57.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:57.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:57.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:57.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:57.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:57.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:57.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:57.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:57.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:57.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:57.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:57.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:57.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:57.831 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:57.831 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:57.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:57.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:57.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:57.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:57.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.068 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:49:58.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:58.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.082 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:58.082 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:58.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:58.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:58.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:58.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:58.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:58.155 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:49:58.155 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 02:49:58.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.160 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:49:58.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:58.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:58.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:58.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:58.209 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:49:58.209 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-03 02:49:58.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.220 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:49:58.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:58.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:58.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:58.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:58.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:58.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:58.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:58.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:58.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:58.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:58.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:58.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:58.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:49:58.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:58.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:58.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:58.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:58.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:58.437 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:49:58.437 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:49:58.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.449 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:49:58.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:58.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:58.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:58.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:58.489 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:49:58.489 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:49:58.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.502 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:49:58.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:58.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:58.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:58.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:58.535 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:49:58.537 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:49:58.537 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:49:58.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.597 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:49:58.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:58.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.617 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:58.617 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:58.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:58.621 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:49:58.621 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:49:58.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:58.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:58.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:58.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:58.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:58.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.855 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:49:58.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:58.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:58.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:58.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:58.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:58.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:58.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:58.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:58.911 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:49:58.911 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:49:58.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:58.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.005 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:49:59.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:59.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:59.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:59.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:59.117 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:49:59.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:59.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:59.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:59.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:59.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:59.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:59.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:59.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:59.194 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:49:59.194 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:49:59.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:59.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:59.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:59.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:59.362 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:49:59.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:59.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:59.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:59.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:59.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:59.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:59.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:59.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:59.429 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:49:59.429 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:49:59.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.478 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:49:59.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:59.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:59.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:59.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:59.622 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:49:59.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:59.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:59.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:59.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:59.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:59.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:59.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:59.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:49:59.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:49:59.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:49:59.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:49:59.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:59.667 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:49:59.667 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:49:59.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:59.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:49:59.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:59.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:59.874 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:49:59.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:49:59.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:49:59.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:49:59.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:49:59.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:49:59.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:49:59.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:49:59.949 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:49:59.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:49:59.957 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:49:59.957 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:49:59.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:49:59.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:50:00.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:50:00.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:50:00.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:50:00.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:50:00.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:50:00.139 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:50:00.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:50:00.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:50:00.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:50:00.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:50:00.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:50:00.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:50:00.158 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:50:00.158 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:50:00.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:50:00.188 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:50:00.188 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:50:00.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:50:00.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:50:00.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:50:00.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:50:00.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:50:00.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:50:00.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:50:00.384 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:50:00.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:00.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:00.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:00.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:00.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:00.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:00.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:00.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:00.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:50:00.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:50:00.396 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:50:00.396 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=813 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:00.396 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=813 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:00.396 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=813 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:00.396 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=813 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:00.396 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=813 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:00.396 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=813 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:00.396 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=813 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:05.404 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:50:05.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:50:05.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:05.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:05.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:05.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:05.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:05.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:50:05.415 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:05.415 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:50:05.415 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:50:05.418 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:50:05.419 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:50:05.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:50:05.419 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:05.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:05.420 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:50:05.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:50:05.420 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:50:05.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:05.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:50:05.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:50:05.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:50:05.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:05.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:05.422 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:50:05.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:50:05.423 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:50:05.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:05.426 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:50:05.427 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:50:05.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:50:05.427 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:05.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:05.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:50:05.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:50:05.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:50:05.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:05.433 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:50:05.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:50:05.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:50:05.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:50:05.433 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:50:05.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:50:05.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:50:05.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:50:05.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:05.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:50:05.434 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:50:05.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:05.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:05.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:05.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:05.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:05.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:05.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:05.434 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:50:05.434 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:50:05.434 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:50:05.435 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:50:05.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:05.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:05.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:05.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:50:05.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:05.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:05.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:05.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:05.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:05.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:05.439 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:50:05.916 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:50:05.966 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:50:05.969 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:50:05.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:50:05.970 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:50:05.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:50:05.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:50:05.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:50:05.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:50:05.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:50:05.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:50:05.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:50:05.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:50:06.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 02:50:06.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:50:06.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:50:06.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:50:06.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:50:06.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:50:06.388 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:50:06.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:06.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:06.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:06.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:06.860 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:50:07.333 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:50:07.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:07.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:07.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:07.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:07.806 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:50:08.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:50:08.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:50:08.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:08.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:08.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:08.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:08.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:08.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:08.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:50:08.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:50:08.083 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:50:08.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:08.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:08.083 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=572 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:08.084 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=572 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:08.084 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=572 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:08.084 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=572 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:08.084 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=572 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:08.084 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=572 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:08.084 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=572 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:13.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:50:13.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:50:13.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:13.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:13.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:13.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:13.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:13.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:50:13.099 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:13.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:50:13.100 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:50:13.104 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:50:13.104 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:50:13.104 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:50:13.105 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:13.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:13.106 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:50:13.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:50:13.106 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:50:13.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:13.108 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:50:13.109 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:50:13.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:50:13.109 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:13.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:13.109 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:50:13.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:50:13.109 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:50:13.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:13.112 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:50:13.112 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:50:13.113 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:50:13.113 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:13.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:13.113 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:50:13.113 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:50:13.113 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:50:13.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:13.118 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:50:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:50:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:50:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:50:13.119 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:50:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:50:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:50:13.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:50:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:50:13.119 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:50:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:13.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:13.120 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:50:13.120 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:50:13.120 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:50:13.120 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:50:13.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:13.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:13.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:13.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:13.122 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:50:13.122 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:50:13.122 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:50:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:13.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:18.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:50:18.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:50:18.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:18.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:18.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:18.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:18.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:18.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:50:18.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:18.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:50:18.137 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:50:18.139 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:50:18.139 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:50:18.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:50:18.140 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:18.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:18.140 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:50:18.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:50:18.140 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:50:18.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:18.144 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:50:18.144 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:50:18.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:50:18.144 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:18.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:18.145 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:50:18.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:50:18.145 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:50:18.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:18.148 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:50:18.149 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:50:18.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:50:18.149 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:18.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:18.149 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:50:18.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:50:18.149 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:50:18.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:18.154 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:50:18.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:18.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:18.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:18.156 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:50:18.156 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:50:18.156 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:50:18.156 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:50:18.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:18.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:18.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:18.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:50:18.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:18.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:18.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:18.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:18.161 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:50:18.632 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:50:18.690 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:50:18.691 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:50:18.692 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:50:18.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:50:19.104 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:50:19.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:19.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:19.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:19.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:19.578 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:50:20.051 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:50:20.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:20.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:20.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:20.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:20.522 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:50:20.996 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:50:21.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:21.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:21.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:21.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:21.469 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:50:21.940 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:50:22.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:22.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:22.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:22.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:22.425 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:50:22.897 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:50:23.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:23.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:23.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:23.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:23.372 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:50:23.844 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:50:24.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:24.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:24.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:24.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:24.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:24.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:24.181 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:50:24.181 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:50:24.181 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:50:24.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:24.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:24.181 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1299 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:24.181 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1299 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:24.181 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1299 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:24.181 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1299 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:24.181 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1299 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:24.181 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1299 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:24.181 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1299 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:50:29.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:50:29.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:50:29.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:29.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:29.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:29.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:29.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:29.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:50:29.196 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:29.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:50:29.197 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:50:29.200 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:50:29.200 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:50:29.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:50:29.200 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:29.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:29.201 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:50:29.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:50:29.201 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:50:29.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:29.202 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:50:29.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:50:29.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:50:29.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:29.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:29.203 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:50:29.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:50:29.203 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:50:29.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:29.205 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:50:29.205 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:50:29.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:50:29.205 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:29.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:29.205 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:50:29.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:50:29.205 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:50:29.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:50:29.208 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:50:29.208 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:50:29.208 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:29.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:29.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:29.213 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:50:29.691 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:50:29.721 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:50:29.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:50:29.723 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:50:29.724 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:50:30.163 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:50:30.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:30.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:30.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:30.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:30.638 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:50:31.110 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:50:31.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:31.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:31.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:31.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:31.586 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:50:32.058 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:50:32.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:32.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:32.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:32.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:32.532 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:50:33.004 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:50:33.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:33.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:33.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:33.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:33.475 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:50:33.946 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:50:34.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:34.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:34.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:34.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:34.417 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:50:34.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:34.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:34.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:34.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:34.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:34.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:34.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:50:34.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:50:34.733 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:50:34.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:34.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:39.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:50:39.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:50:39.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:39.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:39.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:39.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:39.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:39.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:50:39.749 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:39.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:50:39.749 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:50:39.752 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:50:39.753 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:50:39.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:50:39.753 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:39.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:39.754 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:50:39.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:50:39.754 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:50:39.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:39.755 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:50:39.755 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:50:39.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:50:39.755 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:39.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:39.755 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:50:39.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:50:39.755 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:50:39.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:39.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:50:39.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:50:39.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:50:39.757 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:39.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:39.758 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:50:39.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:50:39.758 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:50:39.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:39.760 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:50:39.760 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:50:39.760 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:50:39.760 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:50:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:39.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:39.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:50:39.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:50:39.761 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:50:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:44.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:50:44.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:50:44.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:44.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:44.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:44.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:44.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:50:44.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:50:44.779 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:44.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:50:44.780 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:50:44.784 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:50:44.784 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:50:44.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:50:44.785 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:44.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:50:44.785 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:50:44.786 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:50:44.786 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:50:44.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:44.787 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:50:44.788 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:50:44.788 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:50:44.788 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:44.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:50:44.788 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:50:44.788 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:50:44.788 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:50:44.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:44.790 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:50:44.790 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:50:44.790 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:50:44.791 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:50:44.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:50:44.791 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:50:44.791 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:50:44.791 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:50:44.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:50:44.794 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:50:44.794 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:50:44.794 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:50:44.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:50:44.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:50:44.799 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:50:45.277 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:50:45.321 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:50:45.322 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:50:45.323 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:50:45.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:50:45.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:50:45.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:50:45.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:50:45.749 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:50:45.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:45.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:45.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:45.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:46.224 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:50:46.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:50:46.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:50:46.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:50:46.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:50:46.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:50:46.697 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:50:46.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:46.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:46.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:46.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:47.168 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:50:47.638 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:50:47.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:47.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:47.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:47.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:48.111 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:50:48.580 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:50:48.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:48.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:48.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:48.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:49.051 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:50:49.521 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:50:49.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:50:49.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:50:49.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:50:49.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:50:49.995 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:50:50.468 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:50:50.940 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:50:51.413 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:50:51.885 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:50:52.357 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:50:52.828 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:50:53.298 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:50:53.770 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:50:54.241 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:50:54.711 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:50:55.180 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:50:55.652 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:50:56.123 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:50:56.595 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:50:57.066 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:50:57.539 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:50:58.011 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:50:58.483 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:50:58.954 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:50:59.428 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:50:59.900 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:51:00.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:51:00.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:51:00.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:00.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:00.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:00.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:00.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:00.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:00.213 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:51:00.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:51:00.213 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:51:00.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:00.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:00.214 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3333 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:00.214 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3333 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:00.214 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3333 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:00.214 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3333 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:00.214 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3333 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:00.214 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3333 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:00.214 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3333 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:05.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:51:05.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:51:05.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:05.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:05.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:05.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:05.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:05.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:51:05.225 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:05.225 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:51:05.225 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:51:05.229 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:51:05.230 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:51:05.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:51:05.230 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:05.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:05.231 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:51:05.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:51:05.232 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:51:05.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:05.233 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:51:05.233 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:51:05.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:51:05.234 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:05.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:05.234 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:51:05.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:51:05.234 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:51:05.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:05.237 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:51:05.237 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:51:05.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:51:05.237 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:05.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:05.237 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:51:05.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:51:05.237 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:51:05.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:05.240 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:51:05.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:51:05.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:51:05.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:51:05.240 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:51:05.241 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:51:05.241 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:51:05.241 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:05.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:05.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:05.246 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:51:05.724 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:51:05.761 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:51:05.762 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:51:05.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:05.764 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:51:05.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:51:05.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:51:05.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:51:05.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:05.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:51:05.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:51:05.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:51:05.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:51:05.816 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:51:05.818 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:51:05.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:05.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:51:05.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:51:05.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:05.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:06.196 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:51:06.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:06.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:06.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:06.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:06.667 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:51:07.141 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:51:07.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:07.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:07.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:07.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:07.613 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:51:08.086 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:51:08.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:08.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:08.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:08.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:08.559 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:51:09.032 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:51:09.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:09.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:09.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:09.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:09.503 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:51:09.974 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:51:10.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:10.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:10.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:10.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:10.447 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:51:10.920 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:51:11.394 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:51:11.866 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:51:12.339 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:51:12.809 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:51:13.280 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:51:13.753 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:51:13.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:13.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:13.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:51:13.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:51:13.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:13.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:13.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:13.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:13.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:13.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:13.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:51:13.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:51:13.852 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:51:13.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:13.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:13.852 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1860 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:13.852 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:13.852 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:13.853 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:13.853 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:13.853 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:13.853 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:18.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:51:18.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:51:18.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:18.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:18.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:18.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:18.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:18.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:51:18.864 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:18.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:51:18.864 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:51:18.869 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:51:18.869 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:51:18.870 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:51:18.870 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:18.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:18.870 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:51:18.870 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:51:18.870 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:51:18.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:18.874 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:51:18.874 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:51:18.875 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:51:18.875 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:18.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:18.875 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:51:18.875 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:51:18.875 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:51:18.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:18.879 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:51:18.879 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:51:18.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:51:18.879 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:18.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:18.879 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:51:18.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:51:18.879 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:51:18.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:18.885 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:51:18.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:51:18.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:51:18.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:51:18.885 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:51:18.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:51:18.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:51:18.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:18.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:51:18.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:51:18.885 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:51:18.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:18.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:18.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:18.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:18.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:18.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:18.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:18.886 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:51:18.886 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:51:18.886 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:51:18.886 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:51:18.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:18.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:18.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:18.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:18.891 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:51:19.367 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:51:19.423 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:51:19.425 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:51:19.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:19.427 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:51:19.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:51:19.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:51:19.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:51:19.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:19.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:51:19.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:51:19.458 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:51:19.458 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:51:19.505 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:51:19.510 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:51:19.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:19.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:51:19.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:51:19.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:19.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:19.839 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:51:19.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:19.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:19.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:19.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:20.310 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:51:20.781 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:51:20.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:20.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:20.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:20.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:21.254 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:51:21.727 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:51:21.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:21.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:21.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:21.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:22.199 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:51:22.673 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:51:22.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:22.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:22.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:22.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:23.145 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:51:23.618 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:51:23.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:23.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:23.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:23.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:24.091 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:51:24.564 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:51:25.036 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:51:25.507 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:51:25.981 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:51:26.453 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:51:26.926 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:51:27.397 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:51:27.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:27.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:27.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:51:27.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:51:27.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:27.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:27.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:27.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:27.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:27.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:27.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:27.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:27.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:51:27.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:51:27.543 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:51:27.543 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1869 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:27.543 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1869 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:27.544 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1869 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:27.544 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1869 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:27.544 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1869 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:27.544 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1869 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:27.544 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1869 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:27.544 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1870 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:27.544 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1870 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:27.544 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1870 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:32.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:51:32.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:51:32.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:32.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:32.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:32.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:32.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:32.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:51:32.546 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:32.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:51:32.546 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:51:32.547 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:51:32.547 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:51:32.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:51:32.548 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:32.548 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:32.548 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:51:32.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:51:32.548 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:51:32.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:32.549 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:51:32.549 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:51:32.549 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:51:32.549 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:32.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:32.549 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:51:32.549 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:51:32.549 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:51:32.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:32.550 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:51:32.550 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:51:32.550 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:51:32.550 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:32.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:32.550 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:51:32.550 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:51:32.550 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:51:32.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:51:32.552 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:51:32.552 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:51:32.552 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:32.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:32.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:32.557 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:51:33.035 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:51:33.079 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:51:33.081 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:51:33.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:33.084 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:51:33.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:51:33.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:51:33.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:51:33.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:33.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:51:33.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:51:33.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:51:33.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:51:33.127 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:51:33.130 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:51:33.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:33.140 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:51:33.140 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:51:33.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:33.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:33.507 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:51:33.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:33.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:33.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:33.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:33.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:51:33.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:51:33.703 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:51:33.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:33.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:33.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:33.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:33.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:33.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:33.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:33.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:33.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:51:33.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:51:33.709 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:51:33.709 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:38.711 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:51:38.711 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:51:38.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:38.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:38.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:38.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:38.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:38.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:51:38.723 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:38.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:51:38.723 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:51:38.727 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:51:38.727 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:51:38.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:51:38.728 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:38.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:38.728 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:51:38.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:51:38.728 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:51:38.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:38.731 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:51:38.731 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:51:38.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:51:38.731 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:38.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:38.731 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:51:38.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:51:38.731 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:51:38.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:38.734 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:51:38.734 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:51:38.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:51:38.734 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:38.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:38.734 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:51:38.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:51:38.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:51:38.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:38.736 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:51:38.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:51:38.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:51:38.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:51:38.736 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:51:38.737 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:51:38.737 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:51:38.737 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:38.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:38.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:38.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:38.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:38.742 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:51:39.220 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:51:39.261 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:51:39.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:39.264 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:51:39.266 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:51:39.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:51:39.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:51:39.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:51:39.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:39.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:51:39.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:51:39.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:51:39.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:51:39.313 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:51:39.316 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:51:39.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:39.329 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:51:39.329 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:51:39.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:39.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:39.691 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:51:39.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:39.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:39.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:39.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:39.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:51:39.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:51:39.883 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:51:39.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:39.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:39.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:39.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:39.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:39.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:39.892 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:51:39.892 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:51:39.892 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:51:39.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:39.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:39.892 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:39.892 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:39.893 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:39.893 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:39.893 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:39.893 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:39.893 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:51:44.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:51:44.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:51:44.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:44.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:44.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:44.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:44.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:44.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:51:44.901 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:44.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:51:44.901 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:51:44.905 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:51:44.905 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:51:44.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:51:44.905 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:44.905 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:51:44.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:44.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:51:44.906 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:51:44.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:44.909 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:51:44.909 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:51:44.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:51:44.909 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:44.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:44.910 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:51:44.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:51:44.910 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:51:44.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:44.912 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:51:44.912 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:51:44.912 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:51:44.912 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:44.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:44.913 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:51:44.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:51:44.913 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:51:44.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:51:44.916 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:51:44.916 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:51:44.916 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:51:44.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:44.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:44.921 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:51:45.398 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:51:45.443 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:51:45.446 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:51:45.448 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:51:45.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:45.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:51:45.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:51:45.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:51:45.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:45.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:51:45.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:51:45.482 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:51:45.482 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:51:45.490 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:51:45.492 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:51:45.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:45.499 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:51:45.499 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:51:45.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:45.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:45.870 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:51:45.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:45.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:45.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:45.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:46.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:51:46.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:51:46.065 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:51:46.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:46.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:46.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:46.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:46.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:46.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:46.070 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:51:46.070 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:51:46.070 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:51:46.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:46.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:51.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:51:51.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:51:51.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:51.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:51.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:51.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:51.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:51:51.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:51:51.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:51.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:51:51.085 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:51:51.089 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:51:51.090 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:51:51.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:51:51.090 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:51.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:51:51.091 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:51:51.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:51:51.092 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:51:51.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:51.093 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:51:51.093 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:51:51.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:51:51.094 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:51.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:51:51.094 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:51:51.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:51:51.094 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:51:51.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:51.096 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:51:51.097 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:51:51.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:51:51.097 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:51:51.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:51:51.097 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:51:51.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:51:51.097 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:51:51.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:51.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:51.102 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:51:51.102 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:51:51.102 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:51:51.102 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:51:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:51.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:51:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:51.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:51.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:51.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:51:51.106 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:51:51.585 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:51:51.633 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:51:51.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:51.637 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:51:51.639 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:51:51.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:51:51.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:51:51.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:51:51.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:51.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:51:51.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:51:51.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:51:51.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:51:51.676 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:51:51.679 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:51:51.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:51.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:51:51.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:51:51.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:51.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:52.057 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:51:52.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:52.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:52.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:52.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:52.528 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:51:53.002 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:51:53.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:53.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:53.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:53.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:53.474 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:51:53.947 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:51:54.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:54.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:54.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:54.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:54.418 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:51:54.891 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:51:55.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:55.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:55.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:55.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:55.364 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:51:55.836 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:51:56.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:51:56.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:51:56.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:51:56.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:51:56.307 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:51:56.781 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:51:57.253 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:51:57.726 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:51:58.197 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:51:58.670 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:51:59.143 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:51:59.615 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:51:59.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:59.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:59.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:51:59.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:51:59.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:51:59.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:51:59.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:51:59.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:59.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:51:59.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:51:59.718 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:51:59.718 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:51:59.751 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:51:59.755 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:51:59.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:51:59.768 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:51:59.768 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 02:51:59.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:51:59.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:00.088 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:52:00.561 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:52:00.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:00.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:00.800 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:52:00.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:00.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:00.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:00.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:00.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:52:00.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:52:00.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:52:00.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:52:00.805 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:52:00.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:52:00.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:52:05.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:52:05.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:52:05.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:52:05.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:52:05.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:52:05.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:52:05.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:52:05.823 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:52:05.823 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:05.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:52:05.824 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:52:05.831 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:52:05.832 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:52:05.832 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:52:05.832 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:05.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:52:05.833 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:52:05.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:52:05.833 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:52:05.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:05.838 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:52:05.838 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:52:05.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:52:05.839 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:05.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:52:05.839 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:52:05.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:52:05.839 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:52:05.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:05.843 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:52:05.843 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:52:05.843 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:52:05.843 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:05.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:52:05.844 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:52:05.844 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:52:05.844 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:52:05.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:05.849 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:52:05.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:52:05.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:52:05.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:52:05.849 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:52:05.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:52:05.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:52:05.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:52:05.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:05.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:52:05.850 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:52:05.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:05.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:05.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:05.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:05.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:05.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:05.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:05.850 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:52:05.850 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:52:05.850 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:52:05.850 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:52:05.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:05.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:05.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:05.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:52:05.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:05.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:05.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:05.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:05.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:05.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:05.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:05.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:05.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:05.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:05.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:05.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:05.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:05.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:05.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:05.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:05.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:05.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:05.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:05.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:05.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:05.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:05.855 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:52:06.332 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:52:06.381 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:52:06.383 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:52:06.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:06.386 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:52:06.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:06.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:06.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:52:06.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:06.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:52:06.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:52:06.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:52:06.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:52:06.425 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:52:06.428 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:52:06.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:06.439 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:52:06.439 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:52:06.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:06.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:06.804 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:52:06.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:06.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:06.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:06.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:06.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:06.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:06.997 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:52:06.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:06.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:06.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:06.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:07.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:52:07.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:52:07.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:52:07.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:52:07.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:52:07.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:52:07.000 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:52:07.000 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=248 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:12.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:52:12.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:52:12.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:52:12.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:52:12.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:52:12.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:52:12.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:52:12.010 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:52:12.011 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:12.011 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:52:12.011 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:52:12.012 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:52:12.012 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:52:12.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:52:12.012 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:12.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:52:12.012 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:52:12.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:52:12.012 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:52:12.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:12.013 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:52:12.013 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:52:12.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:52:12.013 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:12.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:52:12.013 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:52:12.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:52:12.013 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:52:12.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:12.014 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:52:12.014 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:52:12.014 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:52:12.014 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:12.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:52:12.014 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:52:12.014 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:52:12.014 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:52:12.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:12.016 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:52:12.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:52:12.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:52:12.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:52:12.016 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:52:12.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:52:12.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:52:12.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:12.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:52:12.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:52:12.016 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:52:12.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:12.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:12.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:52:12.017 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:52:12.017 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:52:12.017 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:12.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:12.021 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:52:12.499 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:52:12.543 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:52:12.545 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:52:12.548 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:52:12.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:12.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:12.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:12.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:52:12.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:12.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:52:12.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:52:12.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:52:12.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:52:12.591 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:52:12.594 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:52:12.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:12.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:52:12.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:52:12.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:12.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:12.972 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:52:13.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:13.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:13.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:13.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:13.443 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:52:13.916 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:52:14.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:14.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:14.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:14.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:14.389 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:52:14.861 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:52:15.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:15.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:15.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:15.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:15.332 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:52:15.805 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:52:16.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:16.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:16.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:16.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:16.278 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:52:16.750 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:52:17.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:17.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:17.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:17.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:17.223 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:52:17.696 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:52:18.168 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:52:18.641 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:52:19.114 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:52:19.586 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:52:20.060 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:52:20.532 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:52:20.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:20.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:20.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:20.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:20.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:20.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:20.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:52:20.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:20.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:52:20.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:52:20.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:52:20.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:52:20.670 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:52:20.674 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:52:20.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:20.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:52:20.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:52:20.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:20.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:21.005 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:52:21.478 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:52:21.951 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:52:22.423 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:52:22.894 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:52:23.367 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:52:23.839 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:52:24.311 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:52:24.784 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:52:25.257 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:52:25.729 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:52:26.200 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:52:26.671 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:52:27.142 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:52:27.615 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:52:28.088 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:52:28.560 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:52:28.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:28.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:28.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:28.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:28.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:28.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:28.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:52:28.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:28.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:52:28.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:52:28.712 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:52:28.712 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:52:28.742 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:52:28.746 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:52:28.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:28.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:52:28.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:52:28.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:28.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:29.031 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:52:29.504 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:52:29.976 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:52:30.448 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:52:30.919 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:52:31.393 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:52:31.865 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:52:32.337 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:52:32.808 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:52:33.281 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:52:33.754 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:52:34.226 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:52:34.697 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:52:35.170 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:52:35.643 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:52:36.115 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:52:36.586 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:52:36.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:36.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:36.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:36.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:36.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:36.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:36.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:52:36.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:36.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:52:36.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:52:36.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:52:36.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:52:36.820 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:52:36.823 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:52:36.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:36.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:52:36.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:52:36.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:36.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:37.057 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:52:37.530 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:52:38.003 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:52:38.475 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:52:38.946 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:52:39.419 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:52:39.892 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:52:40.364 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:52:40.838 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:52:41.310 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 02:52:41.782 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 02:52:42.253 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 02:52:42.727 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 02:52:43.199 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 02:52:43.671 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 02:52:44.144 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 02:52:44.617 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 02:52:44.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:44.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:44.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:44.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:44.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:44.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:44.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:44.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:44.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:52:44.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:52:44.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:52:44.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:52:44.859 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:52:44.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:52:44.859 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:52:44.859 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7092 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:44.859 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7092 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:44.859 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7092 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:44.860 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7092 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:44.860 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7092 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:44.860 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7092 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:44.860 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7092 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:49.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:52:49.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:52:49.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:52:49.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:52:49.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:52:49.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:52:49.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:52:49.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:52:49.872 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:49.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:52:49.873 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:52:49.877 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:52:49.878 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:52:49.878 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:52:49.878 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:49.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:52:49.879 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:52:49.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:52:49.880 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:52:49.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:49.882 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:52:49.882 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:52:49.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:52:49.882 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:49.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:52:49.883 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:52:49.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:52:49.883 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:52:49.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:49.885 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:52:49.886 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:52:49.886 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:52:49.886 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:49.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:52:49.886 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:52:49.886 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:52:49.886 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:52:49.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:49.889 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:52:49.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:52:49.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:52:49.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:52:49.889 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:52:49.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:52:49.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:52:49.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:49.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:52:49.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:52:49.889 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:52:49.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:49.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:49.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:52:49.890 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:52:49.890 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:52:49.890 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:49.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:49.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:49.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:49.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:49.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:49.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:49.894 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:52:50.372 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:52:50.419 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:52:50.421 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:52:50.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:50.423 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:52:50.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:50.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:50.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:52:50.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:50.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:52:50.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:52:50.457 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:52:50.457 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:52:50.462 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:52:50.464 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:52:50.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:50.469 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:52:50.470 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:52:50.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:50.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:50.844 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:52:50.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:50.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:50.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:50.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:51.316 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:52:51.790 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:52:51.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:51.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:51.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:51.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:52.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:52.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:52.020 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:52:52.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:52.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:52.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:52.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:52.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:52:52.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:52:52.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:52:52.025 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:52:52.025 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:52:52.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:52:52.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:52:52.025 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=461 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:52.025 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=461 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:52.025 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=461 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:52.025 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=461 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:52.025 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=461 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:52.025 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=461 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:52.026 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=461 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:57.031 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:52:57.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:52:57.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:52:57.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:52:57.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:52:57.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:52:57.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:52:57.041 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:52:57.041 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:57.041 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:52:57.041 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:52:57.046 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:52:57.047 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:52:57.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:52:57.047 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:57.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:52:57.047 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:52:57.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:52:57.047 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:52:57.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:57.051 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:52:57.052 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:52:57.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:52:57.052 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:57.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:52:57.052 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:52:57.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:52:57.052 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:52:57.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:57.055 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:52:57.055 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:52:57.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:52:57.055 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:52:57.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:52:57.056 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:52:57.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:52:57.056 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:52:57.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:57.059 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:52:57.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:52:57.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:52:57.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:52:57.059 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:52:57.060 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:52:57.060 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:52:57.060 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:52:57.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:57.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:52:57.065 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:52:57.543 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:52:57.592 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:52:57.594 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:52:57.595 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:52:57.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:57.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:57.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:57.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:52:57.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:57.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:52:57.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:52:57.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:52:57.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:52:57.636 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:52:57.639 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:52:57.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:52:57.648 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:52:57.648 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:52:57.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:57.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:52:58.015 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:52:58.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:58.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:58.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:58.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:58.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:52:58.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:52:58.209 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:52:58.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:52:58.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:52:58.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:52:58.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:52:58.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:52:58.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:52:58.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:52:58.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:52:58.218 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:52:58.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:52:58.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:52:58.218 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:58.218 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:58.218 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:58.218 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:58.218 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:58.218 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:52:58.218 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:03.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:53:03.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:53:03.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:03.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:03.222 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:03.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:03.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:03.231 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:53:03.231 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:03.231 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:53:03.231 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:53:03.233 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:53:03.234 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:53:03.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:53:03.234 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:03.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:03.235 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:53:03.235 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:53:03.235 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:53:03.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:03.236 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:53:03.236 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:53:03.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:53:03.236 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:03.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:03.236 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:53:03.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:53:03.236 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:53:03.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:03.238 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:53:03.238 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:53:03.238 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:53:03.238 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:03.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:03.238 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:53:03.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:53:03.239 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:53:03.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:53:03.241 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:53:03.241 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:53:03.241 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:03.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:03.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:03.246 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:53:03.725 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:53:03.763 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:53:03.765 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:53:03.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:53:03.767 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:53:03.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:53:03.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:53:03.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:53:03.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:53:03.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:53:03.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:53:03.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:53:03.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:53:03.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:53:03.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:53:03.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:53:03.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:53:03.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:53:04.197 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:53:04.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:04.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:04.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:04.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:04.671 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:53:05.143 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:53:05.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:05.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:05.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:05.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:05.616 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:53:06.087 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:53:06.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:06.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:06.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:06.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:06.559 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:53:07.033 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:53:07.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:07.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:07.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:07.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:07.505 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:53:07.979 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:53:08.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:08.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:08.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:08.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:08.451 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:53:08.923 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:53:09.397 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:53:09.869 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:53:10.342 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:53:10.813 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:53:11.286 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:53:11.759 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:53:11.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:53:11.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:53:11.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:53:11.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:53:11.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:11.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:11.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:11.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:11.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:11.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:11.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:53:11.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:53:11.857 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:53:11.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:11.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:11.857 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1859 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:11.857 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:11.857 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:11.857 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:11.857 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:11.857 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:11.857 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:16.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:53:16.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:53:16.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:16.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:16.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:16.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:16.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:16.868 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:53:16.868 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:16.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:53:16.869 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:53:16.873 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:53:16.873 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:53:16.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:53:16.873 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:16.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:16.874 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:53:16.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:53:16.874 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:53:16.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:16.878 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:53:16.878 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:53:16.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:53:16.878 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:16.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:16.879 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:53:16.879 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:53:16.879 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:53:16.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:16.883 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:53:16.883 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:53:16.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:53:16.883 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:16.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:16.883 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:53:16.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:53:16.884 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:53:16.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:16.888 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:53:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:53:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:53:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:53:16.888 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:53:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:53:16.889 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:53:16.889 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:53:16.889 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:16.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:16.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:16.894 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:53:17.372 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:53:17.417 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:53:17.419 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:53:17.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:53:17.422 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:53:17.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:53:17.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:53:17.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:53:17.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:53:17.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:53:17.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:53:17.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:53:17.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:53:17.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:53:17.471 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:53:17.471 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:53:17.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:53:17.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:53:17.845 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:53:17.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:17.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:17.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:17.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:18.318 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:53:18.791 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:53:18.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:18.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:18.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:18.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:19.263 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:53:19.737 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:53:19.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:19.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:19.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:19.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:20.210 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:53:20.683 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:53:20.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:20.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:20.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:20.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:21.156 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:53:21.628 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:53:21.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:21.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:21.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:21.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:22.102 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:53:22.574 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:53:23.047 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:53:23.520 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:53:23.993 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:53:24.466 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:53:24.939 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:53:25.411 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:53:25.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:53:25.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:53:25.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:53:25.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:53:25.480 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:53:25.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:25.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:25.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:25.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:25.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:25.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:25.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:53:25.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:53:25.501 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:53:25.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:25.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:30.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:53:30.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:53:30.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:30.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:30.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:30.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:30.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:30.513 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:53:30.513 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:30.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:53:30.514 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:53:30.517 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:53:30.517 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:53:30.518 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:53:30.518 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:30.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:30.519 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:53:30.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:53:30.519 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:53:30.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:30.521 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:53:30.521 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:53:30.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:53:30.521 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:30.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:30.522 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:53:30.522 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:53:30.522 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:53:30.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:30.523 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:53:30.523 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:53:30.523 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:53:30.524 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:30.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:30.524 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:53:30.524 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:53:30.524 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:53:30.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:53:30.527 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:53:30.527 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:53:30.527 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:30.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:30.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:30.532 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:53:31.008 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:53:31.054 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:53:31.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:53:31.056 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:53:31.058 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:53:31.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:53:31.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:53:31.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:53:31.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:53:31.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:53:31.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:53:31.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:53:31.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:53:31.480 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:53:31.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:31.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:31.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:31.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:31.951 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:53:32.424 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:53:32.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:32.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:32.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:32.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:32.896 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:53:33.368 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:53:33.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:33.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:33.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:33.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:33.839 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:53:34.313 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:53:34.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:34.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:34.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:34.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:34.785 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:53:35.257 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:53:35.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:35.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:35.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:35.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:35.728 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:53:36.201 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:53:36.674 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:53:37.146 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:53:37.620 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:53:37.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:53:37.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:53:37.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:37.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:37.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:37.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:37.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:37.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:37.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:37.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:37.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:53:37.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:53:37.750 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:53:42.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:53:42.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:53:42.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:42.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:42.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:42.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:42.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:42.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:53:42.769 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:42.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:53:42.770 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:53:42.776 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:53:42.776 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:53:42.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:53:42.776 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:42.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:42.777 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:53:42.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:53:42.777 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:53:42.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:42.781 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:53:42.781 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:53:42.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:53:42.782 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:42.782 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:53:42.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:42.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:53:42.782 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:53:42.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:42.787 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:53:42.787 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:53:42.787 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:53:42.787 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:42.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:42.787 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:53:42.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:53:42.788 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:53:42.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:42.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:53:42.793 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:53:42.793 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:53:42.793 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:42.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:42.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:42.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:42.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:42.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:42.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:42.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:42.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:42.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:42.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:42.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:42.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:42.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:42.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:42.797 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:53:43.275 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:53:43.324 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:53:43.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:53:43.328 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:53:43.331 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:53:43.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:53:43.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:53:43.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:53:43.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:53:43.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:53:43.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:53:43.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:53:43.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:53:43.746 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:53:43.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:43.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:43.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:43.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:44.218 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:53:44.690 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:53:44.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:44.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:44.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:44.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:45.161 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:53:45.635 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:53:45.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:45.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:45.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:45.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:46.107 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:53:46.579 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:53:46.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:46.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:46.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:46.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:47.053 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:53:47.525 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:53:47.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:47.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:47.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:47.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:47.997 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:53:48.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:48.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:48.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:48.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:48.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:48.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:48.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:48.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:48.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:53:48.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:53:48.035 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1132 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:48.035 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:48.035 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:48.035 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:48.036 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:48.036 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:48.036 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:53:48.476 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:53:48.956 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:53:49.435 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:53:49.916 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:53:50.396 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:53:50.875 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:53:51.355 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:53:51.835 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:53:52.315 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:53:52.795 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:53:53.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:53:53.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:53:53.033 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:53:53.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:53:53.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:53:53.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:53.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:53.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:53.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:53.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:53.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:53:53.043 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:53.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:53:53.043 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:53:53.044 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:53:53.044 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:53:53.044 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:53:53.044 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:53.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:53.044 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:53:53.044 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:53:53.044 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:53:53.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:53.045 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:53:53.045 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:53:53.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:53:53.045 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:53.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:53.045 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:53:53.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:53:53.045 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:53:53.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:53.046 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:53:53.046 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:53:53.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:53:53.047 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:53.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:53.047 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:53:53.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:53:53.047 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:53:53.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:53:53.049 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:53:53.049 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:53:53.049 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:53.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:53.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:53.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:53.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:53.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:53.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:53.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:53:53.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:53:53.051 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:53:58.059 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:53:58.059 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:53:58.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:58.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:58.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:58.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:58.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:53:58.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:53:58.069 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:58.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:53:58.069 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:53:58.074 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:53:58.074 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:53:58.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:53:58.074 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:58.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:53:58.074 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:53:58.075 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:53:58.075 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:53:58.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:58.078 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:53:58.079 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:53:58.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:53:58.079 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:58.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:53:58.079 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:53:58.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:53:58.079 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:53:58.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:58.083 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:53:58.083 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:53:58.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:53:58.083 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:53:58.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:53:58.083 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:53:58.084 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:53:58.084 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:53:58.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:58.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:53:58.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:53:58.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:53:58.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:53:58.088 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:53:58.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:53:58.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:53:58.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:58.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:53:58.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:53:58.088 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:53:58.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:58.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:58.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:58.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:58.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:58.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:58.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:58.089 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:53:58.089 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:53:58.089 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:53:58.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:53:58.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:58.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:58.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:58.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:53:58.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:58.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:58.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:58.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:58.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:58.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:53:58.094 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:53:58.571 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:53:58.619 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:53:58.622 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:53:58.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:53:58.625 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:53:58.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:53:58.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:53:58.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:53:58.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:53:58.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:53:58.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:53:58.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:53:58.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:53:59.043 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:53:59.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:53:59.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:53:59.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:53:59.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:53:59.515 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:53:59.988 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:54:00.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:00.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:00.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:00.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:00.461 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:54:00.933 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:54:01.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:01.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:01.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:01.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:01.404 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:54:01.876 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:54:02.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:02.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:02.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:02.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:02.342 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:54:02.805 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:54:03.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:03.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:03.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:03.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:03.270 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:54:03.739 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:54:04.213 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:54:04.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:04.681 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:54:05.146 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:54:05.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:05.612 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:54:06.078 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:54:06.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:06.550 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:54:07.015 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:54:07.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:07.480 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:54:07.947 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:54:08.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:08.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:54:08.412 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:54:08.878 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:54:09.343 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:54:09.812 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:54:10.282 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:54:10.752 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:54:11.222 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:54:11.690 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:54:12.157 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:54:12.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:54:12.626 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:54:13.094 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:54:13.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:13.565 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:54:14.036 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:54:14.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:14.506 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:54:14.976 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:54:15.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:15.445 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:54:15.915 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:54:16.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:16.385 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:54:16.854 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:54:17.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:17.321 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:54:17.788 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:54:18.253 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:54:18.717 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:54:19.182 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:54:19.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:54:19.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:54:19.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:19.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:19.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:19.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:19.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:54:19.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:54:19.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:54:19.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:54:19.341 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:54:19.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:54:19.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:54:24.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:54:24.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:54:24.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:54:24.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:54:24.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:54:24.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:54:24.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:54:24.360 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:54:24.361 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:54:24.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:54:24.361 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:54:24.364 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:54:24.364 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:54:24.364 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:54:24.364 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:54:24.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:54:24.365 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:54:24.365 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:54:24.365 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:54:24.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:24.367 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:54:24.367 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:54:24.367 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:54:24.367 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:54:24.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:54:24.367 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:54:24.367 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:54:24.367 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:54:24.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:24.369 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:54:24.369 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:54:24.370 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:54:24.370 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:54:24.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:54:24.370 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:54:24.370 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:54:24.370 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:54:24.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:24.372 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:54:24.372 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:54:24.373 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:54:24.373 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:24.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:24.377 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:54:24.849 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:54:24.889 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:54:24.889 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:54:24.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:54:24.889 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:54:24.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:54:24.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:54:24.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:54:24.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:24.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:54:24.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:54:24.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:54:24.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:54:24.938 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:54:24.938 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:54:24.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:54:24.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:54:24.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:54:24.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:24.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:25.312 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:54:25.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:25.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:25.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:25.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:25.774 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:54:26.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:54:26.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:26.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:54:26.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:54:26.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:26.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:26.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:26.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:26.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:54:26.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:54:26.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:54:26.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:54:26.232 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:54:26.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:54:26.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:54:26.232 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:26.232 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:26.232 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:26.232 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:26.232 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:26.232 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:26.232 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:31.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:54:31.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:54:31.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:54:31.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:54:31.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:54:31.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:54:31.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:54:31.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:54:31.251 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:54:31.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:54:31.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:54:31.253 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:54:31.253 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:54:31.253 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:54:31.253 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:54:31.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:54:31.253 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:54:31.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:54:31.254 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:54:31.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:31.255 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:54:31.255 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:54:31.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:54:31.255 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:54:31.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:54:31.255 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:54:31.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:54:31.255 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:54:31.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:31.257 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:54:31.257 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:54:31.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:54:31.257 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:54:31.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:54:31.257 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:54:31.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:54:31.257 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:54:31.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:31.259 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:54:31.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:54:31.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:54:31.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:54:31.259 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:54:31.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:54:31.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:54:31.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:54:31.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:31.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:54:31.259 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:54:31.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:54:31.260 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:54:31.260 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:54:31.260 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:31.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:31.265 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:54:31.735 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:54:31.782 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:54:31.784 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:54:31.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:54:31.785 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:54:31.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:54:31.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:54:31.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:54:31.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:31.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:54:31.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:54:31.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:54:31.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:54:31.824 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:54:31.824 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:54:31.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:54:31.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:54:31.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:54:31.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:31.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:32.199 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:54:32.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:32.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:32.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:32.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:32.664 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:54:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 02:54:33.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:33.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:54:33.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:54:33.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:33.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:33.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:33.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:33.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:54:33.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:54:33.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:54:33.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:54:33.119 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:54:33.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:54:33.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:54:33.119 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:33.120 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:33.120 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:33.120 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:33.120 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:33.120 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:33.120 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:33.120 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:54:38.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:54:38.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:54:38.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:54:38.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:54:38.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:54:38.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:54:38.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:54:38.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:54:38.143 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:54:38.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:54:38.143 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:54:38.145 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:54:38.145 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:54:38.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:54:38.146 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:54:38.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:54:38.146 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:54:38.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:54:38.146 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:54:38.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:38.149 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:54:38.149 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:54:38.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:54:38.149 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:54:38.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:54:38.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:54:38.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:54:38.149 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:54:38.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:38.151 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:54:38.151 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:54:38.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:54:38.152 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:54:38.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:54:38.152 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:54:38.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:54:38.152 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:54:38.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:38.155 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:54:38.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:54:38.155 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:54:38.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:54:38.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:54:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:54:38.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:54:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:54:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:54:38.156 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:54:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:38.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:38.156 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:54:38.156 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:54:38.156 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:54:38.156 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:54:38.161 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:54:38.629 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:54:38.681 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:54:38.682 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:54:38.682 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:54:38.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:54:38.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:54:38.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:54:38.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:54:38.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:38.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:54:38.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:54:38.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:54:38.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:54:38.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:54:38.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:54:38.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:54:38.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:38.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:39.097 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:54:39.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:39.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:39.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:39.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:39.568 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:54:40.036 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:54:40.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:40.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:40.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:40.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:40.501 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:54:40.970 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:54:41.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:41.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:41.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:41.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:41.436 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:54:41.903 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:54:42.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:42.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:42.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:42.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:42.374 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:54:42.844 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:54:43.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:54:43.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:54:43.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:54:43.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:54:43.312 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:54:43.780 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:54:44.246 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:54:44.713 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:54:45.183 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:54:45.655 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:54:46.128 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:54:46.601 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:54:47.074 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:54:47.546 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:54:48.019 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:54:48.492 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:54:48.965 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:54:49.438 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:54:49.911 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:54:50.383 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:54:50.857 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:54:51.330 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:54:51.802 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:54:52.275 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:54:52.748 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:54:53.220 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:54:53.691 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:54:53.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:54:53.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:53.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:54:53.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:54:54.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:54:54.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:54:54.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:54:54.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:54.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:54:54.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:54:54.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:54:54.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:54:54.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:54:54.021 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:54:54.021 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 02:54:54.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:54.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:54:54.164 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:54:54.637 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:54:55.109 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:54:55.581 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:54:56.055 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:54:56.527 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:54:57.001 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:54:57.473 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:54:57.946 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:54:58.416 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:54:58.890 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:54:59.362 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:54:59.835 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:55:00.308 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:55:00.781 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:55:01.254 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:55:01.727 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:55:02.200 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:55:02.673 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:55:03.145 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:55:03.618 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 02:55:04.091 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 02:55:04.564 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 02:55:05.036 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 02:55:05.509 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 02:55:05.983 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 02:55:06.455 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 02:55:06.928 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 02:55:07.401 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 02:55:07.874 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 02:55:08.347 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 02:55:08.820 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 02:55:09.293 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 02:55:09.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:55:09.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:55:09.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:55:09.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:55:09.475 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:55:09.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:55:09.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:55:09.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:55:09.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:55:09.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:55:09.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:55:09.496 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:55:09.496 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:55:09.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:55:09.538 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:55:09.538 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-03 02:55:09.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:55:09.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:55:09.765 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 02:55:10.238 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 02:55:10.711 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 02:55:11.183 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 02:55:11.656 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 02:55:12.128 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 02:55:12.600 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 02:55:13.072 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 02:55:13.545 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 02:55:14.018 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 02:55:14.490 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 02:55:14.963 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 02:55:15.436 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 02:55:15.908 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 02:55:16.381 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 02:55:16.854 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 02:55:17.326 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 02:55:17.800 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 02:55:18.272 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 02:55:18.744 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 02:55:19.217 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 02:55:19.690 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 02:55:20.162 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 02:55:20.636 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 02:55:21.108 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 02:55:21.580 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 02:55:22.053 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 02:55:22.526 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 02:55:22.997 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 02:55:23.471 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 02:55:23.944 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 02:55:24.416 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 02:55:24.889 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 02:55:24.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:55:24.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:55:24.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:55:24.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:55:24.949 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:55:24.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:55:24.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:55:24.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:55:24.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:55:24.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:55:24.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:55:24.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:55:24.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:55:24.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:55:24.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:55:24.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:55:24.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:55:24.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:55:24.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:55:25.362 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 02:55:25.834 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 02:55:26.308 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-03 02:55:26.780 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-03 02:55:27.253 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-03 02:55:27.726 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-03 02:55:28.199 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-03 02:55:28.671 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-03 02:55:29.142 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-03 02:55:29.615 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-03 02:55:30.088 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-03 02:55:30.560 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-03 02:55:31.033 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-03 02:55:31.506 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-03 02:55:31.978 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-03 02:55:32.452 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-03 02:55:32.924 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-03 02:55:33.397 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-03 02:55:33.868 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-03 02:55:34.341 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-03 02:55:34.813 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-03 02:55:35.286 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-03 02:55:35.759 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-03 02:55:36.232 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-03 02:55:36.704 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-03 02:55:37.177 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-03 02:55:37.650 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-03 02:55:38.122 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-03 02:55:38.595 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-03 02:55:39.068 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-03 02:55:39.541 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-03 02:55:40.011 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-03 02:55:40.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:55:40.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:55:40.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:55:40.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:55:40.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:55:40.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:55:40.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:55:40.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:55:40.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:55:40.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:55:40.450 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:55:40.450 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:55:40.450 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:55:40.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:55:40.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:55:40.450 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13459 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:55:40.450 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13459 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:55:40.450 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13459 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:55:40.450 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13459 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:55:40.450 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13459 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:55:40.450 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13459 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:55:40.450 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=13459 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:55:45.455 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:55:45.455 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:55:45.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:55:45.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:55:45.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:55:45.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:55:45.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:55:45.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:55:45.464 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:55:45.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:55:45.464 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:55:45.467 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:55:45.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:55:45.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:55:45.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:55:45.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:55:45.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:55:45.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:55:45.469 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:55:45.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:55:45.470 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:55:45.470 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:55:45.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:55:45.470 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:55:45.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:55:45.470 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:55:45.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:55:45.470 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:55:45.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:55:45.471 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:55:45.471 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:55:45.471 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:55:45.471 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:55:45.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:55:45.472 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:55:45.472 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:55:45.472 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:55:45.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:55:45.474 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:55:45.474 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:55:45.474 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:55:45.475 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:55:45.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:55:45.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:55:45.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:55:45.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:55:45.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:55:45.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:55:45.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:55:45.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:55:45.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:55:45.475 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:55:45.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:55:45.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:55:45.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:55:50.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:55:50.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:55:50.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:55:50.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:55:50.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:55:50.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:55:50.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:55:50.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:55:50.493 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:55:50.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:55:50.494 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:55:50.496 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:55:50.497 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:55:50.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:55:50.497 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:55:50.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:55:50.498 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:55:50.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:55:50.499 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:55:50.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:55:50.500 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:55:50.500 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:55:50.500 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:55:50.500 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:55:50.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:55:50.501 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:55:50.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:55:50.501 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:55:50.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:55:50.503 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:55:50.503 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:55:50.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:55:50.503 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:55:50.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:55:50.503 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:55:50.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:55:50.503 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:55:50.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:55:50.507 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:55:50.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:55:50.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:55:50.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:55:50.507 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:55:50.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:55:50.508 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:55:50.508 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:55:50.508 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:55:50.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:55:50.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:55:50.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:55:50.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:55:50.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:55:50.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:55:50.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:55:50.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:55:50.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:55:50.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:55:50.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:55:50.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:55:50.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:55:50.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:55:50.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:55:50.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:55:50.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:55:50.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:55:50.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:55:50.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:55:50.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:55:50.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:55:50.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:55:50.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:55:50.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:55:50.513 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:55:50.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:55:51.045 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:55:51.047 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:55:51.049 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:55:51.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:55:51.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:55:51.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:55:51.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:55:51.089 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:55:51.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:55:51.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:55:51.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:55:51.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:55:51.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:55:51.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:55:51.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:55:51.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:55:51.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:55:51.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:55:51.462 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:55:51.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:55:51.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:55:51.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:55:51.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:55:51.934 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:55:52.405 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:55:52.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:55:52.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:55:52.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:55:52.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:55:52.875 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:55:53.348 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:55:53.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:55:53.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:55:53.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:55:53.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:55:53.821 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:55:54.294 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:55:54.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:55:54.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:55:54.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:55:54.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:55:54.767 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:55:55.240 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:55:55.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:55:55.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:55:55.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:55:55.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:55:55.712 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:55:56.186 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:55:56.659 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:55:57.131 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:55:57.602 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:55:58.075 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:55:58.548 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:55:59.020 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:55:59.494 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:55:59.966 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:56:00.439 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:56:00.910 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:56:01.383 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:56:01.856 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:56:01.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:56:01.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:56:01.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:56:01.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:56:01.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:01.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:01.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:01.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:01.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:56:01.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:56:01.957 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:56:01.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:56:01.957 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:56:01.957 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:56:01.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:56:06.963 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:56:06.963 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:56:06.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:56:06.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:56:06.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:56:06.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:56:06.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:56:06.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:56:06.973 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:56:06.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:56:06.974 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:56:06.978 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:56:06.978 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:56:06.978 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:56:06.978 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:56:06.978 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:56:06.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:56:06.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:56:06.979 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:56:06.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:06.983 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:56:06.983 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:56:06.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:56:06.983 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:56:06.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:56:06.984 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:56:06.984 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:56:06.984 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:56:06.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:06.987 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:56:06.987 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:56:06.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:56:06.987 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:56:06.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:56:06.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:56:06.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:56:06.987 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:56:06.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:06.990 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:56:06.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:56:06.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:56:06.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:56:06.990 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:56:06.991 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:56:06.991 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:56:06.991 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:06.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:06.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:06.996 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:56:07.473 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:56:07.514 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:56:07.516 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:56:07.518 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:56:07.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:56:07.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:56:07.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:56:07.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:56:07.555 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:56:07.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:56:07.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:56:07.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:56:07.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:56:07.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:56:07.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:56:07.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:56:07.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:56:07.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:56:07.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:56:07.946 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:56:07.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:07.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:07.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:07.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:08.417 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:56:08.890 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:56:08.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:08.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:08.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:08.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:09.363 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:56:09.835 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:56:09.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:09.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:09.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:09.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:10.306 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:56:10.779 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:56:10.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:10.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:10.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:10.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:11.252 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:56:11.724 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:56:11.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:11.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:11.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:11.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:12.198 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:56:12.670 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:56:13.143 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:56:13.614 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:56:14.087 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:56:14.560 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:56:15.032 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:56:15.503 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:56:15.974 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:56:16.447 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:56:16.920 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:56:17.392 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:56:17.866 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:56:17.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:56:17.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:56:17.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:56:17.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:56:17.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:17.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:17.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:17.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:17.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:56:17.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:56:17.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:56:17.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:56:17.972 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:56:17.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:56:17.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:56:17.972 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2372 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:56:17.972 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2372 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:56:17.972 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2372 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:56:17.972 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2372 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:56:17.972 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2372 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:56:17.972 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2372 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:56:17.972 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2372 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:56:22.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:56:22.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:56:22.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:56:22.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:56:22.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:56:22.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:56:22.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:56:22.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:56:22.989 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:56:22.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:56:22.989 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:56:22.995 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:56:22.996 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:56:22.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:56:22.996 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:56:22.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:56:22.996 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:56:22.997 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:56:22.997 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:56:22.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:23.000 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:56:23.000 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:56:23.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:56:23.000 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:56:23.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:56:23.000 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:56:23.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:56:23.001 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:56:23.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:23.003 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:56:23.003 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:56:23.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:56:23.003 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:56:23.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:56:23.004 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:56:23.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:56:23.004 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:56:23.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:56:23.007 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:56:23.007 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:56:23.007 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:23.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:23.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:23.012 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:56:23.490 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:56:23.531 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:56:23.533 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:56:23.535 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:56:23.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:56:23.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:56:23.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:56:23.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:56:23.575 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:56:23.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:56:23.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:56:23.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:56:23.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:56:23.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:56:23.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:56:23.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:56:23.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:56:23.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:56:23.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:56:23.961 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:56:24.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:24.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:24.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:24.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:24.433 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:56:24.906 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:56:24.930 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:56:25.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:25.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:25.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:25.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:25.379 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:56:25.852 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:56:26.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:26.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:26.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:26.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:26.324 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:56:26.798 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:56:27.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:27.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:27.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:27.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:27.271 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:56:27.741 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:56:28.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:28.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:28.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:28.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:28.212 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:56:28.686 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:56:29.158 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:56:29.631 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:56:30.104 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:56:30.577 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:56:31.049 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:56:31.520 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:56:31.993 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:56:32.466 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:56:32.938 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:56:33.409 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:56:33.883 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:56:34.355 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:56:34.828 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:56:35.298 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:56:35.772 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:56:36.244 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:56:36.717 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:56:37.190 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:56:37.663 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:56:38.135 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:56:38.609 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:56:39.081 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:56:39.554 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:56:40.027 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:56:40.500 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:56:40.973 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:56:41.446 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:56:41.919 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:56:42.391 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:56:42.865 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:56:43.337 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:56:43.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:56:43.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:56:43.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:56:43.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:56:43.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:43.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:43.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:43.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:43.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:56:43.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:56:43.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:56:43.675 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:56:43.675 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:56:43.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:56:43.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:56:43.676 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4461 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:56:43.676 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4461 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:56:43.676 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4461 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:56:43.676 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4461 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:56:43.676 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4461 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:56:43.676 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4461 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:56:43.677 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4461 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:56:48.678 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:56:48.678 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:56:48.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:56:48.678 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:56:48.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:56:48.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:56:48.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:56:48.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:56:48.688 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:56:48.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:56:48.688 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:56:48.692 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:56:48.692 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:56:48.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:56:48.692 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:56:48.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:56:48.693 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:56:48.693 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:56:48.693 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:56:48.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:48.698 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:56:48.698 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:56:48.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:56:48.698 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:56:48.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:56:48.699 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:56:48.699 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:56:48.699 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:56:48.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:48.703 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:56:48.704 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:56:48.704 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:56:48.704 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:56:48.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:56:48.704 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:56:48.704 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:56:48.704 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:56:48.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:48.710 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:56:48.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:56:48.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:56:48.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:56:48.711 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:56:48.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:56:48.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:56:48.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:48.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:56:48.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:56:48.711 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:56:48.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:48.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:48.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:48.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:48.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:48.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:48.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:48.712 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:56:48.712 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:56:48.712 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:56:48.712 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:56:48.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:48.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:48.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:48.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:48.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:48.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:48.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:48.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:56:48.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:56:48.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:48.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:56:48.717 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:56:49.194 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:56:49.248 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:56:49.250 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:56:49.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:56:49.252 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:56:49.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:56:49.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:56:49.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:56:49.289 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:56:49.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:56:49.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:56:49.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:56:49.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:56:49.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:56:49.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:56:49.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:56:49.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:56:49.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:56:49.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:56:49.667 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:56:49.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:49.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:49.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:49.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:50.138 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:56:50.609 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:56:50.632 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:56:50.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:50.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:50.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:50.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:51.082 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:56:51.555 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:56:51.598 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:56:51.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:51.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:51.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:51.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:52.027 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:56:52.500 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:56:52.557 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:56:52.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:52.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:52.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:52.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:52.964 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:56:53.435 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:56:53.514 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:56:53.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:56:53.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:56:53.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:56:53.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:56:53.906 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:56:54.379 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:56:54.474 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:56:54.852 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:56:55.324 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:56:55.440 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:56:55.798 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:56:56.270 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:56:56.406 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:56:56.743 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:56:57.216 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:56:57.366 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:56:57.689 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:56:58.161 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:56:58.332 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:56:58.632 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:56:59.103 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:56:59.292 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:56:59.576 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:57:00.049 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:57:00.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:00.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:00.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:00.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:00.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:00.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:00.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:00.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:00.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:00.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:00.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:00.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:00.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:57:00.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:57:00.175 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:57:00.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2477 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:00.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2477 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:00.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2477 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:00.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2477 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:00.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2477 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:00.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2477 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:00.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2477 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:05.178 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:57:05.178 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:57:05.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:05.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:05.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:05.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:05.185 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:05.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:57:05.185 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:05.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:57:05.185 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:57:05.189 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:57:05.189 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:57:05.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:57:05.189 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:05.189 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:57:05.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:05.190 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:57:05.190 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:57:05.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:05.193 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:57:05.193 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:57:05.193 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:57:05.193 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:05.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:05.194 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:57:05.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:57:05.194 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:57:05.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:05.197 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:57:05.197 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:57:05.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:57:05.197 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:05.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:05.197 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:57:05.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:57:05.197 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:57:05.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:05.201 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:57:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:57:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:57:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:57:05.201 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:57:05.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:57:05.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:57:05.202 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:57:05.202 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:57:05.202 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:05.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:05.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:05.207 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:57:05.683 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:57:05.729 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:57:05.731 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:57:05.733 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:57:05.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:05.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:05.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:05.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:57:05.767 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:57:05.769 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:57:05.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:05.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:05.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:05.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:57:05.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:57:05.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:05.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:05.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:05.783 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:57:05.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:05.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:06.155 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:57:06.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:06.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:06.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:06.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:06.627 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:57:06.641 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:57:07.100 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:57:07.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:07.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:07.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:07.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:07.573 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:57:08.045 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:57:08.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:08.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:08.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:08.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:08.519 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:57:08.991 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:57:09.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:09.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:09.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:09.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:09.464 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:57:09.937 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:57:10.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:10.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:10.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:10.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:10.410 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:57:10.882 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:57:11.356 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:57:11.828 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:57:12.301 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:57:12.774 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:57:13.247 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:57:13.719 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:57:14.190 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:57:14.663 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:57:15.136 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:57:15.609 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:57:16.082 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:57:16.279 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:57:16.555 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:57:17.027 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:57:17.498 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:57:17.971 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:57:18.444 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:57:18.916 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:57:19.387 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:57:19.861 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:57:20.333 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:57:20.805 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:57:21.276 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:57:21.750 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:57:22.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:22.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:22.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:22.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:22.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:22.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:22.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:22.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:22.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:22.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:22.078 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:57:22.078 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:57:22.078 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:57:22.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:22.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:22.078 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3644 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:22.079 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3644 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:22.079 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3644 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:22.079 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3644 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:22.079 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3644 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:22.079 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3644 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:22.079 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3644 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:22.079 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3644 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:27.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:57:27.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:57:27.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:27.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:27.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:27.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:27.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:27.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:57:27.091 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:27.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:57:27.092 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:57:27.095 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:57:27.095 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:57:27.096 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:57:27.096 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:27.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:27.097 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:57:27.097 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:57:27.097 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:57:27.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:27.099 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:57:27.099 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:57:27.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:57:27.099 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:27.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:27.099 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:57:27.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:57:27.099 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:57:27.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:27.102 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:57:27.102 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:57:27.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:57:27.102 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:27.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:27.102 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:57:27.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:57:27.103 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:57:27.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:27.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:27.107 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:57:27.107 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:57:27.107 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:57:27.107 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:57:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:27.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:57:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:27.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:27.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:27.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:27.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:27.111 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:57:27.589 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:57:27.638 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:57:27.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:27.640 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:57:27.641 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:57:27.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:27.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:27.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:57:27.669 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:57:27.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:27.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:27.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:27.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:57:27.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:57:27.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:27.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:27.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:27.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:27.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:28.061 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:57:28.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:28.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:28.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:28.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:28.532 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:57:28.546 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:57:29.006 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:57:29.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:29.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:29.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:29.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:29.478 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:57:29.950 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:57:30.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:30.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:30.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:30.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:30.423 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:57:30.896 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:57:31.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:31.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:31.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:31.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:31.368 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:57:31.842 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:57:32.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:32.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:32.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:32.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:32.315 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:57:32.787 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:57:33.258 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:57:33.729 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:57:34.202 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:57:34.675 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:57:35.147 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:57:35.618 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:57:36.090 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:57:36.563 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:57:37.035 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:57:37.506 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:57:37.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:37.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:37.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:37.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:37.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:37.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:37.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:37.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:37.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:37.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:37.706 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:57:37.706 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:57:37.706 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:57:37.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:37.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:42.711 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:57:42.711 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:57:42.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:42.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:42.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:42.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:42.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:42.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:57:42.719 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:42.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:57:42.720 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:57:42.723 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:57:42.723 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:57:42.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:57:42.723 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:42.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:42.724 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:57:42.724 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:57:42.724 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:57:42.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:42.725 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:57:42.726 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:57:42.726 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:57:42.726 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:42.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:42.726 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:57:42.726 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:57:42.726 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:57:42.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:42.728 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:57:42.728 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:57:42.728 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:57:42.728 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:42.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:42.729 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:57:42.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:57:42.729 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:57:42.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:57:42.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:57:42.731 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:57:42.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:42.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:42.736 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:57:43.213 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:57:43.260 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:57:43.262 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:57:43.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:43.264 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:57:43.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:43.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:43.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:57:43.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:43.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:43.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:43.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:57:43.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:57:43.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:43.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:43.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:43.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:43.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:43.685 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:57:43.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:43.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:43.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:43.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:43.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:43.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:43.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:57:43.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:43.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:43.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:43.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:57:43.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:57:43.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:43.732 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:57:43.732 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:57:43.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:43.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:43.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:43.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:43.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:43.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:44.157 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:57:44.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:44.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:44.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:44.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:44.416 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:57:44.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:44.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:44.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:57:44.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:44.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:44.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:44.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:57:44.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:57:44.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:44.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:44.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:44.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:44.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:44.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:44.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:44.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:44.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:44.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:44.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:44.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:57:44.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:44.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:44.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:44.617 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:57:44.617 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:57:44.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:44.625 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:57:44.625 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:57:44.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:44.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:44.629 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:57:44.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:44.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:44.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:44.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:45.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:45.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:45.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:45.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:45.021 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:57:45.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:45.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:45.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:45.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:45.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:45.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:45.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:57:45.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:57:45.033 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:57:45.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:45.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:45.033 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:45.033 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:45.033 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:45.033 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:45.033 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:45.033 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:45.033 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:50.038 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:57:50.038 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:57:50.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:50.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:50.038 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:50.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:50.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:50.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:57:50.048 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:50.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:57:50.048 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:57:50.051 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:57:50.051 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:57:50.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:57:50.052 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:50.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:50.052 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:57:50.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:57:50.052 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:57:50.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:50.054 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:57:50.054 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:57:50.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:57:50.054 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:50.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:50.055 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:57:50.055 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:57:50.055 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:57:50.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:50.056 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:57:50.056 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:57:50.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:57:50.056 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:50.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:50.057 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:57:50.057 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:57:50.057 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:57:50.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:50.059 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:57:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:57:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:57:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:57:50.059 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:57:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:57:50.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:57:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:57:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:57:50.059 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:57:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:50.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:57:50.060 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:57:50.060 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:57:50.060 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:50.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:50.064 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:57:50.541 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:57:50.583 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:57:50.586 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:57:50.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:50.588 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:57:50.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:50.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:50.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:57:50.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:50.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:50.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:50.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:57:50.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:57:50.633 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:57:50.637 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 02:57:50.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:50.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:50.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:50.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:50.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:51.014 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:57:51.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:51.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:51.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:51.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:51.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:51.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:51.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:51.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:51.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:51.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:51.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:57:51.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:57:51.040 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:57:51.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:51.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:51.040 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:51.040 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:51.040 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:51.040 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:51.041 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:51.041 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:51.041 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:57:56.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:57:56.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:57:56.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:56.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:56.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:56.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:56.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:57:56.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:57:56.061 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:56.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:57:56.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:57:56.066 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:57:56.067 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:57:56.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:57:56.067 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:56.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:57:56.068 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:57:56.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:57:56.068 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:57:56.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:56.070 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:57:56.071 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:57:56.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:57:56.071 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:56.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:57:56.072 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:57:56.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:57:56.072 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:57:56.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:56.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:57:56.073 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:57:56.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:57:56.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:57:56.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:57:56.074 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:57:56.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:57:56.074 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:57:56.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:57:56.077 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:57:56.077 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:57:56.077 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:56.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:56.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:57:56.082 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:57:56.558 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:57:56.600 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:57:56.602 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:57:56.603 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:57:56.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:56.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:56.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:56.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:57:56.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:56.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:56.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:56.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:57:56.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:57:56.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:56.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:56.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:56.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:56.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:56.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:57.028 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:57:57.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:57.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:57.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:57.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:57.501 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:57:57.974 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:57:58.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:58.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:58.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:58.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:58.447 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:57:58.920 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:57:59.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:57:59.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:57:59.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:57:59.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:57:59.392 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:57:59.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:59.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:59.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:59.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:59.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:57:59.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:57:59.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:57:59.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:59.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:57:59.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:57:59.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:57:59.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:57:59.863 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:57:59.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:57:59.872 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:57:59.872 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 02:57:59.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:57:59.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:00.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:58:00.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:00.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:00.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:00.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:00.333 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:58:00.807 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:58:01.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:01.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:01.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:01.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:01.280 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:58:01.752 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:58:02.225 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:58:02.698 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:58:03.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:58:03.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:03.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:58:03.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:58:03.034 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:58:03.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:58:03.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:58:03.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:58:03.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:03.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:58:03.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:58:03.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:58:03.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:58:03.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:58:03.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:58:03.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:58:03.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:03.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:03.169 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:58:03.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:58:03.640 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:58:04.112 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:58:04.585 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:58:05.057 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:58:05.529 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:58:06.000 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:58:06.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:58:06.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:06.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:58:06.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:58:06.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:58:06.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:58:06.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:58:06.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:06.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:58:06.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:58:06.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:58:06.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:58:06.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:58:06.473 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:58:06.479 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:58:06.480 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:58:06.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:06.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:58:06.947 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:58:07.420 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:58:07.893 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:58:08.365 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:58:08.838 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:58:09.311 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:58:09.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:58:09.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:09.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:58:09.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:58:09.632 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:58:09.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:09.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:09.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:09.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:09.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:58:09.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:58:09.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:58:09.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:58:09.644 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:58:09.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:58:09.644 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:58:09.644 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2930 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:58:09.644 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2930 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:58:09.644 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2930 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:58:09.644 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2930 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:58:09.644 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2930 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:58:09.644 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2930 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:58:09.644 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2930 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:58:14.649 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:58:14.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:58:14.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:58:14.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:58:14.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:58:14.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:58:14.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:58:14.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:58:14.657 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:58:14.658 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:58:14.658 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:58:14.661 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:58:14.662 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:58:14.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:58:14.662 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:58:14.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:58:14.663 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:58:14.664 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:58:14.664 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:58:14.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:14.666 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:58:14.666 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:58:14.666 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:58:14.666 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:58:14.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:58:14.667 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:58:14.667 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:58:14.667 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:58:14.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:14.669 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:58:14.669 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:58:14.669 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:58:14.669 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:58:14.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:58:14.670 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:58:14.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:58:14.670 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:58:14.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:14.673 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:58:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:58:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:58:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:58:14.673 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:58:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:58:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:58:14.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:58:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:58:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:14.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:14.674 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:58:14.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:14.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:14.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:14.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:14.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:14.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:14.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:14.674 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:58:14.674 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:58:14.674 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:58:14.674 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:58:14.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:14.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:14.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:14.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:14.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:14.679 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:58:15.154 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:58:15.202 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:58:15.204 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:58:15.206 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:58:15.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:58:15.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:58:15.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:58:15.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:58:15.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:15.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:58:15.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:58:15.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:58:15.207 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:58:15.626 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:58:15.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:15.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:15.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:15.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:16.097 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:58:16.569 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:58:16.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:16.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:16.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:16.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:17.042 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:58:17.514 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:58:17.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:17.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:17.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:17.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:17.986 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:58:18.459 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:58:18.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:18.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:18.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:18.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:18.932 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:58:19.404 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:58:19.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:19.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:19.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:19.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:19.875 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:58:20.348 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:58:20.821 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:58:21.292 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:58:21.764 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:58:22.234 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:58:22.708 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:58:23.180 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:58:23.652 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:58:24.123 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:58:24.594 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:58:25.067 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:58:25.540 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:58:26.012 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:58:26.483 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:58:26.956 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:58:27.428 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:58:27.901 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:58:28.372 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:58:28.845 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:58:29.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:58:29.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:58:29.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:29.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:29.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:29.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:29.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:58:29.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:58:29.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:58:29.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:58:29.140 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:58:29.140 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:58:29.140 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:58:34.145 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:58:34.145 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:58:34.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:58:34.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:58:34.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:58:34.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:58:34.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:58:34.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:58:34.157 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:58:34.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:58:34.158 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:58:34.163 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:58:34.164 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:58:34.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:58:34.164 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:58:34.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:58:34.165 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:58:34.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:58:34.166 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:58:34.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:34.168 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:58:34.169 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:58:34.169 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:58:34.169 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:58:34.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:58:34.170 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:58:34.171 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:58:34.171 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:58:34.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:34.173 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:58:34.173 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:58:34.173 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:58:34.173 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:58:34.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:58:34.173 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:58:34.173 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:58:34.173 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:58:34.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:34.177 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:58:34.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:58:34.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:34.178 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:58:34.178 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:58:34.178 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:58:34.178 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:58:34.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:58:34.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:34.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:58:34.183 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:58:34.659 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:58:34.707 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:58:34.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:58:34.711 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:58:34.713 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:58:34.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:58:34.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:58:34.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:58:34.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:34.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:58:34.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:58:34.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:58:34.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:58:34.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:58:34.762 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 02:58:34.762 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 02:58:34.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:34.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:35.131 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:58:35.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:35.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:35.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:35.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:35.603 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:58:36.076 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:58:36.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:36.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:36.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:36.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:36.549 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:58:36.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:36.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:58:36.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:58:36.764 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 02:58:36.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:58:36.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:58:36.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:58:36.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:58:36.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:58:36.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:58:37.022 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:58:37.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:37.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:37.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:37.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:37.495 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:58:37.967 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:58:38.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:38.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:38.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:38.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:38.438 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:58:38.911 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:58:39.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:39.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:39.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:39.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:39.384 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:58:39.856 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:58:40.327 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:58:40.800 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:58:41.272 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:58:41.744 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:58:42.215 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:58:42.689 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:58:43.161 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:58:43.633 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:58:44.104 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:58:44.578 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:58:45.050 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:58:45.522 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:58:45.993 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:58:46.467 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:58:46.939 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:58:47.411 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:58:47.882 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:58:48.356 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:58:48.828 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:58:49.300 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:58:49.771 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:58:50.245 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:58:50.717 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:58:51.188 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:58:51.660 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:58:52.133 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:58:52.606 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:58:53.078 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:58:53.552 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:58:54.024 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:58:54.496 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:58:54.968 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:58:55.441 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:58:55.913 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:58:56.386 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 02:58:56.857 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 02:58:57.330 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 02:58:57.820 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 02:58:58.292 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 02:58:58.763 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 02:58:59.237 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 02:58:59.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:58:59.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:58:59.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:58:59.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:58:59.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:58:59.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:58:59.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:58:59.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:58:59.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:58:59.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:58:59.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:58:59.528 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:58:59.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:58:59.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:58:59.528 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5471 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:58:59.528 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:58:59.529 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:58:59.529 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:58:59.529 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:58:59.529 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:58:59.529 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:59:04.529 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:59:04.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:59:04.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:59:04.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:59:04.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:59:04.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:59:04.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:59:04.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:59:04.538 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:59:04.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:59:04.539 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:59:04.541 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:59:04.542 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:59:04.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:59:04.542 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:59:04.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:59:04.543 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:59:04.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:59:04.543 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:59:04.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:04.544 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:59:04.545 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:59:04.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:59:04.545 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:59:04.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:59:04.545 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:59:04.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:59:04.545 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:59:04.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:04.547 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:59:04.547 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:59:04.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:59:04.547 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:59:04.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:59:04.547 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:59:04.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:59:04.547 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:59:04.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:04.550 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:59:04.550 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:59:04.550 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:59:04.551 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:04.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:04.555 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:59:05.033 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:59:05.080 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:59:05.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:59:05.083 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:59:05.085 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:59:05.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:59:05.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:59:05.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:59:05.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:59:05.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:59:05.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:59:05.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:59:05.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:59:05.504 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:59:05.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:05.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:05.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:05.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:05.976 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:59:06.447 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:59:06.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:06.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:06.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:06.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:06.920 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:59:07.393 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:59:07.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:07.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:07.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:07.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:07.865 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:59:08.338 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:59:08.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:08.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:08.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:08.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:08.811 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:59:09.283 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:59:09.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:09.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:09.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:09.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:09.754 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:59:10.227 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:59:10.700 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:59:11.171 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:59:11.643 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:59:12.116 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:59:12.588 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:59:13.061 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:59:13.534 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:59:14.006 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:59:14.479 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:59:14.950 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:59:15.423 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:59:15.895 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:59:16.367 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:59:16.838 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:59:17.311 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:59:17.784 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:59:18.256 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:59:18.727 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:59:19.198 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:59:19.671 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:59:20.143 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:59:20.616 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:59:21.089 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:59:21.562 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:59:22.034 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:59:22.505 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:59:22.979 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:59:23.451 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:59:23.923 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:59:24.394 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:59:24.867 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:59:25.339 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:59:25.812 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:59:26.283 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:59:26.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:59:26.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:59:26.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:26.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:26.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:26.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:26.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:59:26.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:59:26.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:59:26.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:59:26.576 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:59:26.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:59:26.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:59:26.576 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:59:26.577 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:59:26.577 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:59:26.577 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:59:26.577 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:59:26.577 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:59:26.577 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4757 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 02:59:31.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:59:31.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:59:31.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:59:31.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:59:31.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:59:31.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:59:31.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:59:31.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:59:31.585 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:59:31.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:59:31.586 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:59:31.589 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:59:31.589 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:59:31.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:59:31.589 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:59:31.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:59:31.590 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:59:31.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:59:31.590 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:59:31.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:31.592 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:59:31.592 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:59:31.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:59:31.592 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:59:31.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:59:31.592 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:59:31.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:59:31.592 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:59:31.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:31.594 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:59:31.594 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:59:31.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:59:31.594 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:59:31.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:59:31.594 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:59:31.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:59:31.594 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:59:31.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:59:31.597 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:59:31.597 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:59:31.597 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:31.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:31.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:31.602 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:59:32.079 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:59:32.120 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:59:32.121 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:59:32.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:59:32.124 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:59:32.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:59:32.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:59:32.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:59:32.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:59:32.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:59:32.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:59:32.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:59:32.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:59:32.551 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:59:32.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:32.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:32.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:32.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:33.023 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 02:59:33.496 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 02:59:33.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:33.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:33.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:33.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:33.968 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 02:59:34.441 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 02:59:34.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:34.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:34.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:34.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:34.912 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 02:59:35.382 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 02:59:35.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:35.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:35.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:35.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:35.853 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 02:59:36.327 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 02:59:36.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:36.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:36.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:36.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:36.799 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 02:59:37.271 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 02:59:37.742 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 02:59:38.215 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 02:59:38.687 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 02:59:39.159 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 02:59:39.630 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 02:59:40.104 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 02:59:40.576 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 02:59:41.048 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 02:59:41.519 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 02:59:41.992 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 02:59:42.464 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 02:59:42.936 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 02:59:43.407 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 02:59:43.881 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 02:59:44.353 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 02:59:44.825 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 02:59:45.296 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 02:59:45.769 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 02:59:46.242 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 02:59:46.714 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 02:59:47.185 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 02:59:47.658 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 02:59:48.131 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 02:59:48.603 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 02:59:49.073 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 02:59:49.544 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 02:59:50.015 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 02:59:50.489 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 02:59:50.961 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 02:59:51.433 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 02:59:51.904 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 02:59:52.375 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 02:59:52.848 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 02:59:53.320 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 02:59:53.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:59:53.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:59:53.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:53.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:53.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:53.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:53.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:59:53.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:59:53.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:59:53.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:59:53.618 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 02:59:53.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:59:53.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:59:58.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 02:59:58.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 02:59:58.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:59:58.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:59:58.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:59:58.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:59:58.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 02:59:58.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:59:58.634 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:59:58.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 02:59:58.634 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 02:59:58.639 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 02:59:58.639 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 02:59:58.639 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:59:58.639 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:59:58.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 02:59:58.639 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 02:59:58.640 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 02:59:58.640 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 02:59:58.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:58.644 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 02:59:58.644 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 02:59:58.644 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:59:58.645 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:59:58.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 02:59:58.645 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 02:59:58.645 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 02:59:58.645 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 02:59:58.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:58.649 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 02:59:58.650 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 02:59:58.650 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:59:58.650 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 02:59:58.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 02:59:58.650 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 02:59:58.650 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 02:59:58.650 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 02:59:58.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 02:59:58.657 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 02:59:58.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 02:59:58.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 02:59:58.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 02:59:58.657 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 02:59:58.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 02:59:58.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 02:59:58.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:58.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 02:59:58.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 02:59:58.657 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 02:59:58.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:58.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:58.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:58.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:58.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:58.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:58.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:58.658 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 02:59:58.658 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 02:59:58.658 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 02:59:58.658 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 02:59:58.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:58.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:58.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:58.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 02:59:58.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:58.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:58.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:58.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:58.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:58.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:58.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:58.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:58.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:58.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 02:59:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:58.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:58.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 02:59:58.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:58.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 02:59:58.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 02:59:58.663 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 02:59:59.140 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 02:59:59.190 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 02:59:59.193 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 02:59:59.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 02:59:59.196 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 02:59:59.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 02:59:59.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 02:59:59.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 02:59:59.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 02:59:59.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 02:59:59.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 02:59:59.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 02:59:59.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 02:59:59.612 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 02:59:59.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 02:59:59.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 02:59:59.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 02:59:59.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:00:00.084 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:00:00.557 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:00:00.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:00:00.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:00:00.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:00:00.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:00:01.030 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:00:01.502 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:00:01.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:00:01.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:00:01.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:00:01.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:00:01.971 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:00:02.439 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:00:02.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:00:02.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:00:02.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:00:02.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:00:02.908 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:00:03.380 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:00:03.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:00:03.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:00:03.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:00:03.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:00:03.852 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:00:04.322 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:00:04.794 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:00:05.267 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:00:05.740 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:00:06.212 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:00:06.683 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:00:07.156 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:00:07.628 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:00:08.101 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:00:08.574 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:00:09.047 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:00:09.519 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:00:09.990 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:00:10.463 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:00:10.936 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:00:11.408 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:00:11.879 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:00:12.350 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:00:12.823 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:00:13.295 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:00:13.767 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:00:14.238 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:00:14.712 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:00:15.184 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:00:15.656 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:00:16.127 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:00:16.601 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:00:17.073 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:00:17.545 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:00:18.016 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:00:18.487 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:00:18.960 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:00:19.432 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:00:19.905 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:00:20.378 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:00:20.850 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:00:21.322 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:00:21.793 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:00:22.267 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:00:22.739 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:00:23.211 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:00:23.682 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:00:24.153 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:00:24.626 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:00:25.099 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 03:00:25.571 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 03:00:26.042 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 03:00:26.515 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 03:00:26.988 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 03:00:27.460 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 03:00:27.931 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 03:00:28.404 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 03:00:28.876 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 03:00:29.348 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 03:00:29.822 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 03:00:30.294 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 03:00:30.766 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 03:00:31.237 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 03:00:31.710 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 03:00:32.183 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 03:00:32.654 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 03:00:32.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:00:32.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:00:32.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:00:32.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:00:32.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:00:32.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:00:32.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:00:32.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:00:32.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:00:32.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:00:32.690 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:00:32.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:00:32.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:00:37.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:00:37.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:00:37.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:00:37.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:00:37.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:00:37.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:00:37.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:00:37.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:00:37.704 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:00:37.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:00:37.705 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:00:37.707 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:00:37.708 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:00:37.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:00:37.708 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:00:37.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:00:37.709 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:00:37.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:00:37.709 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:00:37.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:00:37.711 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:00:37.711 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:00:37.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:00:37.711 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:00:37.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:00:37.712 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:00:37.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:00:37.712 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:00:37.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:00:37.713 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:00:37.714 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:00:37.714 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:00:37.714 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:00:37.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:00:37.714 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:00:37.714 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:00:37.714 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:00:37.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:00:37.717 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:00:37.717 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:00:37.717 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:00:37.718 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:00:37.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:00:37.722 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:00:38.200 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:00:38.238 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:00:38.239 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:00:38.240 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:00:38.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:00:38.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:00:38.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:00:38.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:00:38.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:00:38.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:00:38.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:00:38.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:00:38.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:00:38.671 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:00:38.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:00:38.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:00:38.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:00:38.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:00:39.143 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:00:39.614 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:00:39.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:00:39.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:00:39.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:00:39.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:00:40.084 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:00:40.558 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:00:40.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:00:40.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:00:40.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:00:40.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:00:41.030 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:00:41.502 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:00:41.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:00:41.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:00:41.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:00:41.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:00:41.973 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:00:42.447 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:00:42.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:00:42.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:00:42.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:00:42.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:00:42.919 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:00:43.391 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:00:43.862 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:00:44.335 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:00:44.808 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:00:45.279 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:00:45.750 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:00:46.224 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:00:46.696 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:00:47.168 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:00:47.639 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:00:48.113 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:00:48.585 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:00:49.057 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:00:49.528 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:00:50.002 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:00:50.474 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:00:50.946 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:00:51.419 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:00:51.892 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:00:52.364 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:00:52.835 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:00:53.307 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:00:53.780 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:00:54.252 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:00:54.723 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:00:55.196 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:00:55.669 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:00:56.141 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:00:56.615 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:00:57.087 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:00:57.559 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:00:58.030 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:00:58.503 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:00:58.975 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:00:59.448 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:00:59.921 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:01:00.394 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:01:00.866 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:01:01.337 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:01:01.810 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:01:02.282 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:01:02.754 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:01:03.225 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:01:03.696 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:01:04.170 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 03:01:04.642 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 03:01:05.114 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 03:01:05.585 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 03:01:05.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:01:05.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:01:05.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:05.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:05.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:05.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:05.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:05.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:05.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:05.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:05.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:01:05.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:01:05.743 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:01:05.743 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6054 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:01:05.743 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6054 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:01:05.743 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6054 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:01:05.743 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6054 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:01:10.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:01:10.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:01:10.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:10.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:10.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:10.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:10.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:10.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:01:10.757 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:10.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:01:10.758 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:01:10.762 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:01:10.762 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:01:10.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:01:10.763 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:10.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:10.763 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:01:10.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:01:10.763 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:01:10.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:10.765 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:01:10.766 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:01:10.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:01:10.766 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:10.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:10.766 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:01:10.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:01:10.767 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:01:10.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:10.768 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:01:10.768 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:01:10.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:01:10.768 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:10.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:10.768 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:01:10.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:01:10.769 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:01:10.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:10.771 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:01:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:01:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:01:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:01:10.771 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:01:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:01:10.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:01:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:01:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:01:10.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:01:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:10.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:01:10.772 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:01:10.772 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:01:10.772 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:10.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:10.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:10.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:01:11.254 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:01:11.299 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:01:11.301 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:01:11.302 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:01:11.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:01:11.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:11.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:11.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:11.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:11.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:11.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:11.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:11.317 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:11.317 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:01:11.317 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:01:11.317 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:01:11.317 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:01:11.317 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:01:11.318 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:01:16.321 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:01:16.321 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:01:16.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:16.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:16.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:16.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:16.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:16.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:01:16.331 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:16.332 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:01:16.332 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:01:16.336 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:01:16.337 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:01:16.337 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:01:16.337 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:16.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:16.338 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:01:16.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:01:16.339 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:01:16.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:16.341 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:01:16.341 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:01:16.341 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:01:16.342 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:16.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:16.342 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:01:16.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:01:16.343 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:01:16.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:16.346 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:01:16.346 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:01:16.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:01:16.346 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:16.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:16.346 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:01:16.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:01:16.346 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:01:16.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:16.351 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:01:16.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:01:16.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:01:16.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:01:16.351 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:01:16.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:01:16.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:01:16.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:16.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:01:16.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:01:16.352 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:01:16.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:16.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:16.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:16.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:16.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:16.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:16.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:16.352 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:01:16.352 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:01:16.352 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:01:16.353 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:01:16.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:16.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:16.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:16.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:01:16.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:16.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:16.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:16.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:16.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:16.357 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:01:16.834 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:01:16.886 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:01:16.888 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:01:16.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:01:16.891 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:01:16.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:16.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:16.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:16.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:16.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:16.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:16.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:01:16.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:01:16.908 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:01:16.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:16.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:21.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:01:21.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:01:21.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:21.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:21.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:21.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:21.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:21.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:01:21.919 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:21.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:01:21.920 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:01:21.924 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:01:21.924 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:01:21.924 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:01:21.924 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:21.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:21.925 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:01:21.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:01:21.925 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:01:21.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:21.928 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:01:21.929 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:01:21.929 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:01:21.929 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:21.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:21.929 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:01:21.929 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:01:21.929 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:01:21.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:21.933 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:01:21.933 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:01:21.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:01:21.933 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:21.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:21.933 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:01:21.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:01:21.933 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:01:21.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:21.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:01:21.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:01:21.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:21.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:01:21.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:01:21.938 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:01:21.939 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:01:21.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:21.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:21.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:21.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:01:21.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:21.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:21.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:21.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:21.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:21.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:21.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:21.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:21.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:21.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:21.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:21.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:21.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:21.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:21.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:21.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:21.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:21.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:21.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:21.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:21.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:21.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:21.943 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:01:22.421 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:01:22.468 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:01:22.470 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:01:22.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:01:22.471 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:01:22.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:22.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:22.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:22.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:22.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:22.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:22.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:01:22.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:01:22.488 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:01:22.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:22.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:22.488 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:01:22.488 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:01:22.488 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:01:22.488 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:01:22.488 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:01:22.488 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:01:22.488 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:01:27.494 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:01:27.494 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:01:27.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:27.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:27.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:27.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:27.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:27.513 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:01:27.513 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:27.513 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:01:27.513 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:01:27.517 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:01:27.518 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:01:27.518 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:01:27.518 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:27.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:27.519 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:01:27.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:01:27.519 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:01:27.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:27.521 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:01:27.521 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:01:27.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:01:27.521 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:27.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:27.521 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:01:27.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:01:27.521 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:01:27.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:27.524 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:01:27.524 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:01:27.524 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:01:27.524 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:27.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:27.524 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:01:27.524 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:01:27.524 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:01:27.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:27.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:01:27.528 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:01:27.528 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:01:27.528 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:27.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:27.532 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:01:28.010 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:01:28.055 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:01:28.058 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:01:28.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:01:28.060 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:01:28.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:01:28.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:01:28.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:01:28.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:01:28.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:01:28.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:01:28.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:01:28.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:01:28.482 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:01:28.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:28.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:28.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:28.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:28.953 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:01:29.427 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:01:29.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:29.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:29.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:29.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:29.899 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:01:30.371 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:01:30.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:30.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:30.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:30.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:30.845 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:01:31.317 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:01:31.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:31.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:31.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:31.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:31.789 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:01:32.260 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:01:32.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:32.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:32.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:32.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:32.733 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:01:33.206 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:01:33.678 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:01:34.149 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:01:34.622 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:01:35.094 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:01:35.566 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:01:36.037 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:01:36.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:01:36.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:01:36.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:36.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:36.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:36.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:36.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:36.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:36.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:01:36.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:01:36.113 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:01:36.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:36.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:41.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:01:41.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:01:41.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:41.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:41.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:41.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:41.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:41.128 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:01:41.128 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:41.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:01:41.129 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:01:41.131 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:01:41.132 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:01:41.132 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:01:41.132 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:41.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:41.133 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:01:41.134 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:01:41.134 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:01:41.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:41.136 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:01:41.136 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:01:41.137 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:01:41.137 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:41.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:41.138 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:01:41.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:01:41.138 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:01:41.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:41.141 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:01:41.141 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:01:41.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:01:41.141 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:41.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:41.141 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:01:41.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:01:41.142 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:01:41.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:41.147 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:01:41.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:01:41.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:01:41.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:01:41.147 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:01:41.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:01:41.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:01:41.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:01:41.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:01:41.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:41.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:41.147 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:01:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:41.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:41.148 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:01:41.148 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:01:41.148 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:01:41.148 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:01:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:41.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:01:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:41.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:41.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:41.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:41.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:41.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:41.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:41.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:41.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:41.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:41.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:41.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:41.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:41.153 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:01:41.628 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:01:41.679 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:01:41.682 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:01:41.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:01:41.684 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:01:41.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:01:41.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:01:41.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:01:41.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:01:41.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:01:41.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:01:41.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:01:41.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:01:42.100 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:01:42.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:42.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:42.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:42.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:42.572 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:01:43.045 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:01:43.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:43.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:43.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:43.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:43.518 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:01:43.989 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:01:44.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:44.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:44.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:44.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:44.461 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:01:44.934 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:01:45.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:45.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:45.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:45.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:45.406 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:01:45.878 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:01:46.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:46.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:46.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:46.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:46.349 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:01:46.823 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:01:47.295 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:01:47.767 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:01:48.238 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:01:48.711 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:01:49.184 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:01:49.656 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:01:49.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:01:49.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:01:49.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:49.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:49.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:49.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:49.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:49.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:49.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:01:49.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:01:49.732 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:01:49.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:49.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:54.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:01:54.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:01:54.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:54.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:54.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:54.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:54.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:01:54.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:01:54.745 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:54.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:01:54.746 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:01:54.750 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:01:54.750 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:01:54.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:01:54.751 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:54.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:01:54.752 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:01:54.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:01:54.752 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:01:54.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:54.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:01:54.755 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:01:54.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:01:54.755 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:54.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:01:54.755 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:01:54.756 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:01:54.756 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:01:54.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:54.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:01:54.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:01:54.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:01:54.758 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:01:54.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:01:54.758 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:01:54.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:01:54.758 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:01:54.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:54.761 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:01:54.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:01:54.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:01:54.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:01:54.761 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:01:54.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:01:54.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:01:54.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:54.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:01:54.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:01:54.761 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:01:54.762 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:01:54.762 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:01:54.762 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:54.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:54.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:54.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:54.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:01:54.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:54.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:54.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:54.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:54.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:54.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:01:54.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:54.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:01:54.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:54.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:01:54.767 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:01:55.244 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:01:55.289 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:01:55.290 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:01:55.292 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:01:55.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:01:55.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:01:55.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:01:55.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:01:55.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:01:55.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:01:55.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:01:55.297 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:01:55.297 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:01:55.717 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:01:55.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:55.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:55.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:55.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:56.188 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:01:56.662 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:01:56.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:56.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:56.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:56.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:57.134 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:01:57.606 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:01:57.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:57.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:57.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:57.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:58.077 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:01:58.550 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:01:58.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:58.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:58.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:58.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:59.023 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:01:59.495 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:01:59.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:01:59.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:01:59.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:01:59.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:01:59.966 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:02:00.439 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:02:00.911 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:02:01.383 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:02:01.854 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:02:02.325 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:02:02.799 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:02:03.271 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:02:03.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:02:03.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:02:03.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:03.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:03.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:03.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:03.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:02:03.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:02:03.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:02:03.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:02:03.354 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:02:03.354 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:02:03.355 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:02:03.355 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:03.355 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:03.355 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:03.355 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:03.355 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:03.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:03.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:03.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:03.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:03.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:03.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:03.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:03.356 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:08.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:02:08.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:02:08.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:02:08.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:02:08.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:02:08.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:02:08.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:02:08.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:02:08.367 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:08.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:02:08.367 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:02:08.371 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:02:08.372 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:02:08.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:02:08.372 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:08.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:02:08.373 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:02:08.373 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:02:08.374 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:02:08.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:08.375 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:02:08.376 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:02:08.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:02:08.376 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:08.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:02:08.376 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:02:08.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:02:08.377 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:02:08.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:08.378 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:02:08.378 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:02:08.379 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:02:08.379 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:08.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:02:08.379 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:02:08.379 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:02:08.379 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:02:08.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:08.382 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:02:08.382 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:02:08.382 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:02:08.383 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:08.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:08.387 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:02:08.865 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:02:08.907 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:02:08.909 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:02:08.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:02:08.911 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:02:08.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:02:08.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:02:08.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:02:08.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:02:08.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:02:08.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:02:08.916 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:02:08.916 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:02:09.337 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:02:09.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:09.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:09.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:09.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:09.809 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:02:10.282 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:02:10.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:10.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:10.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:10.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:10.754 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:02:11.226 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:02:11.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:11.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:11.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:11.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:11.699 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:02:12.172 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:02:12.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:12.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:12.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:12.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:12.644 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:02:13.115 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:02:13.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:13.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:13.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:13.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:13.588 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:02:14.061 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:02:14.533 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:02:15.006 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:02:15.479 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:02:15.951 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:02:16.422 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:02:16.895 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:02:16.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:02:16.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:02:16.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:16.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:16.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:16.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:16.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:02:16.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:02:16.969 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:02:16.969 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:02:16.969 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:02:16.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:02:16.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:02:16.970 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:16.970 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:16.970 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:16.970 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:16.970 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:16.970 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:16.970 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:16.970 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:21.976 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:02:21.976 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:02:21.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:02:21.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:02:21.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:02:21.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:02:21.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:02:21.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:02:21.984 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:21.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:02:21.984 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:02:21.986 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:02:21.987 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:02:21.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:02:21.987 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:21.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:02:21.987 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:02:21.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:02:21.988 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:02:21.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:21.990 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:02:21.990 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:02:21.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:02:21.990 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:21.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:02:21.990 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:02:21.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:02:21.990 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:02:21.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:21.992 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:02:21.992 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:02:21.992 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:02:21.992 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:21.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:02:21.992 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:02:21.992 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:02:21.992 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:02:21.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:02:21.995 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:02:21.995 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:02:21.995 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:21.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:22.000 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:02:22.478 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:02:22.522 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:02:22.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:02:22.526 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:02:22.528 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:02:22.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:02:22.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:02:22.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:02:22.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:02:22.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:02:22.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:02:22.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:02:22.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:02:22.950 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:02:22.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:22.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:22.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:22.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:23.422 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:02:23.892 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:02:23.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:23.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:23.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:23.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:24.363 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:02:24.835 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:02:24.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:24.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:24.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:25.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:25.308 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:02:25.780 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:02:26.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:26.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:26.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:26.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:26.251 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:02:26.724 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:02:27.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:27.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:27.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:27.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:27.197 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:02:27.668 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:02:28.140 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:02:28.613 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:02:29.085 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:02:29.557 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:02:30.028 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:02:30.502 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:02:30.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:02:30.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:02:30.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:30.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:30.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:30.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:30.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:02:30.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:02:30.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:02:30.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:02:30.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:02:30.583 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:02:30.583 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:02:35.587 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:02:35.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:02:35.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:02:35.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:02:35.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:02:35.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:02:35.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:02:35.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:02:35.591 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:35.592 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:02:35.592 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:02:35.592 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:02:35.593 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:02:35.593 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:02:35.593 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:35.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:02:35.594 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:02:35.594 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:02:35.594 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:02:35.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:35.595 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:02:35.595 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:02:35.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:02:35.595 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:35.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:02:35.595 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:02:35.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:02:35.595 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:02:35.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:35.597 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:02:35.597 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:02:35.597 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:02:35.597 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:35.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:02:35.597 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:02:35.597 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:02:35.597 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:02:35.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:02:35.600 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:02:35.600 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:02:35.600 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:35.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:35.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:35.605 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:02:36.083 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:02:36.124 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:02:36.125 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:02:36.127 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:02:36.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:02:36.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:02:36.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:02:36.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:02:36.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:02:36.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:02:36.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:02:36.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:02:36.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:02:36.556 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:02:36.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:36.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:36.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:36.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:37.027 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:02:37.500 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:02:37.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:37.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:37.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:37.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:37.972 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:02:38.444 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:02:38.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:38.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:38.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:38.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:38.915 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:02:39.389 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:02:39.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:39.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:39.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:39.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:39.861 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:02:40.333 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:02:40.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:40.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:40.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:40.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:40.804 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:02:41.278 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:02:41.750 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:02:42.222 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:02:42.693 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:02:43.167 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:02:43.639 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:02:44.111 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:02:44.582 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:02:45.055 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:02:45.527 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:02:45.999 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:02:46.470 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:02:46.944 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:02:47.416 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:02:47.888 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:02:48.359 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:02:48.832 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:02:49.304 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:02:49.776 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:02:50.247 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:02:50.721 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:02:51.193 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:02:51.665 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:02:52.136 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:02:52.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:02:52.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:02:52.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:52.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:52.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:52.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:52.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:02:52.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:02:52.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:02:52.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:02:52.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:02:52.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:02:52.198 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:02:52.198 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3585 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:52.198 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3585 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:52.198 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3585 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:52.198 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3585 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:52.198 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3585 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:52.198 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3585 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:52.198 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3585 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:02:57.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:02:57.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:02:57.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:02:57.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:02:57.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:02:57.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:02:57.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:02:57.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:02:57.214 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:57.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:02:57.214 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:02:57.217 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:02:57.217 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:02:57.218 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:02:57.218 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:57.218 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:02:57.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:02:57.218 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:02:57.218 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:02:57.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:57.221 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:02:57.221 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:02:57.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:02:57.221 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:57.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:02:57.221 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:02:57.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:02:57.222 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:02:57.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:57.223 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:02:57.223 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:02:57.223 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:02:57.223 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:02:57.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:02:57.224 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:02:57.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:02:57.224 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:02:57.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:57.226 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:02:57.226 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:02:57.226 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:02:57.226 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:57.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:02:57.231 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:02:57.709 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:02:57.740 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:02:57.741 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:02:57.742 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:02:57.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:02:57.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:02:57.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:02:57.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:02:57.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:02:57.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:02:57.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:02:57.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:02:57.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:02:58.182 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:02:58.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:58.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:58.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:58.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:58.653 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:02:59.126 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:02:59.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:02:59.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:02:59.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:02:59.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:02:59.599 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:03:00.070 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:03:00.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:00.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:00.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:00.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:00.542 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:03:01.015 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:03:01.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:01.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:01.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:01.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:01.488 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:03:01.960 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:03:02.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:02.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:02.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:02.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:02.431 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:03:02.904 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:03:03.376 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:03:03.848 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:03:04.319 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:03:04.792 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:03:05.265 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:03:05.737 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:03:05.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:03:05.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:03:05.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:05.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:05.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:05.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:05.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:05.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:05.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:05.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:05.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:03:05.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:03:05.780 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:03:05.780 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1847 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:05.780 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1847 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:05.780 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1847 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:05.780 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1847 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:05.780 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1847 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:05.780 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1847 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:05.780 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1847 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:10.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:03:10.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:03:10.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:10.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:10.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:10.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:10.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:10.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:03:10.790 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:10.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:03:10.790 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:03:10.793 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:03:10.793 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:03:10.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:03:10.794 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:10.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:10.794 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:03:10.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:03:10.794 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:03:10.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:10.798 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:03:10.799 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:03:10.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:03:10.799 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:10.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:10.799 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:03:10.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:03:10.799 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:03:10.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:10.803 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:03:10.803 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:03:10.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:03:10.803 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:10.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:10.803 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:03:10.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:03:10.804 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:03:10.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:10.809 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:03:10.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:03:10.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:03:10.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:03:10.809 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:03:10.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:03:10.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:03:10.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:03:10.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:03:10.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:10.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:10.809 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:03:10.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:10.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:10.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:10.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:10.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:10.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:10.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:10.810 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:03:10.810 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:03:10.810 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:03:10.810 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:03:10.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:10.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:10.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:10.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:03:10.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:10.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:10.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:10.815 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:03:11.293 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:03:11.347 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:03:11.349 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:03:11.350 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:03:11.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:03:11.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:03:11.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:03:11.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:03:11.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:03:11.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:03:11.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:03:11.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:03:11.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:03:11.765 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:03:11.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:11.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:11.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:11.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:12.236 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:03:12.709 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:03:12.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:12.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:12.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:12.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:13.182 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:03:13.654 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:03:13.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:13.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:13.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:13.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:14.125 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:03:14.598 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:03:14.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:14.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:14.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:14.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:15.070 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:03:15.538 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:03:15.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:15.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:15.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:15.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:16.009 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:03:16.482 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:03:16.955 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:03:17.427 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:03:17.898 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:03:18.371 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:03:18.844 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:03:19.316 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:03:19.787 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:03:20.260 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:03:20.733 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:03:21.204 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:03:21.675 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:03:22.146 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:03:22.617 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:03:23.088 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:03:23.556 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:03:24.024 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:03:24.496 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:03:24.969 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:03:25.441 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:03:25.913 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:03:26.384 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:03:26.858 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:03:27.330 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:03:27.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:03:27.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:03:27.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:27.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:27.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:27.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:27.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:27.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:27.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:27.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:03:27.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:03:27.401 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:03:27.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:32.407 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:03:32.407 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:03:32.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:32.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:32.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:32.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:32.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:32.419 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:03:32.419 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:32.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:03:32.420 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:03:32.426 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:03:32.427 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:03:32.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:03:32.427 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:32.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:32.428 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:03:32.428 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:03:32.428 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:03:32.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:32.432 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:03:32.432 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:03:32.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:03:32.433 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:32.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:32.433 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:03:32.434 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:03:32.434 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:03:32.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:32.436 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:03:32.436 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:03:32.437 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:03:32.437 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:32.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:32.437 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:03:32.437 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:03:32.437 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:03:32.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:32.441 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:03:32.441 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:03:32.442 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:03:32.442 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:32.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:32.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:32.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:32.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:32.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:32.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:32.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:32.446 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:03:32.924 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:03:32.973 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:03:32.975 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:03:32.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:03:32.978 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:03:32.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:03:32.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:03:32.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:03:33.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:33.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:33.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:33.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:33.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:33.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:33.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:03:33.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:03:33.018 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:03:33.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:33.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:33.019 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:33.019 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:33.019 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:33.019 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:33.019 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:33.019 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:33.019 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:38.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:03:38.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:03:38.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:38.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:38.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:38.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:38.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:38.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:03:38.034 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:38.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:03:38.034 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:03:38.040 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:03:38.040 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:03:38.041 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:03:38.041 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:38.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:38.041 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:03:38.041 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:03:38.041 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:03:38.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:38.045 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:03:38.046 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:03:38.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:03:38.046 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:38.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:38.046 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:03:38.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:03:38.046 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:03:38.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:38.049 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:03:38.050 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:03:38.050 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:03:38.050 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:38.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:38.050 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:03:38.050 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:03:38.050 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:03:38.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:38.054 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:03:38.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:03:38.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:03:38.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:03:38.054 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:03:38.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:03:38.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:03:38.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:38.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:03:38.055 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:03:38.055 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:03:38.055 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:38.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:38.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:38.060 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:03:38.538 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:03:38.582 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:03:38.584 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:03:38.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:03:38.586 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:03:38.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:03:38.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:03:38.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:03:38.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:38.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:38.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:38.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:38.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:38.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:38.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:38.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:38.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:03:38.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:03:38.640 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:03:38.640 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:38.640 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:38.640 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:38.640 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:38.640 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:38.640 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:38.640 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:43.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:03:43.643 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:03:43.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:43.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:43.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:43.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:43.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:43.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:03:43.649 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:43.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:03:43.649 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:03:43.652 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:03:43.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:03:43.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:03:43.652 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:43.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:43.653 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:03:43.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:03:43.653 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:03:43.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:43.655 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:03:43.655 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:03:43.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:03:43.655 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:43.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:43.655 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:03:43.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:03:43.655 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:03:43.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:43.657 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:03:43.657 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:03:43.657 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:03:43.657 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:43.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:43.657 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:03:43.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:03:43.658 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:03:43.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:43.660 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:03:43.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:03:43.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:03:43.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:03:43.660 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:03:43.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:03:43.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:03:43.661 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:03:43.661 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:03:43.661 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:43.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:43.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:43.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:43.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:43.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:43.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:43.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:43.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:43.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:43.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:43.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:43.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:43.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:43.666 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:03:44.144 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:03:44.187 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:03:44.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:03:44.189 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:03:44.190 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:03:44.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:03:44.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:03:44.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:03:44.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:44.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:44.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:44.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:44.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:44.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:44.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:44.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:44.234 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:03:44.234 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:03:44.234 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:03:44.235 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:44.235 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:44.235 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:44.235 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:44.235 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:44.235 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:44.235 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:49.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:03:49.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:03:49.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:49.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:49.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:49.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:49.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:49.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:03:49.248 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:49.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:03:49.249 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:03:49.252 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:03:49.252 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:03:49.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:03:49.252 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:49.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:49.253 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:03:49.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:03:49.254 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:03:49.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:49.255 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:03:49.255 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:03:49.255 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:03:49.255 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:49.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:49.256 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:03:49.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:03:49.256 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:03:49.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:49.258 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:03:49.258 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:03:49.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:03:49.258 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:49.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:49.258 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:03:49.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:03:49.258 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:03:49.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:49.261 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:03:49.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:03:49.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:03:49.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:03:49.261 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:03:49.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:03:49.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:03:49.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:49.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:03:49.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:03:49.261 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:03:49.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:03:49.262 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:03:49.262 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:03:49.262 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:49.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:49.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:49.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:49.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:49.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:49.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:49.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:49.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:49.267 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:03:49.743 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:03:49.790 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:03:49.792 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:03:49.794 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:03:49.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:03:49.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:03:49.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:03:49.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:03:49.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:49.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:49.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:49.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:49.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:49.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:49.837 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:03:49.837 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:03:49.837 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:03:49.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:49.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:49.837 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:49.837 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:49.837 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:49.837 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:49.837 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:49.837 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:49.837 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:54.841 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:03:54.841 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:03:54.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:54.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:54.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:54.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:54.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:54.847 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:03:54.847 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:54.848 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:03:54.848 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:03:54.848 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:03:54.848 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:03:54.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:03:54.849 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:54.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:54.849 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:03:54.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:03:54.849 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:03:54.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:54.849 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:03:54.850 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:03:54.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:03:54.850 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:54.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:54.850 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:03:54.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:03:54.850 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:03:54.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:54.851 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:03:54.851 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:03:54.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:03:54.851 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:03:54.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:54.851 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:03:54.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:03:54.851 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:03:54.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:54.854 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:03:54.854 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:03:54.855 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:54.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:03:54.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:03:54.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:54.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:03:54.859 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:03:55.336 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:03:55.381 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:03:55.384 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:03:55.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:03:55.386 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:03:55.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:03:55.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:03:55.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:03:55.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:03:55.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:03:55.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:03:55.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:03:55.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:03:55.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:03:55.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:03:55.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:03:55.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:03:55.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:03:55.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:03:55.425 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:03:55.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:03:55.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:03:55.425 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:55.425 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:55.425 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:55.425 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:55.425 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:55.425 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:03:55.425 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:04:00.431 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:04:00.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:04:00.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:04:00.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:04:00.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:04:00.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:04:00.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:04:00.439 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:04:00.439 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:00.439 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:04:00.439 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:04:00.442 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:04:00.442 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:04:00.443 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:04:00.443 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:00.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:04:00.443 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:04:00.443 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:04:00.443 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:04:00.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:00.447 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:04:00.447 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:04:00.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:04:00.448 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:00.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:04:00.448 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:04:00.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:04:00.448 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:04:00.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:00.452 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:04:00.452 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:04:00.452 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:04:00.452 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:00.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:04:00.452 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:04:00.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:04:00.453 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:04:00.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:00.457 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:04:00.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:00.458 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:04:00.458 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:04:00.458 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:04:00.459 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:04:00.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:00.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:00.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:00.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:04:00.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:00.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:00.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:00.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:00.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:00.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:00.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:00.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:00.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:00.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:00.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:00.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:00.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:00.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:00.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:00.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:00.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:00.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:00.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:00.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:00.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:00.463 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:04:00.941 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:04:00.987 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:04:00.989 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:04:00.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:04:00.992 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:04:01.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:04:01.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:04:01.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:04:01.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:04:01.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:04:01.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:04:01.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:01.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:01.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:01.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:01.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:04:01.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:04:01.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:04:01.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:04:01.037 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:04:01.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:04:01.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:04:06.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:04:06.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:04:06.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:04:06.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:04:06.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:04:06.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:04:06.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:04:06.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:04:06.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:06.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:04:06.058 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:04:06.062 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:04:06.063 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:04:06.063 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:04:06.063 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:06.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:04:06.064 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:04:06.065 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:04:06.065 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:04:06.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:06.066 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:04:06.067 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:04:06.067 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:04:06.067 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:06.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:04:06.067 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:04:06.067 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:04:06.067 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:04:06.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:06.069 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:04:06.070 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:04:06.070 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:04:06.070 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:06.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:04:06.070 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:04:06.070 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:04:06.070 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:04:06.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:04:06.073 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:04:06.073 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:04:06.073 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:06.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:06.078 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:04:06.557 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:04:06.604 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:04:06.606 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:04:06.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:04:06.608 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:04:06.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:04:06.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:04:06.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:04:06.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:04:06.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:04:06.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:04:06.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:04:06.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:04:07.029 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:04:07.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:07.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:07.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:07.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:07.500 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:04:07.973 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:04:08.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:08.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:08.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:08.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:08.446 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:04:08.918 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:04:09.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:09.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:09.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:09.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:09.389 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:04:09.862 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:04:10.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:10.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:10.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:10.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:10.334 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:04:10.806 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:04:11.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:11.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:11.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:11.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:11.277 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:04:11.751 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:04:12.223 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:04:12.695 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:04:13.166 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:04:13.640 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:04:14.112 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:04:14.584 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:04:15.055 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:04:15.528 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:04:16.001 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:04:16.473 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:04:16.944 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:04:17.417 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:04:17.890 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:04:18.362 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:04:18.835 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:04:19.308 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:04:19.780 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:04:20.251 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:04:20.721 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:04:21.195 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:04:21.667 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:04:22.139 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:04:22.610 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:04:23.084 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:04:23.556 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:04:24.028 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:04:24.499 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:04:24.969 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:04:25.440 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:04:25.911 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:04:26.385 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:04:26.857 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:04:27.329 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:04:27.800 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:04:28.274 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:04:28.746 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:04:29.218 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:04:29.689 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:04:30.162 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:04:30.635 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:04:31.107 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:04:31.578 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:04:32.051 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:04:32.524 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 03:04:32.996 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 03:04:33.467 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 03:04:33.940 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 03:04:34.412 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 03:04:34.884 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 03:04:35.355 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 03:04:35.828 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 03:04:36.300 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 03:04:36.772 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 03:04:37.243 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 03:04:37.717 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 03:04:38.189 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 03:04:38.661 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 03:04:39.132 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 03:04:39.606 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 03:04:40.078 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 03:04:40.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:04:40.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:04:40.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:40.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:40.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:40.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:40.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:04:40.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:04:40.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:04:40.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:04:40.098 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:04:40.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:04:40.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:04:45.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:04:45.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:04:45.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:04:45.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:04:45.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:04:45.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:04:45.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:04:45.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:04:45.120 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:45.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:04:45.121 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:04:45.126 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:04:45.126 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:04:45.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:04:45.126 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:45.127 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:04:45.127 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:04:45.127 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:04:45.127 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:04:45.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:45.131 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:04:45.131 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:04:45.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:04:45.131 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:45.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:04:45.131 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:04:45.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:04:45.132 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:04:45.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:45.134 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:04:45.135 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:04:45.135 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:04:45.135 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:45.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:04:45.135 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:04:45.135 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:04:45.135 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:04:45.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:45.139 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:04:45.139 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:04:45.139 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:04:45.139 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:45.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:45.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:45.144 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:04:45.621 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:04:45.667 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:04:45.669 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:04:45.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:04:45.671 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:04:46.093 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:04:46.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:46.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:46.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:46.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:46.567 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:04:47.039 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:04:47.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:47.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:47.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:47.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:47.511 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:04:47.987 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:04:48.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:48.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:48.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:48.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:48.459 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:04:48.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:04:48.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:48.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:48.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:48.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:48.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:04:48.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:04:48.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:04:48.692 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:04:48.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:04:48.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:04:48.692 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:04:53.696 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:04:53.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:04:53.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:04:53.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:04:53.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:04:53.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:04:53.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:04:53.706 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:04:53.706 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:53.706 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:04:53.706 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:04:53.709 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:04:53.710 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:04:53.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:04:53.710 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:53.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:04:53.711 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:04:53.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:04:53.711 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:04:53.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:53.712 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:04:53.713 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:04:53.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:04:53.713 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:53.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:04:53.713 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:04:53.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:04:53.713 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:04:53.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:53.715 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:04:53.715 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:04:53.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:04:53.716 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:04:53.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:04:53.716 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:04:53.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:04:53.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:04:53.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:04:53.719 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:04:53.719 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:04:53.719 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:53.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:04:53.724 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:04:54.201 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:04:54.245 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:04:54.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:04:54.249 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:04:54.251 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:04:54.672 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:04:54.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:54.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:54.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:54.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:55.145 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:04:55.617 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:04:55.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:55.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:55.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:55.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:56.089 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:04:56.561 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:04:56.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:56.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:56.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:56.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:57.036 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:04:57.508 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:04:57.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:57.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:57.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:57.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:57.983 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:04:58.455 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:04:58.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:04:58.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:04:58.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:04:58.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:04:58.930 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:04:59.402 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:04:59.873 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:05:00.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:00.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:00.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:00.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:00.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:00.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:00.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:00.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:00.267 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:05:00.267 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:05:00.267 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:05:05.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:05:05.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:05:05.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:05.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:05.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:05.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:05.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:05.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:05:05.289 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:05.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:05:05.290 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:05:05.295 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:05:05.295 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:05:05.296 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:05:05.296 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:05.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:05.297 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:05:05.297 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:05:05.297 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:05:05.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:05.299 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:05:05.300 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:05:05.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:05:05.300 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:05.300 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:05.300 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:05:05.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:05:05.300 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:05:05.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:05.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:05:05.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:05:05.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:05:05.304 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:05.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:05.304 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:05:05.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:05:05.304 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:05:05.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:05.308 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:05:05.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:05:05.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:05:05.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:05:05.308 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:05:05.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:05:05.309 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:05:05.309 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:05:05.309 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:05.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:05.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:05.314 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:05:05.790 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:05:05.842 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:05:05.844 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:05:05.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:05:05.846 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:05:06.261 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:05:06.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:06.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:06.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:06.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:06.733 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:05:07.205 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:05:07.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:07.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:07.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:07.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:07.680 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:05:08.152 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:05:08.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:08.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:08.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:08.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:08.623 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:05:09.098 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:05:09.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:09.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:09.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:09.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:09.570 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:05:10.046 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:05:10.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:10.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:10.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:10.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:10.517 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:05:10.990 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:05:11.461 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:05:11.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:11.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:11.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:11.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:11.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:11.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:11.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:11.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:11.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:05:11.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:05:11.861 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:05:16.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:05:16.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:05:16.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:16.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:16.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:16.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:16.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:16.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:05:16.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:16.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:05:16.876 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:05:16.879 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:05:16.879 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:05:16.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:05:16.879 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:16.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:16.879 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:05:16.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:05:16.879 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:05:16.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:16.881 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:05:16.882 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:05:16.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:05:16.882 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:16.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:16.882 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:05:16.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:05:16.882 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:05:16.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:16.884 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:05:16.884 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:05:16.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:05:16.884 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:16.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:16.884 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:05:16.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:05:16.885 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:05:16.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:16.887 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:05:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:05:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:05:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:05:16.887 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:05:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:05:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:05:16.888 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:05:16.888 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:05:16.888 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:16.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:16.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:16.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:16.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:16.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:16.892 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:05:17.370 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:05:17.410 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:05:17.412 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:05:17.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:05:17.414 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:05:17.842 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:05:17.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:17.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:17.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:17.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:18.318 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:05:18.790 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:05:18.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:18.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:18.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:18.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:19.265 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:05:19.737 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:05:19.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:19.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:19.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:19.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:20.211 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:05:20.683 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:05:20.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:20.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:20.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:20.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:21.155 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:05:21.630 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:05:21.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:21.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:21.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:21.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:22.102 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:05:22.576 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:05:23.048 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:05:23.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:23.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:23.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:23.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:23.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:23.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:23.428 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:05:23.428 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:05:23.428 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:05:23.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:23.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:23.428 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:23.428 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:23.428 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:23.428 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:23.428 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:23.428 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:23.428 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:28.435 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:05:28.435 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:05:28.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:28.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:28.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:28.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:28.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:28.444 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:05:28.444 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:28.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:05:28.445 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:05:28.447 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:05:28.448 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:05:28.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:05:28.448 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:28.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:28.449 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:05:28.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:05:28.449 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:05:28.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:28.451 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:05:28.451 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:05:28.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:05:28.451 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:28.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:28.451 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:05:28.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:05:28.451 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:05:28.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:28.454 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:05:28.454 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:05:28.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:05:28.454 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:28.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:28.454 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:05:28.454 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:05:28.454 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:05:28.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:28.458 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:05:28.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:05:28.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:05:28.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:05:28.458 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:05:28.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:05:28.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:05:28.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:28.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:05:28.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:05:28.458 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:05:28.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:28.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:05:28.459 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:05:28.459 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:05:28.459 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:28.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:28.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:28.464 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:05:28.941 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:05:28.996 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:05:28.998 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:05:29.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:05:29.000 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:05:29.413 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:05:29.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:29.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:29.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:29.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:29.888 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:05:30.360 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:05:30.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:30.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:30.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:30.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:30.835 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:05:31.307 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:05:31.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:31.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:31.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:31.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:31.782 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:05:32.254 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:05:32.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:32.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:32.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:32.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:32.730 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:05:33.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:05:33.201 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:05:33.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:33.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:33.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:33.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:33.676 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:05:34.148 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:05:34.620 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:05:35.094 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:05:35.566 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:05:36.037 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:05:36.508 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:05:36.980 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:05:37.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:37.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:37.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:37.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:37.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:37.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:37.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:37.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:37.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:05:37.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:05:37.042 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:05:37.043 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1851 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:37.043 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1851 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:37.043 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1851 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:37.043 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1851 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:37.043 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1851 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:37.043 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1851 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:42.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:05:42.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:05:42.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:42.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:42.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:42.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:42.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:42.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:05:42.054 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:42.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:05:42.055 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:05:42.059 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:05:42.059 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:05:42.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:05:42.060 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:42.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:42.060 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:05:42.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:05:42.061 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:05:42.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:42.063 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:05:42.063 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:05:42.063 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:05:42.063 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:42.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:42.064 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:05:42.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:05:42.064 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:05:42.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:42.066 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:05:42.066 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:05:42.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:05:42.066 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:42.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:42.067 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:05:42.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:05:42.067 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:05:42.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:42.070 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:05:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:05:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:05:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:05:42.070 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:05:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:05:42.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:05:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:05:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:05:42.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:05:42.071 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:05:42.071 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:05:42.071 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:42.075 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:05:42.554 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:05:42.601 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:05:42.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:05:42.605 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:05:42.607 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:05:43.025 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:05:43.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:43.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:43.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:43.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:43.496 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:05:43.970 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:05:44.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:44.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:44.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:44.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:44.443 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:05:44.914 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:05:45.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:45.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:45.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:45.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:45.385 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:05:45.861 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:05:46.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:46.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:46.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:46.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:46.332 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:05:46.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:46.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:46.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:46.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:46.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:46.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:46.625 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:05:46.625 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:05:46.625 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:05:46.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:46.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:51.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:05:51.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:05:51.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:51.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:51.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:51.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:51.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:51.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:05:51.640 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:51.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:05:51.641 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:05:51.643 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:05:51.643 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:05:51.644 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:05:51.644 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:51.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:51.644 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:05:51.644 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:05:51.644 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:05:51.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:51.646 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:05:51.646 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:05:51.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:05:51.646 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:51.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:51.646 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:05:51.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:05:51.646 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:05:51.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:51.648 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:05:51.648 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:05:51.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:05:51.648 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:51.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:51.648 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:05:51.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:05:51.648 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:05:51.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:51.650 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:05:51.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:05:51.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:05:51.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:05:51.650 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:05:51.651 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:05:51.651 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:05:51.651 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:51.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:51.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:51.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:51.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:51.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:51.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:51.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:51.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:51.656 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:05:52.134 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:05:52.175 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:05:52.178 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:05:52.180 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:05:52.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:05:52.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:52.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:52.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:52.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:52.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:52.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:52.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:52.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:52.202 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:05:52.202 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:05:52.202 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:05:52.202 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:52.202 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:52.202 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:52.202 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:52.202 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:52.202 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:52.202 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:57.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:05:57.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:05:57.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:57.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:57.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:57.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:57.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:57.215 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:05:57.215 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:57.216 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:05:57.216 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:05:57.221 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:05:57.222 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:05:57.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:05:57.222 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:57.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:57.223 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:05:57.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:05:57.224 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:05:57.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:57.226 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:05:57.227 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:05:57.227 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:05:57.227 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:57.227 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:57.228 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:05:57.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:05:57.228 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:05:57.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:57.230 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:05:57.230 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:05:57.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:05:57.230 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:05:57.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:57.230 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:05:57.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:05:57.230 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:05:57.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:57.233 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:05:57.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:05:57.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:05:57.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:05:57.233 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:05:57.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:05:57.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:05:57.234 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:05:57.234 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:05:57.234 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:57.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:05:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:57.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:57.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:05:57.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:05:57.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:05:57.239 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:05:57.714 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:05:57.762 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:05:57.764 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:05:57.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:05:57.766 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:05:57.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:05:57.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:05:57.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:05:57.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:05:57.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:05:57.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:05:57.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:05:57.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:05:57.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:05:57.786 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:05:57.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:05:57.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:05:57.786 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:57.786 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:57.787 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:57.787 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:57.787 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:57.787 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:05:57.787 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:02.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:06:02.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:06:02.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:02.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:02.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:02.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:02.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:02.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:06:02.820 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:02.820 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:06:02.821 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:06:02.828 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:06:02.829 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:06:02.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:06:02.830 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:02.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:02.831 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:06:02.831 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:06:02.831 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:06:02.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:02.835 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:06:02.836 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:06:02.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:06:02.837 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:02.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:02.838 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:06:02.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:06:02.838 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:06:02.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:02.841 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:06:02.841 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:06:02.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:06:02.842 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:02.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:02.842 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:06:02.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:06:02.842 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:06:02.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:02.846 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:06:02.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:06:02.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:06:02.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:06:02.846 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:06:02.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:06:02.847 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:06:02.847 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:06:02.847 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:06:02.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:02.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:02.852 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:06:03.329 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:06:03.377 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:06:03.379 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:06:03.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:06:03.382 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:06:03.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:03.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:03.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:03.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:03.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:03.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:03.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:03.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:03.396 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:06:03.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:06:03.396 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:06:03.396 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:03.396 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:03.396 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:03.396 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:08.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:06:08.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:06:08.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:08.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:08.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:08.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:08.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:08.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:06:08.408 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:08.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:06:08.409 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:06:08.411 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:06:08.412 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:06:08.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:06:08.412 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:08.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:08.413 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:06:08.413 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:06:08.413 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:06:08.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:08.415 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:06:08.415 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:06:08.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:06:08.415 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:08.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:08.415 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:06:08.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:06:08.415 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:06:08.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:08.417 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:06:08.418 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:06:08.418 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:06:08.418 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:08.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:08.418 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:06:08.418 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:06:08.418 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:06:08.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:08.421 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:06:08.421 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:06:08.421 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:06:08.422 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:08.426 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:06:08.905 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:06:08.947 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:06:08.950 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:06:08.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:06:08.952 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:06:08.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:06:08.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:06:08.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:06:08.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:08.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:06:08.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:06:08.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:06:08.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:06:09.377 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:06:09.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:09.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:09.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:09.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:09.848 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:06:10.322 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:06:10.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:10.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:10.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:10.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:10.794 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:06:11.266 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:06:11.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:11.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:11.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:11.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:11.737 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:06:12.021 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:06:12.021 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-03 03:06:12.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:12.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:12.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:06:12.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:06:12.067 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:06:12.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:06:12.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:12.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:12.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:12.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:12.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:12.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:12.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:12.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:12.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:06:12.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:06:12.074 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:06:12.074 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=789 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:17.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:06:17.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:06:17.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:17.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:17.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:17.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:17.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:17.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:06:17.087 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:17.088 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:06:17.088 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:06:17.091 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:06:17.091 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:06:17.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:06:17.092 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:17.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:17.092 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:06:17.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:06:17.093 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:06:17.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:17.095 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:06:17.095 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:06:17.095 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:06:17.095 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:17.095 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:17.095 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:06:17.095 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:06:17.095 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:06:17.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:17.098 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:06:17.098 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:06:17.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:06:17.098 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:17.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:17.098 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:06:17.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:06:17.098 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:06:17.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:17.101 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:06:17.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:06:17.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:06:17.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:06:17.101 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:06:17.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:06:17.102 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:06:17.102 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:06:17.102 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:17.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:17.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:17.107 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:06:17.585 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:06:17.630 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:06:17.632 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:06:17.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:06:17.635 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:06:17.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:06:17.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:06:17.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:06:17.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:17.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:06:17.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:06:17.642 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:06:17.642 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:06:18.056 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:06:18.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:18.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:18.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:18.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:18.528 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:06:19.001 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:06:19.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:19.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:19.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:19.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:19.474 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:06:19.945 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:06:20.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:20.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:20.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:20.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:20.417 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:06:20.700 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:06:20.700 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-03 03:06:20.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:20.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:20.890 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:06:21.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:21.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:21.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:21.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:21.362 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:06:21.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:06:21.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:06:21.374 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:06:21.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:06:21.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:21.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:21.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:21.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:21.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:21.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:21.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:21.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:21.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:06:21.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:06:21.382 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:06:26.392 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:06:26.393 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:06:26.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:26.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:26.393 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:26.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:26.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:26.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:06:26.409 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:26.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:06:26.409 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:06:26.412 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:06:26.412 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:06:26.413 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:06:26.413 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:26.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:26.414 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:06:26.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:06:26.414 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:06:26.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:26.416 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:06:26.416 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:06:26.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:06:26.416 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:26.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:26.416 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:06:26.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:06:26.416 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:06:26.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:26.419 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:06:26.419 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:06:26.419 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:06:26.419 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:26.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:26.419 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:06:26.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:06:26.420 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:06:26.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:26.423 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:06:26.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:06:26.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:06:26.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:06:26.423 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:06:26.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:06:26.424 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:06:26.424 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:06:26.424 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:26.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:26.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:26.429 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:06:26.907 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:06:26.953 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:06:26.955 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:06:26.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:06:26.955 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:06:26.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:06:26.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:06:26.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:06:26.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:26.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:06:26.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:06:26.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:06:26.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:06:27.379 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:06:27.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:27.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:27.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:27.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:27.851 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:06:28.324 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:06:28.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:28.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:28.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:28.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:28.796 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:06:29.268 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:06:29.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:29.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:29.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:29.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:29.739 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:06:30.023 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:06:30.023 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-03 03:06:30.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:30.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:30.213 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:06:30.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:30.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:30.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:30.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:30.686 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:06:31.157 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:06:31.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:31.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:31.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:31.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:31.629 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:06:32.102 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:06:32.575 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:06:33.046 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:06:33.518 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:06:33.992 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:06:34.464 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:06:34.935 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:06:35.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:06:35.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:06:35.026 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:06:35.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:06:35.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:35.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:35.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:35.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:35.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:35.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:35.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:06:35.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:06:35.046 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:06:35.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:35.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:35.046 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:35.046 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:35.046 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:35.046 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:35.046 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:35.046 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:35.046 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:40.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:06:40.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:06:40.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:40.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:40.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:40.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:40.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:40.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:06:40.061 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:40.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:06:40.061 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:06:40.065 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:06:40.066 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:06:40.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:06:40.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:40.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:40.066 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:06:40.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:06:40.067 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:06:40.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:40.071 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:06:40.071 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:06:40.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:06:40.071 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:40.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:40.071 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:06:40.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:06:40.072 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:06:40.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:40.075 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:06:40.075 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:06:40.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:06:40.076 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:40.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:40.076 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:06:40.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:06:40.076 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:06:40.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:40.081 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:06:40.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:06:40.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:06:40.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:06:40.081 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:06:40.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:06:40.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:06:40.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:40.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:06:40.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:06:40.082 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:06:40.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:40.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:40.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:40.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:40.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:40.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:40.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:40.082 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:06:40.082 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:06:40.082 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:06:40.082 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:40.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:40.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:40.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:40.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:40.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:40.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:40.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:40.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:40.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:40.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:40.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:40.087 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:06:40.565 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:06:40.617 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:06:40.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:06:40.620 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:06:40.622 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:06:40.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:06:40.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:06:40.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:06:40.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:40.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:06:40.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:06:40.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:06:40.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:06:41.036 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:06:41.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:41.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:41.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:41.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:41.508 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:06:41.982 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:06:42.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:42.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:42.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:42.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:42.454 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:06:42.926 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:06:43.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:43.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:43.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:43.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:43.397 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:06:43.680 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:06:43.681 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-03 03:06:43.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:43.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:43.870 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:06:44.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:44.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:44.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:44.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:44.343 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:06:44.815 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:06:45.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:45.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:45.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:45.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:45.289 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:06:45.761 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:06:46.233 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:06:46.706 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:06:47.179 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:06:47.651 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:06:48.123 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:06:48.597 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:06:48.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:06:48.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:06:48.684 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:06:48.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:06:48.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:48.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:48.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:48.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:48.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:48.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:48.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:48.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:48.704 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:06:48.704 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:06:48.704 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:06:48.704 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1861 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:48.704 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1861 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:48.704 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1861 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:48.704 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1861 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:48.704 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1861 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:48.704 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:48.704 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:06:53.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:06:53.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:06:53.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:53.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:53.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:53.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:53.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:06:53.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:06:53.720 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:53.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:06:53.720 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:06:53.722 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:06:53.722 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:06:53.722 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:06:53.722 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:53.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:06:53.723 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:06:53.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:06:53.723 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:06:53.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:53.724 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:06:53.724 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:06:53.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:06:53.724 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:53.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:06:53.724 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:06:53.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:06:53.724 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:06:53.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:53.726 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:06:53.726 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:06:53.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:06:53.726 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:06:53.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:06:53.726 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:06:53.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:06:53.726 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:06:53.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:53.728 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:06:53.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:06:53.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:06:53.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:06:53.728 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:06:53.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:06:53.729 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:06:53.729 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:06:53.729 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:06:53.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:53.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:06:53.733 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:06:54.212 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:06:54.253 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:06:54.256 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:06:54.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:06:54.258 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:06:54.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:06:54.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:06:54.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:06:54.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:54.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:06:54.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:06:54.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:06:54.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:06:54.684 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:06:54.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:54.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:54.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:54.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:55.155 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:06:55.628 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:06:55.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:55.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:55.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:55.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:56.100 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:06:56.573 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:06:56.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:56.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:56.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:56.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:57.046 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:06:57.327 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:06:57.327 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-03 03:06:57.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:57.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:06:57.518 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:06:57.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:57.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:57.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:57.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:57.990 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:06:58.461 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:06:58.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:06:58.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:06:58.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:06:58.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:06:58.935 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:06:59.407 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:06:59.878 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:07:00.350 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:07:00.821 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:07:01.290 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:07:01.762 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:07:02.235 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:07:02.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:07:02.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:07:02.330 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:07:02.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:07:02.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:02.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:02.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:02.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:02.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:02.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:02.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:02.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:02.349 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:07:02.349 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:07:02.349 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:07:02.349 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:02.349 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:07.354 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:07:07.354 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:07:07.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:07.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:07.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:07.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:07.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:07.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:07:07.363 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:07.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:07:07.363 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:07:07.366 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:07:07.366 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:07:07.366 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:07:07.366 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:07.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:07.367 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:07:07.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:07:07.367 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:07:07.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:07.369 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:07:07.369 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:07:07.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:07:07.369 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:07.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:07.369 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:07:07.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:07:07.369 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:07:07.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:07.371 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:07:07.371 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:07:07.371 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:07:07.371 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:07.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:07.371 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:07:07.372 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:07:07.372 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:07:07.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:07.374 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:07:07.374 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:07:07.374 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:07:07.375 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:07.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:07.379 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:07:07.857 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:07:07.899 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:07:07.901 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:07:07.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:07:07.904 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:07:07.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:07:07.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:07:07.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:07:07.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:07:07.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:07:07.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:07:07.914 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:07:07.914 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:07:07.948 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:07:07.948 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-03 03:07:07.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:07:07.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:07:08.329 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:07:08.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:08.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:08.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:08.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:08.801 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:07:09.274 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:07:09.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:09.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:09.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:09.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:09.746 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:07:10.218 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:07:10.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:10.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:10.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:10.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:10.692 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:07:11.164 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:07:11.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:11.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:11.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:11.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:11.635 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:07:12.107 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:07:12.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:12.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:12.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:12.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:12.580 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:07:12.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:07:12.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:07:12.954 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:07:12.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:12.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:12.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:12.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:12.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:12.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:12.965 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:07:12.965 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:07:12.965 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:07:12.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:12.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:12.965 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1208 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:12.965 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1208 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:12.965 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1208 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:12.965 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1208 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:12.965 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1208 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:12.965 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1208 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:12.965 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:17.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:07:17.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:07:17.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:17.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:17.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:17.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:17.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:17.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:07:17.983 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:17.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:07:17.983 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:07:17.985 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:07:17.986 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:07:17.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:07:17.986 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:17.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:17.986 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:07:17.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:07:17.987 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:07:17.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:17.988 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:07:17.988 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:07:17.988 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:07:17.988 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:17.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:17.988 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:07:17.988 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:07:17.988 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:07:17.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:17.990 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:07:17.990 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:07:17.990 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:07:17.990 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:17.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:17.991 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:07:17.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:07:17.991 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:07:17.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:17.992 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:07:17.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:07:17.993 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:07:17.993 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:07:17.993 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:17.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:17.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:17.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:17.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:17.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:17.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:17.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:17.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:17.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:17.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:17.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:17.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:17.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:17.998 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:07:18.474 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:07:18.522 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:07:18.525 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:07:18.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:07:18.527 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:07:18.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:07:18.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:07:18.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:07:18.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:07:18.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:07:18.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:07:18.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:07:18.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:07:18.946 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:07:18.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:18.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:18.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:18.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:19.418 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:07:19.891 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:07:19.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:19.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:19.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:19.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:20.363 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:07:20.835 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:07:20.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:20.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:20.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:20.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:21.306 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:07:21.590 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:07:21.590 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-03 03:07:21.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:07:21.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:07:21.779 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:07:22.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:22.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:22.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:22.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:22.252 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:07:22.724 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:07:23.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:23.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:23.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:23.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:23.197 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:07:23.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:07:23.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:07:23.593 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:07:23.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:07:23.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:23.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:23.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:23.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:23.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:23.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:23.605 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:07:23.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:07:23.605 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:07:23.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:23.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:28.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:07:28.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:07:28.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:28.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:28.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:28.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:28.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:28.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:07:28.620 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:28.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:07:28.620 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:07:28.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:07:28.621 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:07:28.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:07:28.621 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:28.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:28.621 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:07:28.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:07:28.621 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:07:28.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:28.623 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:07:28.623 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:07:28.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:07:28.623 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:28.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:28.623 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:07:28.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:07:28.623 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:07:28.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:28.625 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:07:28.625 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:07:28.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:07:28.625 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:28.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:28.625 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:07:28.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:07:28.625 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:07:28.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:07:28.627 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:07:28.627 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:07:28.627 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:28.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:28.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:28.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:28.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:28.632 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:07:29.110 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:07:29.149 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:07:29.152 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:07:29.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:07:29.154 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:07:29.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:07:29.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:07:29.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:07:29.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:07:29.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:07:29.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:07:29.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:07:29.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:07:29.582 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:07:29.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:29.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:29.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:29.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:30.053 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:07:30.527 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:07:30.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:30.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:30.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:30.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:30.999 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:07:31.471 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:07:31.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:31.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:31.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:31.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:31.942 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:07:32.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:07:32.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:07:32.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:07:32.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:32.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:32.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:32.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:32.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:32.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:32.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:07:32.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:07:32.264 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:07:32.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:32.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:32.265 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:32.265 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:32.265 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:32.265 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:32.265 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:32.265 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:32.265 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:37.274 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:07:37.274 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:07:37.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:37.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:37.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:37.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:37.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:37.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:07:37.284 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:37.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:07:37.284 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:07:37.288 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:07:37.288 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:07:37.288 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:07:37.289 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:37.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:37.289 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:07:37.290 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:07:37.290 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:07:37.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:37.292 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:07:37.293 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:07:37.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:07:37.293 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:37.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:37.294 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:07:37.294 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:07:37.294 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:07:37.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:37.296 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:07:37.297 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:07:37.297 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:07:37.297 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:37.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:37.297 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:07:37.297 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:07:37.297 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:07:37.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:37.302 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:07:37.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:07:37.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:07:37.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:07:37.302 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:07:37.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:07:37.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:07:37.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:37.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:07:37.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:07:37.302 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:07:37.303 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:07:37.303 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:07:37.303 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:37.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:37.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:37.308 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:07:37.786 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:07:37.833 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:07:37.834 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:07:37.834 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:07:37.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:07:37.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:07:37.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:07:37.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:07:37.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:07:37.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:07:37.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:07:37.838 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:07:37.838 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:07:38.257 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:07:38.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:38.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:38.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:38.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:38.729 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:07:39.201 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:07:39.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:39.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:39.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:39.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:39.672 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:07:40.146 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:07:40.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:40.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:40.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:40.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:40.618 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:07:40.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:07:40.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:07:40.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:07:40.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:40.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:40.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:40.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:40.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:40.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:40.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:40.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:40.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:07:40.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:07:40.944 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:07:40.944 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:40.944 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:40.944 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:40.944 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:40.944 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:45.948 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:07:45.948 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:07:45.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:45.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:45.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:45.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:45.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:45.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:07:45.956 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:45.957 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:07:45.957 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:07:45.959 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:07:45.959 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:07:45.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:07:45.960 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:45.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:45.960 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:07:45.961 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:07:45.961 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:07:45.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:45.963 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:07:45.963 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:07:45.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:07:45.963 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:45.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:45.964 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:07:45.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:07:45.964 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:07:45.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:45.967 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:07:45.968 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:07:45.968 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:07:45.968 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:45.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:45.968 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:07:45.968 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:07:45.968 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:07:45.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:45.973 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:07:45.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:07:45.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:07:45.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:07:45.974 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:07:45.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:07:45.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:07:45.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:45.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:07:45.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:07:45.974 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:07:45.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:45.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:45.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:45.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:45.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:45.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:45.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:45.975 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:07:45.975 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:07:45.975 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:07:45.975 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:07:45.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:45.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:45.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:45.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:45.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:45.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:45.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:45.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:45.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:45.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:45.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:45.980 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:07:46.458 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:07:46.503 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:07:46.504 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:07:46.505 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:07:46.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:07:46.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:07:46.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:07:46.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:07:46.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:07:46.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:07:46.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:07:46.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:07:46.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:07:46.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:07:46.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:07:46.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:46.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:46.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:46.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:46.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:46.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:46.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:07:46.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:07:46.782 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:07:46.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:46.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:46.782 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:46.782 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:46.782 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:46.782 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:46.782 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:46.782 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:46.782 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:51.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:07:51.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:07:51.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:51.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:51.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:51.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:51.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:51.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:07:51.795 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:51.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:07:51.795 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:07:51.798 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:07:51.799 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:07:51.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:07:51.799 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:51.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:51.799 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:07:51.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:07:51.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:07:51.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:51.803 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:07:51.803 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:07:51.804 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:07:51.804 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:51.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:51.804 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:07:51.804 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:07:51.804 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:07:51.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:51.808 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:07:51.808 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:07:51.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:07:51.808 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:51.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:51.808 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:07:51.808 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:07:51.808 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:07:51.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:51.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:51.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:51.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:51.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:51.815 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:07:51.815 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:07:51.815 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:07:51.815 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:07:51.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:51.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:51.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:51.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:07:51.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:51.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:51.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:51.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:51.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:51.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:51.820 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:07:52.297 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:07:52.347 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:07:52.350 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:07:52.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:07:52.352 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:07:52.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:07:52.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:07:52.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:07:52.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:07:52.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:07:52.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:07:52.362 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:07:52.362 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:07:52.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:07:52.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:07:52.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:52.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:52.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:52.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:52.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:52.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:52.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:07:52.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:07:52.576 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:07:52.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:52.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:52.576 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=164 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:52.576 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=164 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:52.576 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=164 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:52.576 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=164 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:52.576 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:52.576 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:52.576 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:07:57.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:07:57.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:07:57.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:57.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:57.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:57.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:57.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:07:57.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:07:57.588 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:57.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:07:57.589 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:07:57.591 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:07:57.591 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:07:57.591 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:07:57.591 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:57.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:07:57.592 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:07:57.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:07:57.592 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:07:57.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:57.594 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:07:57.594 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:07:57.594 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:07:57.594 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:57.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:07:57.594 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:07:57.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:07:57.595 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:07:57.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:57.596 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:07:57.596 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:07:57.596 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:07:57.596 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:07:57.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:07:57.596 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:07:57.596 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:07:57.596 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:07:57.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:57.598 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:07:57.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:07:57.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:07:57.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:07:57.598 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:07:57.599 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:07:57.599 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:07:57.599 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:57.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:57.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:07:57.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:57.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:57.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:57.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:57.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:07:57.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:57.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:57.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:07:57.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:57.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:07:57.604 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:07:58.080 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:07:58.126 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:07:58.129 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:07:58.131 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:07:58.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:07:58.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:07:58.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:07:58.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:07:58.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:07:58.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:07:58.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:07:58.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:07:58.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:07:58.552 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:07:58.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:58.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:58.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:58.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:59.024 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:07:59.497 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:07:59.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:07:59.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:07:59.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:07:59.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:07:59.969 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:08:00.441 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:08:00.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:00.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:00.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:00.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:00.912 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:08:01.383 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:08:01.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:01.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:01.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:01.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:01.856 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:08:02.329 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:08:02.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:02.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:02.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:02.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:02.801 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:08:03.272 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:08:03.746 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:08:04.218 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:08:04.691 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:08:05.161 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:08:05.635 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:08:06.107 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:08:06.579 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:08:06.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:08:06.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:08:06.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:06.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:06.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:06.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:06.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:06.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:06.940 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:08:06.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:08:06.940 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:08:06.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:06.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:06.940 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2018 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:08:06.940 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:08:06.940 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:08:06.940 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:08:06.940 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:08:06.940 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:08:06.940 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:08:11.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:08:11.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:08:11.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:11.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:11.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:11.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:11.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:11.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:08:11.956 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:11.957 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:08:11.957 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:08:11.962 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:08:11.962 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:08:11.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:08:11.962 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:11.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:11.963 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:08:11.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:08:11.963 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:08:11.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:11.969 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:08:11.969 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:08:11.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:08:11.969 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:11.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:11.970 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:08:11.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:08:11.970 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:08:11.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:11.975 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:08:11.975 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:08:11.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:08:11.975 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:11.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:11.976 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:08:11.976 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:08:11.976 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:08:11.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:11.982 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:08:11.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:11.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:11.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:11.984 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:08:11.984 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:08:11.984 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:08:11.984 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:08:11.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:11.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:11.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:11.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:08:11.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:11.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:11.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:11.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:11.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:11.988 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:08:12.465 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:08:12.513 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:08:12.516 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:08:12.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:08:12.518 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:08:12.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:08:12.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:08:12.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:08:12.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:08:12.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:08:12.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:08:12.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:08:12.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:08:12.937 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:08:12.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:12.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:12.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:12.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:13.408 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:08:13.882 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:08:13.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:13.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:13.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:13.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:14.354 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:08:14.826 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:08:14.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:14.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:14.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:14.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:15.297 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:08:15.771 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:08:15.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:15.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:15.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:15.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:16.243 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:08:16.716 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:08:16.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:16.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:16.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:16.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:17.189 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:08:17.662 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:08:18.134 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:08:18.605 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:08:19.075 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:08:19.549 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:08:20.021 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:08:20.494 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:08:20.967 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:08:21.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:08:21.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:08:21.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:21.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:21.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:21.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:21.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:21.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:21.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:08:21.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:08:21.323 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:08:21.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:21.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:26.329 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:08:26.329 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:08:26.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:26.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:26.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:26.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:26.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:26.338 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:08:26.338 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:26.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:08:26.339 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:08:26.345 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:08:26.345 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:08:26.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:08:26.345 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:26.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:26.346 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:08:26.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:08:26.346 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:08:26.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:26.350 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:08:26.350 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:08:26.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:08:26.351 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:26.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:26.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:08:26.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:08:26.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:08:26.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:26.355 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:08:26.355 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:08:26.355 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:08:26.355 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:26.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:26.355 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:08:26.356 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:08:26.356 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:08:26.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:26.361 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:08:26.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:08:26.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:08:26.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:08:26.361 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:08:26.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:08:26.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:08:26.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:26.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:08:26.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:08:26.362 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:08:26.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:26.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:26.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:26.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:26.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:26.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:26.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:26.362 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:08:26.362 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:08:26.362 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:08:26.362 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:26.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:26.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:26.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:26.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:26.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:26.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:26.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:26.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:26.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:26.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:26.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:26.367 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:08:26.846 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:08:26.892 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:08:26.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:08:26.895 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:08:26.898 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:08:26.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:08:26.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:08:26.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:08:26.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:08:26.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:08:26.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:08:26.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:08:26.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:08:27.316 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:08:27.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:27.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:27.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:27.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:27.789 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:08:28.260 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:08:28.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:28.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:28.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:28.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:28.732 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:08:29.205 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:08:29.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:29.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:29.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:29.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:29.677 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:08:29.938 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:08:29.939 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-03 03:08:29.939 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:08:29.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:08:29.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:08:30.150 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:08:30.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:30.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:30.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:30.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:30.623 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:08:30.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:08:30.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:08:30.986 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:08:30.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:08:30.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:30.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:30.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:30.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:30.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:30.995 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:30.995 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:08:30.995 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:08:30.995 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:08:30.995 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:30.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:36.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:08:36.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:08:36.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:36.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:36.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:36.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:36.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:36.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:08:36.009 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:36.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:08:36.010 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:08:36.012 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:08:36.013 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:08:36.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:08:36.013 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:36.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:36.013 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:08:36.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:08:36.014 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:08:36.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:36.017 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:08:36.017 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:08:36.017 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:08:36.017 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:36.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:36.017 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:08:36.017 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:08:36.017 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:08:36.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:36.020 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:08:36.020 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:08:36.020 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:08:36.020 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:36.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:36.020 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:08:36.020 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:08:36.020 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:08:36.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:36.024 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:08:36.024 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:08:36.024 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:08:36.024 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:36.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:36.029 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:08:36.507 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:08:36.559 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:08:36.561 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:08:36.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:08:36.563 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:08:36.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:36.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:36.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:36.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:36.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:36.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:36.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:36.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:36.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:08:36.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:08:36.628 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:08:36.628 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:08:36.628 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:08:36.628 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:08:36.628 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:08:36.628 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:08:36.628 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:08:36.628 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:08:41.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:08:41.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:08:41.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:41.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:41.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:41.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:41.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:41.645 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:08:41.645 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:41.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:08:41.646 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:08:41.651 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:08:41.651 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:08:41.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:08:41.651 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:41.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:41.652 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:08:41.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:08:41.653 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:08:41.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:41.655 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:08:41.656 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:08:41.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:08:41.656 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:41.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:41.657 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:08:41.658 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:08:41.658 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:08:41.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:41.660 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:08:41.660 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:08:41.660 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:08:41.660 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:41.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:41.660 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:08:41.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:08:41.661 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:08:41.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:41.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:08:41.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:41.666 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:08:41.666 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:08:41.667 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:08:41.667 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:08:41.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:41.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:41.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:41.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:08:41.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:41.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:41.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:41.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:41.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:41.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:41.671 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:08:42.149 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:08:42.203 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:08:42.205 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:08:42.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:08:42.207 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:08:42.618 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:08:42.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:42.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:42.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:42.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:43.090 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:08:43.563 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:08:43.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:43.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:43.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:43.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:44.035 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:08:44.510 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:08:44.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:44.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:44.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:44.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:44.982 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:08:45.453 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:08:45.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:45.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:45.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:45.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:45.928 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:08:46.400 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:08:46.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:46.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:46.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:46.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:46.871 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:08:47.346 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:08:47.818 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:08:48.293 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:08:48.765 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:08:49.241 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:08:49.712 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:08:50.187 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:08:50.659 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:08:51.130 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:08:51.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:08:51.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:51.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:51.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:51.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:51.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:51.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:51.230 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:08:51.230 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:08:51.230 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:08:51.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:51.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:56.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:08:56.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:08:56.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:56.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:56.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:56.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:56.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:08:56.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:08:56.251 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:56.252 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:08:56.252 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:08:56.255 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:08:56.256 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:08:56.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:08:56.256 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:56.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:08:56.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:08:56.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:08:56.257 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:08:56.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:56.259 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:08:56.259 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:08:56.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:08:56.260 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:56.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:08:56.260 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:08:56.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:08:56.260 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:08:56.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:56.262 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:08:56.262 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:08:56.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:08:56.262 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:08:56.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:08:56.262 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:08:56.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:08:56.262 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:08:56.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:56.265 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:08:56.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:08:56.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:08:56.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:08:56.265 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:08:56.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:08:56.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:08:56.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:56.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:08:56.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:08:56.265 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:08:56.266 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:08:56.266 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:08:56.266 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:56.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:56.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:56.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:08:56.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:08:56.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:56.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:56.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:08:56.271 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:08:56.749 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:08:56.795 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:08:56.797 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:08:56.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:08:56.798 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:08:57.220 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:08:57.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:57.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:57.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:57.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:57.692 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:08:58.163 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:08:58.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:58.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:58.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:58.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:58.639 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:08:59.111 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:08:59.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:08:59.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:08:59.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:08:59.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:08:59.586 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:09:00.058 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:09:00.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:00.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:00.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:00.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:00.533 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:09:01.004 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:09:01.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:01.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:01.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:01.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:01.476 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:09:01.948 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:09:02.423 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:09:02.887 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:09:03.350 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:09:03.812 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:09:04.279 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:09:04.753 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:09:05.220 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:09:05.682 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:09:05.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:09:05.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:05.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:05.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:05.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:05.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:05.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:05.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:05.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:05.813 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:09:05.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:05.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:10.820 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:10.820 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:10.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:10.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:10.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:10.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:10.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:10.827 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:09:10.827 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:10.827 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:09:10.827 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:09:10.829 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:09:10.829 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:09:10.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:09:10.829 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:10.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:10.829 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:09:10.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:09:10.829 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:09:10.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:10.830 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:09:10.830 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:09:10.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:09:10.830 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:10.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:10.830 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:09:10.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:09:10.830 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:09:10.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:10.831 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:09:10.831 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:09:10.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:09:10.832 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:10.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:10.832 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:09:10.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:09:10.832 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:09:10.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:10.833 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:09:10.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:09:10.833 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:09:10.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:09:10.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:09:10.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:09:10.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:09:10.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:09:10.834 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:09:10.834 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:09:10.834 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:10.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:10.838 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:09:11.309 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:09:11.349 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:09:11.350 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:09:11.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:09:11.351 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:09:11.777 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:09:11.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:11.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:11.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:11.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:12.242 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:09:12.712 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:09:12.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:12.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:12.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:12.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:13.177 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:09:13.643 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:09:13.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:13.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:13.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:13.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:14.108 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:09:14.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:09:14.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:14.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:14.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:14.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:14.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:14.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:14.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:14.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:14.386 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:09:14.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:14.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:14.386 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=776 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:14.387 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=776 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:14.387 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=776 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:14.387 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=776 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:14.387 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=776 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:14.387 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=776 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:14.387 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=776 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:19.393 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:19.393 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:19.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:19.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:19.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:19.393 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:19.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:19.403 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:09:19.403 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:19.403 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:09:19.404 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:09:19.405 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:09:19.406 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:09:19.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:09:19.406 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:19.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:19.406 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:09:19.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:09:19.406 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:09:19.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:19.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:09:19.408 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:09:19.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:09:19.408 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:19.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:19.408 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:09:19.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:09:19.408 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:09:19.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:19.409 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:09:19.409 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:09:19.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:09:19.409 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:19.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:19.409 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:09:19.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:09:19.409 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:09:19.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:19.411 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:09:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:09:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:09:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:09:19.411 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:09:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:09:19.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:09:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:19.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:09:19.412 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:09:19.412 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:09:19.412 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:19.416 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:09:19.882 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:09:19.939 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:09:19.940 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:09:19.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:09:19.942 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:09:19.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:09:19.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:09:19.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:09:19.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:09:19.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:09:19.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:09:19.956 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:09:19.956 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:09:19.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:09:19.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:09:19.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:09:19.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:09:19.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:09:20.346 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:09:20.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:09:20.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:09:20.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:09:20.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:09:20.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:20.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:20.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:20.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:20.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:20.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:20.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:20.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:20.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:20.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:20.365 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:09:20.365 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:20.365 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:25.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:25.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:25.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:25.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:25.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:25.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:25.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:25.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:09:25.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:25.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:09:25.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:09:25.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:09:25.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:09:25.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:09:25.391 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:25.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:25.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:09:25.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:09:25.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:09:25.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:25.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:09:25.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:09:25.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:09:25.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:25.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:25.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:09:25.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:09:25.395 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:09:25.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:25.397 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:09:25.397 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:09:25.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:09:25.397 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:25.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:25.397 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:09:25.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:09:25.398 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:09:25.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:25.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:09:25.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:09:25.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:09:25.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:09:25.400 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:09:25.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:09:25.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:09:25.401 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:09:25.401 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:25.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:25.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:25.406 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:09:25.873 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:09:25.914 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:09:25.914 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:09:25.915 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:09:25.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:09:25.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:25.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:25.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:25.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:25.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:25.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:25.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:25.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:25.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:25.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:25.920 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:09:25.920 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:25.920 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:25.920 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:25.920 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:25.920 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:25.920 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:25.920 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:30.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:30.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:30.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:30.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:30.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:30.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:30.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:30.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:09:30.944 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:30.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:09:30.944 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:09:30.947 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:09:30.947 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:09:30.948 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:09:30.948 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:30.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:30.948 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:09:30.948 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:09:30.948 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:09:30.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:30.950 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:09:30.951 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:09:30.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:09:30.951 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:30.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:30.951 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:09:30.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:09:30.951 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:09:30.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:30.953 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:09:30.953 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:09:30.953 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:09:30.953 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:30.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:30.953 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:09:30.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:09:30.954 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:09:30.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:30.956 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:09:30.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:09:30.956 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:09:30.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:09:30.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:09:30.957 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:09:30.957 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:09:30.957 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:30.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:30.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:30.962 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:09:31.430 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:09:31.476 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:09:31.477 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:09:31.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:09:31.478 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:09:31.896 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:09:31.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:31.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:31.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:31.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:32.368 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:09:32.835 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:09:32.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:32.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:32.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:32.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:33.299 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:09:33.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:33.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:33.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:33.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:33.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:33.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:33.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:33.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:33.485 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:09:33.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:33.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:33.486 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=553 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:33.486 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=553 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:33.486 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=553 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:33.486 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=553 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:33.486 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=553 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:33.486 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=553 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:33.486 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=553 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:38.492 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:38.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:38.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:38.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:38.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:38.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:38.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:38.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:09:38.500 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:38.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:09:38.501 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:09:38.504 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:09:38.504 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:09:38.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:09:38.505 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:38.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:38.506 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:09:38.506 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:09:38.506 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:09:38.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:38.509 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:09:38.509 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:09:38.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:09:38.510 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:38.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:38.510 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:09:38.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:09:38.511 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:09:38.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:38.513 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:09:38.513 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:09:38.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:09:38.513 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:38.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:38.513 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:09:38.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:09:38.514 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:09:38.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:38.519 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:09:38.519 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:09:38.519 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:09:38.519 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:09:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:38.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:09:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:38.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:38.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:38.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:38.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:38.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:38.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:38.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:38.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:38.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:38.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:38.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:38.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:38.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:38.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:38.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:38.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:38.524 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:09:39.002 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:09:39.051 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:09:39.053 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:09:39.055 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:09:39.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:09:39.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:09:39.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:09:39.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:09:39.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:09:39.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:09:39.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:09:39.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:09:39.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:09:39.470 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:09:39.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:39.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:39.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:39.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:39.937 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:09:40.410 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:09:40.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:40.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:40.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:40.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:40.882 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:09:41.353 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:09:41.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:41.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:41.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:41.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:41.827 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:09:41.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:09:41.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:09:41.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:41.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:41.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:41.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:41.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:41.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:41.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:41.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:41.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:41.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:41.851 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:09:41.852 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=722 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:41.852 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:41.852 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:41.852 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:41.852 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:41.852 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:41.853 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:46.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:46.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:46.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:46.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:46.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:46.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:46.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:46.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:09:46.862 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:46.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:09:46.863 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:09:46.868 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:09:46.868 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:09:46.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:09:46.868 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:46.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:46.869 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:09:46.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:09:46.870 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:09:46.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:46.871 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:09:46.872 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:09:46.872 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:09:46.872 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:46.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:46.872 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:09:46.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:09:46.873 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:09:46.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:46.874 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:09:46.874 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:09:46.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:09:46.874 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:46.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:46.875 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:09:46.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:09:46.875 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:09:46.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:46.877 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:09:46.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:09:46.878 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:09:46.878 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:09:46.878 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:46.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:46.883 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:09:47.360 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:09:47.403 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:09:47.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:09:47.407 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:09:47.411 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:09:47.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:09:47.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:09:47.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:09:47.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:09:47.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:09:47.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:09:47.418 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:09:47.418 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:09:47.832 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:09:47.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:47.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:47.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:47.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:48.306 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:09:48.778 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:09:48.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:48.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:48.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:48.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:49.250 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:09:49.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:09:49.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:09:49.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:49.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:49.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:49.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:49.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:49.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:49.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:49.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:49.515 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:09:49.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:49.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:49.516 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:49.516 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:49.516 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:49.516 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:49.516 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:49.516 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:49.516 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:54.521 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:54.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:54.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:54.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:54.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:54.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:54.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:54.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:09:54.539 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:54.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:09:54.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:09:54.543 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:09:54.543 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:09:54.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:09:54.544 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:54.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:54.545 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:09:54.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:09:54.545 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:09:54.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:54.548 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:09:54.548 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:09:54.548 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:09:54.548 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:54.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:54.549 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:09:54.549 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:09:54.549 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:09:54.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:54.551 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:09:54.551 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:09:54.551 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:09:54.551 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:09:54.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:54.551 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:09:54.551 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:09:54.551 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:09:54.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:54.554 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:09:54.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:09:54.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:09:54.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:09:54.554 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:09:54.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:09:54.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:09:54.555 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:09:54.555 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:54.555 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:54.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:54.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:09:54.560 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:09:55.037 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:09:55.077 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:09:55.078 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:09:55.080 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:09:55.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:09:55.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:09:55.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:09:55.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:09:55.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:09:55.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:09:55.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:09:55.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:09:55.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:09:55.509 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:09:55.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:55.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:55.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:55.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:55.981 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:09:56.454 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:09:56.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:56.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:56.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:56.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:56.926 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:09:57.398 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:09:57.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:57.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:57.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:57.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:57.869 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:09:57.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:09:57.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:09:57.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:09:57.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:09:57.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:09:57.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:09:57.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:09:57.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:09:57.891 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:09:57.891 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:09:57.891 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:09:57.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:09:57.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:09:57.891 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=721 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:57.891 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:57.891 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:57.891 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:57.891 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:57.891 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:09:57.891 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:02.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:02.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:02.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:02.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:02.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:02.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:02.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:02.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:02.911 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:02.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:02.911 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:10:02.914 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:10:02.914 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:10:02.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:02.915 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:02.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:02.915 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:10:02.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:02.916 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:10:02.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:02.919 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:10:02.919 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:10:02.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:02.919 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:02.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:02.920 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:10:02.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:02.920 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:10:02.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:02.923 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:10:02.923 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:10:02.923 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:02.924 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:02.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:02.924 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:10:02.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:02.924 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:10:02.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:02.928 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:10:02.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:10:02.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:10:02.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:10:02.928 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:10:02.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:10:02.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:10:02.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:10:02.929 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:10:02.929 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:10:02.929 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:02.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:02.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:02.934 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:10:03.412 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:10:03.459 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:10:03.462 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:10:03.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:10:03.464 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:10:03.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:10:03.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:10:03.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:10:03.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:10:03.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:10:03.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:10:03.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:10:03.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:10:03.883 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:10:03.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:03.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:03.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:03.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:04.355 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:10:04.826 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:10:04.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:04.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:04.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:04.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:05.299 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:10:05.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:10:05.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:10:05.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:05.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:05.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:05.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:05.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:05.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:05.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:05.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:05.561 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:10:05.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:05.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:10.565 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:10.565 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:10.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:10.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:10.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:10.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:10.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:10.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:10.575 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:10.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:10.575 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:10:10.578 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:10:10.578 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:10:10.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:10.579 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:10.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:10.579 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:10:10.579 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:10.579 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:10:10.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:10.581 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:10:10.581 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:10:10.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:10.581 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:10.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:10.581 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:10:10.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:10.581 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:10:10.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:10.583 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:10:10.583 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:10:10.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:10.583 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:10.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:10.583 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:10:10.584 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:10.584 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:10:10.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:10.586 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:10:10.586 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:10:10.586 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:10:10.587 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:10.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:10.591 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:10:11.068 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:10:11.115 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:10:11.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:10:11.118 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:10:11.120 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:10:11.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:10:11.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:10:11.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:10:11.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:10:11.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:10:11.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:10:11.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:10:11.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:10:11.539 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:10:11.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:11.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:11.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:11.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:12.011 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:10:12.484 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:10:12.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:12.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:12.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:12.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:12.956 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:10:13.428 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:10:13.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:13.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:13.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:13.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:13.899 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:10:14.370 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:10:14.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:14.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:14.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:14.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:14.843 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:10:14.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:10:14.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:10:14.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:14.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:14.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:14.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:14.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:14.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:14.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:14.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:14.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:14.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:14.866 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:10:19.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:19.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:19.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:19.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:19.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:19.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:19.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:19.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:19.884 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:19.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:19.885 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:10:19.889 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:10:19.890 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:10:19.890 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:19.890 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:19.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:19.892 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:10:19.892 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:19.892 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:10:19.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:19.894 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:10:19.895 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:10:19.895 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:19.895 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:19.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:19.896 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:10:19.896 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:19.896 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:10:19.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:19.898 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:10:19.898 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:10:19.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:19.898 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:19.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:19.899 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:10:19.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:19.899 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:10:19.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:19.904 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:10:19.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:10:19.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:10:19.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:10:19.904 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:10:19.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:10:19.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:10:19.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:19.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:10:19.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:10:19.905 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:10:19.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:19.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:19.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:19.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:19.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:19.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:19.905 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:10:19.905 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:10:19.905 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:10:19.906 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:19.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:19.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:19.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:19.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:19.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:19.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:19.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:19.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:19.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:19.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:19.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:19.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:19.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:19.910 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:10:20.388 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:10:20.440 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:10:20.442 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:10:20.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:10:20.444 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:10:20.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:10:20.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:10:20.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:10:20.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:10:20.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:10:20.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:10:20.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:10:20.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:10:20.860 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:10:20.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:20.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:20.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:20.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:21.331 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:10:21.805 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:10:21.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:21.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:21.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:21.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:22.277 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:10:22.749 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:10:22.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:22.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:22.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:22.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:23.220 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:10:23.694 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:10:23.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:23.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:23.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:23.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:24.165 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:10:24.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:10:24.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:10:24.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:24.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:24.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:24.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:24.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:24.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:24.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:24.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:24.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:24.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:24.425 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:10:29.432 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:29.432 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:29.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:29.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:29.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:29.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:29.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:29.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:29.444 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:29.444 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:29.444 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:10:29.450 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:10:29.450 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:10:29.451 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:29.451 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:29.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:29.452 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:10:29.452 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:29.452 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:10:29.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:29.455 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:10:29.455 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:10:29.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:29.456 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:29.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:29.457 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:10:29.457 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:29.457 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:10:29.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:29.459 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:10:29.460 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:10:29.460 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:29.460 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:29.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:29.460 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:10:29.460 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:29.460 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:10:29.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:29.464 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:10:29.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:10:29.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:10:29.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:10:29.464 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:10:29.465 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:10:29.465 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:10:29.465 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:29.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:29.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:29.470 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:10:29.948 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:10:29.998 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:10:30.001 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:10:30.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:10:30.003 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:10:30.421 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:10:30.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:30.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:30.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:30.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:30.896 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:10:31.368 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:10:31.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:31.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:31.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:31.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:31.843 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:10:32.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:32.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:32.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:32.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:32.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:32.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:32.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:32.019 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:32.019 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:10:32.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:32.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:32.019 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=550 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:32.019 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=550 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:32.019 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=550 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:32.019 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=550 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:32.019 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=550 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:32.019 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=550 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:32.019 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=550 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:37.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:37.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:37.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:37.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:37.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:37.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:37.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:37.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:37.035 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:37.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:37.036 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:10:37.040 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:10:37.041 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:10:37.041 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:37.041 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:37.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:37.042 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:10:37.043 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:37.043 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:10:37.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:37.046 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:10:37.046 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:10:37.047 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:37.047 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:37.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:37.048 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:10:37.048 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:37.048 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:10:37.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:37.050 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:10:37.050 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:10:37.050 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:37.050 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:37.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:37.051 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:10:37.051 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:37.051 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:10:37.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:37.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:10:37.056 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:10:37.056 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:10:37.056 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:37.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:37.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:37.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:37.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:37.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:37.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:37.060 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:10:37.539 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:10:37.583 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:10:37.586 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:10:37.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:10:37.588 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:10:37.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:10:37.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:10:37.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:10:37.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:37.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:10:38.006 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:10:38.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:38.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:38.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:38.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:38.477 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:10:38.951 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:10:39.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:39.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:39.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:39.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:39.423 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:10:39.894 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:10:40.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:40.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:40.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:40.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:40.369 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:10:40.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:10:40.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:40.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:40.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:40.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:40.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:40.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:40.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:40.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:40.649 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:10:40.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:40.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:40.649 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=776 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:40.649 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=776 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:40.649 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=776 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:40.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=776 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:40.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=776 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:40.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=776 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:40.650 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=776 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:45.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:45.650 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:45.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:45.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:45.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:45.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:45.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:45.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:45.660 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:45.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:45.660 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:10:45.664 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:10:45.664 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:10:45.665 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:45.665 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:45.665 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:10:45.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:45.665 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:45.665 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:10:45.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:45.668 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:10:45.668 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:10:45.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:45.668 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:45.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:45.669 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:10:45.669 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:45.669 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:10:45.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:45.671 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:10:45.671 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:10:45.671 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:45.671 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:45.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:45.672 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:10:45.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:45.672 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:10:45.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:45.676 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:10:45.676 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:10:45.676 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:10:45.677 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:10:45.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:45.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:45.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:45.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:10:45.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:45.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:45.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:45.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:45.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:45.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:45.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:45.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:45.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:45.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:45.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:45.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:45.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:45.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:45.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:45.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:45.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:45.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:45.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:45.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:45.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:45.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:45.681 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:10:46.159 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:10:46.207 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:10:46.209 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:10:46.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:10:46.212 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:10:46.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:10:46.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:10:46.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:10:46.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:46.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:10:46.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:10:46.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:46.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:46.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:46.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:46.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:46.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:46.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:46.243 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:46.243 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:10:46.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:46.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:46.243 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:46.243 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:46.244 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:46.244 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:46.244 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:46.244 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:46.244 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:51.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:51.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:51.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:51.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:51.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:51.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:51.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:51.259 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:51.259 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:51.259 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:51.259 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:10:51.265 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:10:51.265 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:10:51.265 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:51.265 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:51.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:51.265 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:10:51.265 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:51.265 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:10:51.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:51.268 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:10:51.268 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:10:51.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:51.269 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:51.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:51.269 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:10:51.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:51.269 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:10:51.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:51.271 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:10:51.272 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:10:51.272 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:51.272 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:51.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:51.272 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:10:51.272 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:51.272 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:10:51.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:51.276 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:10:51.276 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:10:51.276 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:10:51.277 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:51.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:51.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:51.281 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:10:51.759 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:10:51.801 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:10:51.802 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:10:51.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:10:51.803 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:10:51.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:10:51.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:10:51.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:10:51.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:51.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:10:52.231 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:10:52.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:52.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:52.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:52.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:52.707 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:10:53.178 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:10:53.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:53.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:53.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:53.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:53.653 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:10:54.125 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:10:54.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:54.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:54.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:54.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:54.596 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:10:54.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:10:54.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:54.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:54.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:54.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:54.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:54.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:54.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:54.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:54.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:54.856 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:54.856 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:54.856 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:10:54.856 [WARNING] transceiver.py:257 (TRX1@172.18.37.20:5700/1) RX TRXD message (ver=1 fn=772 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:54.856 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=771 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:54.856 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=771 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:54.856 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=772 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:54.856 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=772 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:54.856 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=772 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:54.856 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=772 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:54.856 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=772 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:54.856 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=772 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:54.856 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=772 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:54.856 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=772 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:10:59.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:10:59.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:10:59.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:59.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:59.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:59.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:59.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:10:59.868 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:59.868 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:59.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:10:59.869 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:10:59.871 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:10:59.872 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:10:59.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:59.872 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:59.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:10:59.873 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:10:59.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:10:59.873 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:10:59.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:10:59.876 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:10:59.876 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:10:59.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:59.877 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:59.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:10:59.877 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:10:59.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:10:59.878 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:10:59.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:10:59.880 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:10:59.880 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:10:59.880 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:59.880 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:10:59.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:10:59.881 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:10:59.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:10:59.881 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:10:59.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:10:59.886 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:10:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:10:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:10:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:10:59.886 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:10:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:10:59.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:10:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:10:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:10:59.886 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:10:59.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:59.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:59.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:59.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:10:59.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:59.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:59.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:59.887 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:10:59.887 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:10:59.887 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:10:59.887 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:10:59.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:59.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:59.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:59.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:10:59.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:59.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:59.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:59.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:59.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:59.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:59.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:59.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:59.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:59.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:59.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:59.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:10:59.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:59.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:59.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:59.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:59.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:59.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:10:59.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:59.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:10:59.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:59.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:10:59.892 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:11:00.370 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:11:00.424 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:11:00.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:00.427 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:11:00.430 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:11:00.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:11:00.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:11:00.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:11:00.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:00.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:00.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:00.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:00.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:00.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:00.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:00.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:00.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:00.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:00.471 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:00.471 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:00.471 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:11:00.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:00.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:00.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:00.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:00.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:00.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:00.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:00.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:00.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:00.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:05.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:05.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:05.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:05.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:05.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:05.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:05.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:05.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:05.482 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:05.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:05.483 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:11:05.486 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:11:05.487 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:11:05.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:05.487 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:05.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:05.488 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:11:05.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:05.488 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:11:05.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:05.490 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:11:05.490 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:11:05.491 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:05.491 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:05.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:05.491 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:11:05.491 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:05.491 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:11:05.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:05.493 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:11:05.493 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:11:05.493 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:05.493 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:05.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:05.494 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:11:05.494 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:05.494 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:11:05.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:05.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:11:05.498 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:11:05.498 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:11:05.498 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:05.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:05.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:05.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:05.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:05.502 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:11:05.979 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:11:06.027 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:11:06.029 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:11:06.031 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:11:06.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:06.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:06.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:06.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:06.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:06.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:06.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:06.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:06.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:06.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:06.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:06.047 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:11:06.047 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:06.047 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:06.047 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:11.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:11.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:11.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:11.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:11.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:11.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:11.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:11.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:11.062 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:11.063 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:11.063 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:11:11.068 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:11:11.069 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:11:11.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:11.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:11.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:11.070 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:11:11.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:11.071 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:11:11.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:11.074 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:11:11.074 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:11:11.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:11.075 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:11.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:11.076 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:11:11.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:11.076 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:11:11.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:11.078 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:11:11.078 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:11:11.078 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:11.078 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:11.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:11.079 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:11:11.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:11.079 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:11:11.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:11.083 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:11:11.083 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:11:11.084 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:11:11.084 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:11:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:11.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:11:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:11.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:11.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:11.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:11.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:11.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:11.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:11.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:11.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:11.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:11.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:11.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:11.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:11.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:11.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:11.088 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:11:11.567 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:11:11.615 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:11:11.618 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:11:11.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:11.620 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:11:11.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:11.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:11.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:11.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:11.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:11.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:11.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:11.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:11.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:11.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:11.638 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:11:11.638 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:11.638 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:11.638 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:11.638 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:11.639 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:11.639 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:11.639 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:16.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:16.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:16.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:16.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:16.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:16.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:16.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:16.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:16.647 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:16.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:16.647 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:11:16.651 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:11:16.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:11:16.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:16.652 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:16.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:16.653 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:11:16.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:16.653 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:11:16.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:16.655 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:11:16.655 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:11:16.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:16.655 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:16.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:16.656 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:11:16.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:16.656 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:11:16.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:16.658 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:11:16.658 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:11:16.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:16.658 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:16.658 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:16.659 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:11:16.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:16.659 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:11:16.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:16.662 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:11:16.662 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:11:16.662 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:11:16.662 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:16.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:16.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:16.667 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:11:17.144 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:11:17.187 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:11:17.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:17.191 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:11:17.193 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:11:17.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:17.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:17.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:17.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:17.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:17.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:17.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:17.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:17.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:17.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:17.209 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:11:22.213 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:22.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:22.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:22.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:22.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:22.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:22.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:22.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:22.222 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:22.223 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:22.223 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:11:22.225 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:11:22.225 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:11:22.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:22.226 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:22.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:22.227 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:11:22.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:22.227 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:11:22.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:22.228 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:11:22.228 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:11:22.229 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:22.229 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:22.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:22.229 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:11:22.229 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:22.229 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:11:22.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:22.231 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:11:22.232 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:11:22.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:22.232 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:22.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:22.232 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:11:22.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:22.232 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:11:22.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:22.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:22.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:22.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:22.237 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:11:22.237 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:11:22.237 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:11:22.237 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:11:22.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:22.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:22.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:22.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:11:22.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:22.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:22.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:22.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:22.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:22.242 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:11:22.719 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:11:22.767 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:11:22.769 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:11:22.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:22.773 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:11:22.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:22.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:22.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:22.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:22.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:22.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:22.791 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:22.791 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:22.791 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:11:22.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:22.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:22.792 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:22.792 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:22.792 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:22.792 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:22.792 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:22.792 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:22.792 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:27.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:27.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:27.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:27.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:27.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:27.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:27.802 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:27.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:27.804 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:27.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:27.804 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:11:27.809 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:11:27.810 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:11:27.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:27.810 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:27.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:27.810 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:11:27.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:27.811 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:11:27.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:27.814 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:11:27.815 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:11:27.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:27.815 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:27.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:27.815 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:11:27.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:27.815 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:11:27.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:27.819 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:11:27.819 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:11:27.819 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:27.819 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:27.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:27.819 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:11:27.819 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:27.819 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:11:27.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:27.823 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:11:27.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:11:27.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:11:27.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:11:27.823 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:11:27.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:11:27.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:11:27.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:27.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:11:27.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:11:27.824 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:11:27.824 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:11:27.824 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:27.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:27.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:27.829 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:11:28.301 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:11:28.349 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:11:28.350 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:11:28.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:28.352 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:11:28.768 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:11:28.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:28.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:28.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:28.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:29.243 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:11:29.715 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:11:29.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:29.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:29.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:29.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:30.187 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:11:30.662 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:11:30.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:30.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:30.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:30.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:31.134 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:11:31.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:11:31.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:11:31.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:11:31.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:11:31.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:11:31.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:11:31.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:11:31.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:11:31.607 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:11:31.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:31.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:31.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:31.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:32.080 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:11:32.553 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:11:32.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:32.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:32.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:32.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:33.024 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:11:33.497 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:11:33.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:11:33.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:11:33.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:33.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:33.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:33.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:33.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:33.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:33.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:33.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:33.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:33.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:33.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:33.629 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:11:33.629 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1255 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:33.630 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1255 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:33.630 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1255 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:33.630 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1255 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:33.630 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1255 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:33.630 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1255 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:33.630 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:38.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:38.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:38.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:38.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:38.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:38.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:38.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:38.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:38.640 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:38.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:38.640 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:11:38.644 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:11:38.644 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:11:38.644 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:38.644 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:38.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:38.645 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:11:38.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:38.645 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:11:38.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:38.647 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:11:38.647 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:11:38.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:38.647 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:38.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:38.647 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:11:38.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:38.647 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:11:38.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:38.649 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:11:38.649 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:11:38.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:38.649 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:38.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:38.649 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:11:38.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:38.649 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:11:38.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:38.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:11:38.653 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:11:38.653 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:11:38.653 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:38.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:38.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:38.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:38.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:38.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:38.657 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:11:39.134 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:11:39.179 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:11:39.182 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:11:39.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:39.184 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:11:39.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:11:39.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:11:39.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:11:39.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:39.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:39.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:39.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:39.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:39.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:39.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:39.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:39.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:39.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:39.236 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:11:39.236 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:39.236 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:39.236 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:39.236 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:39.237 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:39.237 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:44.241 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:44.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:44.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:44.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:44.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:44.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:44.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:44.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:44.250 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:44.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:44.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:11:44.254 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:11:44.254 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:11:44.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:44.255 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:44.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:44.255 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:11:44.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:44.256 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:11:44.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:44.257 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:11:44.257 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:11:44.257 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:44.257 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:44.257 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:44.257 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:11:44.257 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:44.257 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:11:44.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:44.260 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:11:44.260 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:11:44.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:44.260 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:44.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:44.260 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:11:44.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:44.261 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:11:44.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:44.263 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:11:44.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:11:44.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:11:44.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:11:44.264 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:11:44.264 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:11:44.264 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:44.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:44.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:44.269 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:11:44.748 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:11:44.798 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:11:44.800 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:11:44.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:44.802 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:11:44.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:11:44.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:11:44.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:11:44.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:44.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:44.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:44.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:44.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:44.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:44.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:44.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:44.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:44.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:44.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:44.843 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:44.843 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:11:44.844 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:44.844 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:44.844 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:44.844 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:44.844 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:44.844 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:44.844 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:11:49.847 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:49.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:49.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:49.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:49.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:49.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:49.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:49.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:49.855 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:49.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:49.855 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:11:49.859 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:11:49.859 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:11:49.859 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:49.859 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:49.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:49.859 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:11:49.859 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:49.859 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:11:49.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:49.863 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:11:49.863 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:11:49.863 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:49.863 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:49.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:49.863 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:11:49.864 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:49.864 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:11:49.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:49.867 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:11:49.867 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:11:49.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:49.868 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:49.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:49.868 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:11:49.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:49.868 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:11:49.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:49.873 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:11:49.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:11:49.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:11:49.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:11:49.873 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:49.874 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:11:49.874 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:11:49.874 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:11:49.874 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:11:49.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:49.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:49.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:49.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:11:49.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:49.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:49.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:49.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:49.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:49.879 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:11:50.357 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:11:50.407 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:11:50.408 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:11:50.409 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:11:50.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:50.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:11:50.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:11:50.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:11:50.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:50.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:50.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:50.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:50.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:50.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:50.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:50.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:50.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:50.454 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:50.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:50.454 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:11:50.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:50.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:55.459 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:55.459 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:55.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:55.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:55.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:55.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:55.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:55.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:55.468 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:55.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:11:55.468 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:11:55.471 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:11:55.471 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:11:55.471 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:55.471 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:55.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:55.471 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:11:55.472 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:11:55.472 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:11:55.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:55.474 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:11:55.474 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:11:55.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:55.474 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:55.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:55.474 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:11:55.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:11:55.474 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:11:55.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:55.476 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:11:55.476 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:11:55.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:55.476 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:11:55.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:55.476 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:11:55.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:11:55.476 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:11:55.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:55.478 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:11:55.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:11:55.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:11:55.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:11:55.478 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:11:55.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:11:55.479 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:11:55.479 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:11:55.479 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:55.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:55.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:55.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:55.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:11:55.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:11:55.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:55.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:55.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:55.484 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:11:55.961 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:11:56.005 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:11:56.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:56.008 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:11:56.010 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:11:56.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:11:56.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:11:56.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:11:56.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:11:56.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:56.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:56.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:56.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:56.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:56.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:56.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:56.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:11:56.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:11:56.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:11:56.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:11:56.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:11:56.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:11:56.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:11:56.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:11:56.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:11:56.067 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:11:56.067 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:11:56.067 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:12:01.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:12:01.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:12:01.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:12:01.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:12:01.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:12:01.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:12:01.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:12:01.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:12:01.083 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:01.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:12:01.083 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:12:01.087 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:12:01.087 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:12:01.087 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:12:01.087 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:01.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:12:01.087 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:12:01.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:12:01.088 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:12:01.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:01.091 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:12:01.091 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:12:01.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:12:01.091 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:01.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:12:01.092 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:12:01.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:12:01.092 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:12:01.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:01.094 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:12:01.095 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:12:01.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:12:01.095 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:01.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:12:01.095 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:12:01.095 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:12:01.095 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:12:01.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:01.099 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:12:01.099 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:12:01.099 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:12:01.100 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:12:01.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:01.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:01.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:01.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:12:01.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:01.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:01.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:01.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:01.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:01.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:01.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:01.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:01.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:01.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:01.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:01.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:01.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:01.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:01.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:01.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:01.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:01.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:01.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:01.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:01.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:01.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:01.104 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:12:01.582 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:12:01.632 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:12:01.634 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:12:01.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:01.637 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:12:01.639 [DEBUG] fake_trx.py:382 (BTS@172.18.37.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-03 03:12:01.639 [INFO] fake_trx.py:385 (BTS@172.18.37.20:5700) Artificial TRXC delay set to 200
2026-05-03 03:12:01.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-03 03:12:01.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:02.057 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:12:02.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:02.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:02.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:02.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:02.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:02.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:02.530 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:12:03.002 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:12:03.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:03.276 [DEBUG] fake_trx.py:382 (BTS@172.18.37.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-03 03:12:03.276 [INFO] fake_trx.py:385 (BTS@172.18.37.20:5700) Artificial TRXC delay set to 0
2026-05-03 03:12:03.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-03 03:12:03.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:03.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:03.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:03.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:03.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:03.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:03.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:03.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:03.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:12:03.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:12:03.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:12:03.285 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:12:03.285 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:12:03.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:12:03.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:12:08.291 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:12:08.291 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:12:08.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:12:08.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:12:08.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:12:08.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:12:08.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:12:08.299 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:12:08.299 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:08.300 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:12:08.300 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:12:08.302 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:12:08.303 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:12:08.303 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:12:08.303 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:08.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:12:08.304 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:12:08.304 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:12:08.304 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:12:08.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:08.306 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:12:08.306 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:12:08.306 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:12:08.306 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:08.306 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:12:08.306 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:12:08.306 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:12:08.306 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:12:08.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:08.309 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:12:08.309 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:12:08.309 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:12:08.309 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:08.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:12:08.309 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:12:08.309 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:12:08.309 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:12:08.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:08.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:12:08.314 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:12:08.314 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:12:08.314 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:08.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:08.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:08.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:08.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:08.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:08.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:08.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:08.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:08.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:08.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:08.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:08.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:08.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:08.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:08.318 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:12:08.795 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:12:08.843 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:12:08.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:08.845 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:12:08.847 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:12:08.849 [DEBUG] fake_trx.py:382 (BTS@172.18.37.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-03 03:12:08.849 [INFO] fake_trx.py:385 (BTS@172.18.37.20:5700) Artificial TRXC delay set to 200
2026-05-03 03:12:08.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-03 03:12:09.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:09.269 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:12:09.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:09.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:09.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:09.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:09.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:09.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:09.743 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:12:09.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:10.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:10.218 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:12:10.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:10.486 [DEBUG] fake_trx.py:382 (BTS@172.18.37.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-03 03:12:10.486 [INFO] fake_trx.py:385 (BTS@172.18.37.20:5700) Artificial TRXC delay set to 0
2026-05-03 03:12:10.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-03 03:12:10.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:10.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:10.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:10.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:10.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:10.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:10.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:10.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:10.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:10.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:10.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:10.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:10.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:10.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:10.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:10.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:10.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:10.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:10.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:12:10.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:12:10.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:12:10.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:12:10.496 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:12:10.496 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:12:10.496 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:12:10.496 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=471 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:10.496 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:10.496 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:10.496 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:10.496 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:10.496 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:10.496 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:15.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:12:15.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:12:15.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:12:15.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:12:15.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:12:15.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:12:15.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:12:15.511 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:12:15.511 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:15.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:12:15.512 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:12:15.518 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:12:15.518 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:12:15.518 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:12:15.518 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:15.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:12:15.518 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:12:15.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:12:15.519 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:12:15.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:15.522 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:12:15.523 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:12:15.523 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:12:15.523 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:15.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:12:15.523 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:12:15.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:12:15.524 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:12:15.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:15.527 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:12:15.527 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:12:15.527 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:12:15.527 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:15.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:12:15.528 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:12:15.528 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:12:15.528 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:12:15.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:15.533 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:12:15.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:12:15.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:12:15.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:12:15.533 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:12:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:12:15.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:12:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:12:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:12:15.534 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:12:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:15.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:15.534 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:12:15.534 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:12:15.534 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:12:15.535 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:12:15.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:15.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:15.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:15.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:12:15.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:15.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:15.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:15.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:15.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:15.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:15.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:15.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:15.539 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:12:16.015 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:12:16.064 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:12:16.066 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:12:16.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:16.069 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:12:16.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:16.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:16.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:16.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:16.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:16.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:16.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:16.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:16.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:16.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:12:16.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:12:16.121 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:12:16.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:12:16.121 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:12:16.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:12:16.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:12:16.121 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:16.121 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:16.121 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:16.121 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:16.121 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:16.121 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:16.121 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:21.122 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:12:21.122 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:12:21.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:12:21.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:12:21.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:12:21.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:12:21.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:12:21.134 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:12:21.134 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:21.134 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:12:21.134 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:12:21.140 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:12:21.140 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:12:21.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:12:21.140 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:21.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:12:21.141 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:12:21.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:12:21.141 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:12:21.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:21.145 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:12:21.145 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:12:21.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:12:21.145 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:21.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:12:21.146 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:12:21.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:12:21.146 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:12:21.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:21.149 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:12:21.149 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:12:21.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:12:21.150 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:21.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:12:21.150 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:12:21.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:12:21.150 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:12:21.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:21.155 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:12:21.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:12:21.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:12:21.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:21.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:21.157 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:12:21.157 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:12:21.157 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:12:21.157 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:12:21.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:21.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:21.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:21.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:12:21.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:21.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:21.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:21.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:21.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:21.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:21.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:21.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:21.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:21.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:21.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:21.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:21.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:21.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:21.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:21.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:21.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:21.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:21.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:21.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:21.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:21.162 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:12:21.639 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:12:21.686 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:12:21.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:21.689 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:12:21.691 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:12:21.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:21.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:21.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:21.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:21.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:21.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:21.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:21.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:21.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:21.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:12:21.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:12:21.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:12:21.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:12:21.732 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:12:21.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:12:21.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:12:21.733 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:21.733 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:21.733 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:21.733 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:21.733 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:21.733 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:21.733 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:12:26.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:12:26.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:12:26.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:12:26.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:12:26.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:12:26.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:12:26.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:12:26.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:12:26.745 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:26.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:12:26.745 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:12:26.749 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:12:26.749 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:12:26.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:12:26.749 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:26.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:12:26.749 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:12:26.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:12:26.750 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:12:26.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:26.753 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:12:26.753 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:12:26.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:12:26.753 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:26.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:12:26.754 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:12:26.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:12:26.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:12:26.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:26.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:12:26.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:12:26.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:12:26.757 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:12:26.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:12:26.757 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:12:26.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:12:26.758 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:12:26.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:26.762 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:12:26.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:12:26.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:12:26.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:12:26.762 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:12:26.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:12:26.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:12:26.763 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:12:26.763 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:12:26.763 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:26.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:26.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:12:26.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:26.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:26.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:26.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:26.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:26.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:26.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:26.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:26.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:26.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:26.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:26.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:26.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:26.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:26.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:12:26.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:26.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:26.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:26.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:12:26.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:12:26.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:26.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:12:26.768 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:12:27.245 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:12:27.297 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:12:27.299 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:12:27.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:27.301 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:12:27.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:27.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:27.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:27.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:27.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:27.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:27.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:27.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:27.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:27.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:27.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:27.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:27.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:27.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:27.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:27.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:27.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:27.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:27.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:27.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:27.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:27.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:27.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:27.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:27.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:27.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:27.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:27.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:27.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:27.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:27.715 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:12:27.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:27.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:27.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:27.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:28.188 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:12:28.661 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:12:28.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:28.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:28.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:28.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:29.134 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:12:29.607 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:12:29.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:29.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:29.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:29.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:30.079 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:12:30.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:30.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:30.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:30.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:30.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:30.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:30.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:30.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:30.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:30.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:30.515 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:30.515 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:30.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:30.553 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:12:30.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:30.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:30.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:30.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:30.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:30.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:30.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:30.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:30.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:30.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:30.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:30.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:30.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:30.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:30.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:30.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:30.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:30.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:30.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:30.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:30.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:30.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:30.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:30.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:30.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:31.025 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:12:31.498 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:12:31.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:12:31.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:12:31.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:12:31.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:12:31.968 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:12:32.440 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:12:32.913 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:12:33.386 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:12:33.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:33.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:33.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:33.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:33.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:33.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:33.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:33.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:33.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:33.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:33.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:33.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:33.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:33.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:33.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:33.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:33.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:33.857 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:12:34.330 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:12:34.803 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:12:35.275 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:12:35.749 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:12:36.221 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:12:36.694 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:12:36.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:36.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:36.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:36.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:36.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:36.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:36.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:36.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:36.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:36.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:36.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:36.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:36.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:36.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:36.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:36.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:36.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:36.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:36.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:36.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:36.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:36.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:36.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:36.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:36.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:36.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:36.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:36.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:36.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:36.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:36.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:36.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:36.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:36.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:37.164 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:12:37.638 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:12:37.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:37.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:37.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:37.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:37.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:37.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:37.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:37.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:37.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:37.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:37.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:37.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:37.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:37.927 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:12:37.927 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:12:37.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:37.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:38.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:38.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:38.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:38.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:38.021 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:12:38.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:38.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:38.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:38.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:38.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:38.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:38.039 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:38.039 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:38.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:38.053 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:12:38.053 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:12:38.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:38.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:38.110 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:12:38.584 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:12:39.058 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:12:39.530 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:12:40.004 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:12:40.476 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:12:40.949 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:12:41.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:41.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:41.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:41.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:41.062 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:12:41.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:41.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:41.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:41.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:41.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:41.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:41.082 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:41.082 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:41.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:41.141 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:12:41.141 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:12:41.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:41.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:41.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:41.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:41.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:41.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:41.238 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:12:41.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:41.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:41.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:41.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:41.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:41.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:41.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:41.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:41.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:41.282 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:12:41.282 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:12:41.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:41.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:41.419 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:12:41.893 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:12:42.366 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:12:42.839 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:12:43.312 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:12:43.784 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:12:44.258 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:12:44.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:44.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:44.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:44.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:44.289 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:12:44.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:44.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:44.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:44.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:44.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:44.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:44.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:44.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:44.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:44.357 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:12:44.357 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:12:44.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:44.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:44.730 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:12:45.204 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:12:45.678 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:12:46.150 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:12:46.623 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:12:47.097 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:12:47.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:47.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:47.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:47.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:47.366 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:12:47.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:47.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:47.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:47.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:47.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:47.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:47.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:47.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:47.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:47.431 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:12:47.431 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:12:47.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:47.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:47.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:47.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:47.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:47.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:47.511 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:12:47.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:47.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:47.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:47.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:47.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:47.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:47.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:47.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:47.569 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:12:47.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:47.580 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:12:47.580 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:12:47.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:47.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:48.043 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:12:48.515 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:12:48.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:48.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:48.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:48.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:48.700 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:12:48.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:48.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:48.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:48.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:48.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:48.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:48.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:48.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:48.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:48.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:48.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:48.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:48.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:48.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:48.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:48.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:48.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:48.987 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:12:48.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:48.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:48.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:49.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:49.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:49.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:49.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:49.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:49.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:49.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:49.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:49.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:49.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:49.458 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:12:49.929 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:12:50.400 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:12:50.873 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:12:51.346 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:12:51.818 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:12:52.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:52.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:52.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:52.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:52.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:52.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:52.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:52.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:52.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:52.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:52.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:52.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:52.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:52.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:52.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:52.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:52.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:52.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:52.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:52.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:52.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:52.288 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:12:52.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:52.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:52.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:52.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:52.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:52.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:52.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:52.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:52.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:52.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:52.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:52.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:52.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:52.760 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:12:53.233 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 03:12:53.705 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 03:12:54.177 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 03:12:54.648 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 03:12:55.119 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 03:12:55.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:55.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:55.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:55.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:55.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:55.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:55.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:55.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:55.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:55.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:55.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:55.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:55.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:55.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:55.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:55.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:55.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:55.590 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 03:12:56.063 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 03:12:56.536 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 03:12:57.008 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 03:12:57.481 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 03:12:57.954 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 03:12:58.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:58.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:58.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:58.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:58.426 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 03:12:58.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:58.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:58.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:58.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:58.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:58.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:58.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:58.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:58.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:58.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:58.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:58.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:58.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:58.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:58.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:58.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:58.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:58.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:58.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:58.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:58.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:58.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:58.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:58.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:58.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:58.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:58.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:58.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:58.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:58.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:58.899 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 03:12:59.372 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 03:12:59.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:59.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:59.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:59.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:59.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:59.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:59.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:59.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:59.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:59.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:59.434 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:59.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:59.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:59.473 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:12:59.473 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:12:59.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:59.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:59.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:59.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:59.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:59.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:59.531 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:12:59.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:12:59.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:12:59.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:12:59.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:59.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:12:59.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:12:59.551 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:12:59.551 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:12:59.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:12:59.555 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:12:59.555 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:12:59.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:59.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:12:59.844 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 03:13:00.315 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 03:13:00.789 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 03:13:01.261 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 03:13:01.733 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 03:13:02.204 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 03:13:02.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:02.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:02.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:02.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:02.562 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:02.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:02.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:02.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:02.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:02.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:02.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:02.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:02.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:02.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:02.629 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:02.629 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:13:02.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:02.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:02.677 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 03:13:03.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:03.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:03.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:03.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:03.066 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:03.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:03.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:03.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:03.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:03.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:03.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:03.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:03.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:03.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:03.092 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:03.092 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:13:03.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:03.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:03.149 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 03:13:03.621 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 03:13:04.093 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 03:13:04.567 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 03:13:05.039 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 03:13:05.512 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 03:13:05.985 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 03:13:06.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:06.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:06.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:06.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:06.099 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:06.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:06.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:06.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:06.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:06.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:06.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:06.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:06.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:06.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:06.172 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:06.172 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:13:06.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:06.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:06.457 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 03:13:06.930 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 03:13:07.403 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 03:13:07.875 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 03:13:08.349 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 03:13:08.822 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 03:13:09.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:09.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:09.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:09.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:09.180 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:09.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:09.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:09.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:09.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:09.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:09.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:09.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:09.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:09.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:09.247 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:09.247 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:13:09.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:09.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:09.293 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 03:13:09.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:09.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:09.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:09.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:09.677 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:09.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:09.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:09.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:09.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:09.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:09.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:09.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:09.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:09.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:09.716 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:09.716 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:13:09.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:09.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:09.764 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 03:13:10.237 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 03:13:10.710 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 03:13:11.182 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 03:13:11.656 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 03:13:12.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:12.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:12.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:12.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:12.114 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:12.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:12.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:12.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:12.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:12.128 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 03:13:12.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:12.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:12.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:13:12.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:13:12.129 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:13:12.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:12.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9794 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9794 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9794 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9794 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9794 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9794 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9794 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9795 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9795 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9795 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9795 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9795 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9795 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9795 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:12.129 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=9795 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:17.134 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:13:17.134 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:13:17.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:17.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:17.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:17.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:17.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:17.145 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:13:17.145 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:17.146 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:13:17.146 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:13:17.152 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:13:17.152 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:13:17.152 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:13:17.152 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:17.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:17.152 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:13:17.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:13:17.153 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:13:17.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:17.157 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:13:17.157 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:13:17.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:13:17.157 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:17.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:17.157 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:13:17.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:13:17.157 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:13:17.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:17.160 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:13:17.160 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:13:17.161 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:13:17.161 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:17.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:17.161 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:13:17.161 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:13:17.161 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:13:17.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:17.165 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:13:17.165 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:13:17.165 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:13:17.166 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:17.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:17.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:17.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:17.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:17.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:17.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:17.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:17.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:17.170 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:13:17.647 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:13:17.678 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:13:17.679 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:13:17.679 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:13:17.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:17.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:17.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:17.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:17.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:17.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:17.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:17.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:17.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:17.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:17.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:17.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:17.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:17.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:17.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:17.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:17.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:17.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:17.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:17.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:17.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:17.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:17.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:17.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:17.786 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:17.786 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:17.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:17.843 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:17.844 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:13:17.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:17.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:17.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:17.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:17.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:17.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:17.929 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:17.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:17.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:17.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:17.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:17.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:17.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:17.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:17.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:17.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:17.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:17.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:17.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:17.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:18.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:18.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:18.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:18.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:18.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:18.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:18.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:18.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:18.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:18.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:18.061 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:18.061 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:18.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:18.066 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:18.066 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:13:18.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:18.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:18.115 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:13:18.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:18.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:18.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:18.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:18.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:18.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:18.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:18.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:18.201 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:18.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:18.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:18.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:18.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:18.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:18.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:18.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:13:18.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:13:18.207 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:13:18.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:18.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:18.207 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=226 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:18.207 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=226 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:18.207 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=226 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:18.207 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=226 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:18.207 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=226 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:18.207 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=226 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:18.207 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=226 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:23.213 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:13:23.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:13:23.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:23.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:23.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:23.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:23.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:23.223 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:13:23.223 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:23.223 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:13:23.223 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:13:23.226 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:13:23.226 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:13:23.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:13:23.226 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:23.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:23.227 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:13:23.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:13:23.227 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:13:23.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:23.229 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:13:23.229 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:13:23.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:13:23.230 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:23.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:23.230 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:13:23.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:13:23.230 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:13:23.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:23.232 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:13:23.232 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:13:23.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:13:23.232 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:23.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:23.232 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:13:23.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:13:23.232 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:13:23.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:23.235 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:13:23.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:13:23.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:13:23.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:13:23.235 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:13:23.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:13:23.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:13:23.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:13:23.236 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:13:23.236 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:13:23.236 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:23.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:23.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:23.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:23.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:23.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:23.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:23.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:23.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:23.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:23.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:23.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:23.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:23.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:23.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:23.241 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:13:23.719 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:13:23.763 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:13:23.765 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:13:23.766 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:13:23.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:23.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:23.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:23.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:23.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:23.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:23.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:23.789 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:23.789 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:23.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:23.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:23.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:23.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:23.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:24.192 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:13:24.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:24.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:24.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:24.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:24.663 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:13:24.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:24.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:24.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:24.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:24.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:24.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:24.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:24.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:24.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:24.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:24.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:24.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:24.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:24.708 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:24.708 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:13:24.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:24.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:25.135 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:13:25.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:25.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:25.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:25.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:25.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:25.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:25.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:25.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:25.404 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:25.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:25.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:25.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:25.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:25.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:25.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:25.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:25.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:25.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:25.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:25.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:25.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:25.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:25.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:25.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:25.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:25.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:25.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:25.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:25.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:25.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:25.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:25.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:25.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:25.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:25.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:25.604 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:25.605 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:13:25.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:25.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:25.608 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:13:26.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:26.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:26.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:26.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:26.006 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:26.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:26.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:26.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:26.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:26.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:26.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:26.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:13:26.019 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:13:26.019 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:13:26.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:26.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:26.020 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:26.020 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:26.020 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:26.020 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:26.021 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:26.021 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:26.021 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:13:31.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:13:31.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:13:31.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:31.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:31.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:31.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:31.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:31.037 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:13:31.037 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:31.038 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:13:31.038 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:13:31.043 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:13:31.044 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:13:31.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:13:31.045 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:31.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:31.046 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:13:31.046 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:13:31.047 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:13:31.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:31.050 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:13:31.050 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:13:31.051 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:13:31.051 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:31.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:31.051 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:13:31.051 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:13:31.052 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:13:31.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:31.056 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:13:31.056 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:13:31.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:13:31.056 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:31.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:31.056 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:13:31.057 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:13:31.057 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:13:31.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:31.063 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:13:31.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:13:31.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:13:31.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:13:31.063 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:13:31.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:13:31.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:13:31.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:13:31.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:13:31.064 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:13:31.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:31.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:31.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:31.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:31.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:31.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:31.064 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:13:31.064 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:13:31.064 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:13:31.064 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:13:31.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:31.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:31.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:31.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:13:31.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:31.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:31.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:31.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:31.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:31.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:31.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:31.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:31.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:31.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:31.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:31.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:31.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:31.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:31.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:31.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:31.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:31.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:31.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:31.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:31.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:31.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:31.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:31.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:31.069 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:13:31.548 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:13:31.596 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:13:31.597 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:13:31.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:31.598 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:13:31.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:31.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:31.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:31.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:31.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:31.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:31.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:31.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:31.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:31.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:31.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:31.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:31.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:31.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:31.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:31.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:31.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:31.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:31.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:31.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:31.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:31.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:31.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:31.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:31.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:31.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:31.882 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:31.882 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:13:31.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:31.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:32.015 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:13:32.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:32.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:32.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:32.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:32.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:32.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:32.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:32.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:32.164 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:32.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:32.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:32.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:32.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:32.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:32.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:32.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:32.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:32.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:32.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:32.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:32.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:32.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:32.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:32.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:32.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:32.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:32.486 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:13:32.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:32.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:32.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:32.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:32.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:32.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:32.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:32.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:32.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:32.534 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:32.534 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:13:32.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:32.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:32.957 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:13:33.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:33.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:33.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:33.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:33.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:33.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:33.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:33.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:33.349 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:33.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:33.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:33.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:33.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:33.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:33.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:33.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:13:33.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:13:33.359 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:13:33.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:33.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:38.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:13:38.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:13:38.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:38.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:38.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:38.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:38.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:38.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:13:38.374 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:38.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:13:38.375 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:13:38.378 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:13:38.378 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:13:38.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:13:38.378 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:38.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:38.379 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:13:38.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:13:38.380 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:13:38.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:38.381 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:13:38.382 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:13:38.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:13:38.382 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:38.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:38.382 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:13:38.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:13:38.383 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:13:38.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:38.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:13:38.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:13:38.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:13:38.384 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:38.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:38.384 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:13:38.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:13:38.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:13:38.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:38.387 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:13:38.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:13:38.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:13:38.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:13:38.387 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:13:38.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:13:38.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:13:38.388 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:13:38.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:38.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:38.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:38.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:38.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:38.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:38.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:38.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:38.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:38.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:38.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:38.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:38.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:38.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:38.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:38.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:13:38.870 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:13:38.912 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:13:38.914 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:13:38.916 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:13:38.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:38.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:38.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:38.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:38.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:38.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:38.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:38.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:38.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:38.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:38.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:38.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:38.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:38.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:39.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:39.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:39.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:39.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:39.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:39.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:39.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:39.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:39.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:39.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:39.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:39.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:39.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:39.210 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:39.210 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:13:39.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:39.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:39.342 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:13:39.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:39.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:39.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:39.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:39.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:39.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:39.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:39.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:39.490 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:39.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:39.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:39.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:39.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:39.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:39.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:39.509 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:39.509 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:39.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:39.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:39.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:39.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:39.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:39.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:39.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:39.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:39.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:39.813 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:13:39.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:39.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:39.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:39.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:39.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:39.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:39.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:39.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:39.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:39.869 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:39.869 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:13:39.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:39.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:40.284 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:13:40.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:40.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:40.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:40.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:40.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:40.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:40.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:40.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:40.675 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:40.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:40.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:40.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:40.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:40.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:40.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:40.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:40.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:40.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:13:40.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:13:40.686 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:13:45.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:13:45.691 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:13:45.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:45.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:45.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:45.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:45.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:13:45.698 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:13:45.698 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:45.698 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:13:45.698 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:13:45.699 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:13:45.699 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:13:45.699 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:13:45.699 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:45.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:13:45.700 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:13:45.700 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:13:45.700 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:13:45.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:45.702 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:13:45.702 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:13:45.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:13:45.702 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:45.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:13:45.702 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:13:45.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:13:45.702 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:13:45.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:45.703 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:13:45.704 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:13:45.704 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:13:45.704 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:13:45.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:13:45.704 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:13:45.704 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:13:45.704 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:13:45.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:13:45.706 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:13:45.706 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:13:45.706 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:45.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:45.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:45.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:45.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:45.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:13:45.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:13:45.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:45.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:13:45.711 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:13:46.189 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:13:46.232 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:13:46.234 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:13:46.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:46.236 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:13:46.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:46.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:46.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:46.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:46.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:46.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:46.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:46.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:46.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:46.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:46.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:46.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:46.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:46.660 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:13:46.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:46.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:46.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:46.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:47.133 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:13:47.604 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:13:47.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:47.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:47.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:47.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:48.077 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:13:48.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:48.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:48.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:48.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:48.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:48.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:48.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:48.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:48.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:48.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:48.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:48.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:48.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:48.171 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:48.171 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:13:48.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:48.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:48.549 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:13:48.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:48.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:48.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:48.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:49.020 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:13:49.493 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:13:49.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:49.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:49.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:49.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:49.967 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:13:50.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:50.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:50.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:50.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:50.298 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:13:50.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:50.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:50.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:50.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:50.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:50.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:50.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:50.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:50.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:50.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:50.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:50.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:50.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:50.438 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:13:50.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:13:50.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:13:50.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:13:50.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:13:50.909 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:13:51.383 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:13:51.855 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:13:51.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:51.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:51.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:51.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:51.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:13:51.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:13:51.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:13:51.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:51.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:13:51.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:13:51.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:13:51.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:13:51.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:13:51.956 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:13:51.956 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:13:51.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:51.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:13:52.326 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:13:52.799 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:13:53.272 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:13:53.744 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:13:54.216 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:13:54.689 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:13:55.162 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:13:55.634 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:13:56.107 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:13:56.580 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:13:57.053 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:13:57.526 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:13:57.998 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:13:58.470 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:13:58.942 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:13:59.415 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:13:59.887 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:14:00.359 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:14:00.832 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:14:01.304 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:14:01.776 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:14:02.248 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:14:02.722 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:14:03.194 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:14:03.667 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:14:04.140 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:14:04.611 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:14:05.084 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:14:05.557 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:14:06.029 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:14:06.501 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:14:06.975 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:14:07.447 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:14:07.919 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:14:08.390 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:14:08.863 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:14:09.335 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:14:09.808 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:14:10.282 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:14:10.755 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:14:11.229 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:14:11.700 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:14:11.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:11.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:11.916 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:14:11.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:14:11.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:14:11.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:14:11.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:14:11.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:14:11.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:14:11.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:14:11.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:14:11.920 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:14:11.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:14:11.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:14:16.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:14:16.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:14:16.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:14:16.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:14:16.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:14:16.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:14:16.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:14:16.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:14:16.934 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:14:16.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:14:16.934 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:14:16.939 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:14:16.939 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:14:16.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:14:16.939 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:14:16.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:14:16.940 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:14:16.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:14:16.940 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:14:16.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:14:16.944 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:14:16.944 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:14:16.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:14:16.944 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:14:16.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:14:16.945 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:14:16.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:14:16.945 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:14:16.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:14:16.949 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:14:16.949 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:14:16.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:14:16.949 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:14:16.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:14:16.950 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:14:16.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:14:16.950 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:14:16.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:14:16.956 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:14:16.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:14:16.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:14:16.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:14:16.956 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:14:16.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:14:16.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:14:16.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:16.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:14:16.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:14:16.957 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:14:16.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:16.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:16.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:16.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:14:16.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:16.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:16.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:16.957 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:14:16.957 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:14:16.957 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:14:16.957 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:14:16.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:16.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:16.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:16.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:14:16.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:16.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:16.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:16.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:16.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:16.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:16.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:16.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:16.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:16.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:16.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:16.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:16.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:16.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:16.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:16.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:16.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:16.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:16.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:16.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:16.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:16.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:16.962 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:14:17.438 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:14:17.488 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:14:17.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:17.489 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:14:17.490 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:14:17.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:17.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:17.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:14:17.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:17.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:17.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:17.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:14:17.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:14:17.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:17.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:17.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:17.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:17.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:17.911 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:14:17.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:14:17.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:14:17.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:14:17.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:14:18.382 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:14:18.853 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:14:18.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:14:18.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:14:18.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:14:18.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:14:19.326 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:14:19.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:19.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:19.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:19.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:19.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:19.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:19.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:14:19.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:19.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:19.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:19.395 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:14:19.395 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:14:19.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:19.428 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:14:19.428 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:14:19.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:19.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:19.799 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:14:19.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:14:19.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:14:19.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:14:19.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:14:20.273 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:14:20.745 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:14:20.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:14:20.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:14:20.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:14:20.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:14:21.218 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:14:21.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:21.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:21.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:21.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:21.548 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:14:21.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:21.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:21.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:14:21.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:21.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:21.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:21.567 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:14:21.567 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:14:21.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:21.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:21.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:21.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:21.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:21.689 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:14:21.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:14:21.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:14:21.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:14:21.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:14:22.162 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:14:22.634 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:14:23.105 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:14:23.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:23.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:23.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:23.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:23.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:23.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:23.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:14:23.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:23.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:23.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:23.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:14:23.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:14:23.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:23.207 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:14:23.207 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:14:23.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:23.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:23.577 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:14:24.049 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:14:24.521 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:14:24.993 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:14:25.465 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:14:25.939 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:14:26.410 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:14:26.882 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:14:27.356 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:14:27.829 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:14:28.300 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:14:28.773 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:14:29.245 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:14:29.717 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:14:30.190 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:14:30.663 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:14:31.135 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:14:31.607 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:14:32.080 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:14:32.553 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:14:33.026 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:14:33.498 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:14:33.972 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:14:34.445 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:14:34.917 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:14:35.390 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:14:35.862 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:14:36.334 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:14:36.807 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:14:37.280 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:14:37.752 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:14:38.224 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:14:38.697 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:14:39.169 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:14:39.640 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:14:40.114 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:14:40.586 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:14:41.059 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:14:41.532 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:14:42.005 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:14:42.477 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:14:42.950 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:14:43.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:43.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:43.168 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:14:43.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:14:43.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:14:43.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:14:43.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:14:43.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:14:43.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:14:43.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:14:43.172 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:14:43.172 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:14:43.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:14:43.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:14:48.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:14:48.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:14:48.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:14:48.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:14:48.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:14:48.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:14:48.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:14:48.188 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:14:48.188 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:14:48.188 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:14:48.189 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:14:48.192 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:14:48.192 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:14:48.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:14:48.193 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:14:48.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:14:48.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:14:48.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:14:48.194 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:14:48.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:14:48.196 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:14:48.196 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:14:48.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:14:48.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:14:48.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:14:48.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:14:48.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:14:48.198 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:14:48.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:14:48.200 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:14:48.200 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:14:48.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:14:48.200 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:14:48.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:14:48.200 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:14:48.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:14:48.200 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:14:48.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:14:48.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:14:48.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:14:48.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:14:48.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:14:48.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:14:48.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:14:48.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:14:48.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:48.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:14:48.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:14:48.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:14:48.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:48.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:48.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:14:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:48.206 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:14:48.206 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:14:48.206 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:14:48.206 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:14:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:48.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:48.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:48.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:48.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:48.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:48.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:14:48.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:14:48.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:48.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:14:48.211 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:14:48.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:14:48.735 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:14:48.737 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:14:48.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:48.739 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:14:48.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:48.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:48.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:14:48.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:48.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:48.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:48.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:14:48.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:14:48.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:48.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:48.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:48.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:48.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:48.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:48.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:48.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:48.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:48.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:48.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:48.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:14:48.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:48.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:48.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:48.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:14:48.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:14:49.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:49.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:49.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:49.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:49.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:49.159 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:14:49.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:14:49.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:14:49.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:14:49.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:14:49.633 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:14:50.106 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:14:50.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:14:50.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:14:50.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:14:50.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:14:50.573 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:14:51.044 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:14:51.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:51.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:51.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:51.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:51.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:51.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:51.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:14:51.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:51.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:51.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:51.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:14:51.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:14:51.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:51.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:51.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:51.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:51.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:51.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:14:51.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:14:51.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:14:51.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:14:51.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:51.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:51.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:51.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:51.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:51.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:51.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:14:51.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:51.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:51.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:51.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:14:51.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:14:51.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:51.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:51.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:51.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:51.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:51.515 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:14:51.989 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:14:52.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:14:52.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:14:52.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:14:52.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:14:52.461 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:14:52.928 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:14:53.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:14:53.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:14:53.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:14:53.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:14:53.399 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:14:53.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:53.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:53.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:53.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:53.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:53.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:53.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:14:53.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:53.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:53.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:53.513 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:14:53.513 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:14:53.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:53.542 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:14:53.542 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:14:53.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:53.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:53.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:53.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:53.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:53.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:53.813 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:14:53.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:53.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:53.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:14:53.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:53.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:53.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:53.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:14:53.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:14:53.871 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:14:53.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:53.880 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:14:53.880 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:14:53.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:53.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:54.345 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:14:54.817 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:14:55.288 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:14:55.759 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:14:56.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:56.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:56.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:56.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:56.140 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:14:56.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:56.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:56.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:14:56.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:56.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:56.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:56.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:14:56.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:14:56.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:56.181 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:14:56.181 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:14:56.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:56.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:56.228 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:14:56.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:56.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:56.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:56.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:56.459 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:14:56.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:56.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:56.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:14:56.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:56.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:56.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:56.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:14:56.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:14:56.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:56.517 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:14:56.517 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:14:56.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:56.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:56.700 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:14:57.173 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:14:57.645 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:14:58.119 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:14:58.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:58.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:58.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:58.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:58.544 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:14:58.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:58.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:58.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:14:58.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:58.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:58.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:58.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:14:58.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:14:58.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:58.591 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:14:58.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:58.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:58.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:58.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:59.064 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:14:59.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:59.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:59.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:59.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:59.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:14:59.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:14:59.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:14:59.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:59.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:59.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:59.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:14:59.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:14:59.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:14:59.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:14:59.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:14:59.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:59.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:14:59.534 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:15:00.005 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:15:00.476 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:15:00.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:00.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:00.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:00.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:00.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:00.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:00.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:00.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:00.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:00.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:00.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:00.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:00.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:00.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:00.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:00.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:00.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:00.946 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:15:01.418 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:15:01.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:01.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:01.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:01.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:01.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:01.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:01.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:01.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:01.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:01.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:01.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:01.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:01.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:01.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:01.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:01.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:01.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:01.888 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:15:02.362 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:15:02.834 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:15:03.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:03.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:03.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:03.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:03.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:03.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:03.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:03.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:03.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:03.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:03.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:03.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:03.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:03.304 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:03.304 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:15:03.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:03.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:03.306 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:15:03.777 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:15:04.251 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:15:04.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:04.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:04.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:04.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:04.568 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:04.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:04.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:04.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:04.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:04.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:04.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:04.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:04.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:04.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:04.629 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:04.629 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:15:04.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:04.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:04.723 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:15:05.195 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:15:05.669 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:15:06.141 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:15:06.613 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:15:07.085 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:15:07.558 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:15:08.030 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:15:08.503 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:15:08.976 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:15:09.448 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:15:09.921 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:15:10.394 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:15:10.866 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:15:11.340 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:15:11.812 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:15:12.285 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:15:12.758 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:15:13.230 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:15:13.703 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:15:14.176 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:15:14.649 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 03:15:15.122 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 03:15:15.594 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 03:15:16.066 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 03:15:16.539 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 03:15:17.012 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 03:15:17.484 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 03:15:17.955 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 03:15:18.429 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 03:15:18.901 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 03:15:19.374 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 03:15:19.847 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 03:15:20.319 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 03:15:20.791 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 03:15:21.262 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 03:15:21.736 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 03:15:22.208 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 03:15:22.681 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 03:15:23.154 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 03:15:23.626 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 03:15:24.098 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 03:15:24.570 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 03:15:24.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:24.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:24.591 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:24.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:24.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:24.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:24.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:24.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:15:24.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:15:24.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:15:24.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:15:24.595 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:15:24.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:15:24.595 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:15:24.595 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:24.595 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=7861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:29.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:15:29.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:15:29.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:15:29.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:15:29.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:15:29.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:15:29.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:15:29.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:15:29.610 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:29.611 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:15:29.611 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:15:29.613 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:15:29.614 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:15:29.614 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:15:29.614 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:29.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:15:29.615 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:15:29.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:15:29.616 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:15:29.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:29.618 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:15:29.618 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:15:29.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:15:29.618 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:29.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:15:29.619 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:15:29.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:15:29.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:15:29.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:29.622 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:15:29.622 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:15:29.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:15:29.623 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:29.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:15:29.623 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:15:29.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:15:29.623 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:15:29.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:29.628 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:15:29.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:15:29.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:15:29.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:29.629 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:15:29.629 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:15:29.629 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:15:29.630 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:15:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:29.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:15:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:29.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:29.634 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:15:30.109 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:15:30.160 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:15:30.162 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:15:30.163 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:15:30.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:30.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:30.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:30.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:30.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:30.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:30.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:30.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:30.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:30.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:30.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:30.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:30.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:30.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:30.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:30.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:30.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:30.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:30.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:30.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:30.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:30.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:30.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:30.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:30.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:30.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:30.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:30.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:30.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:30.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:30.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:30.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:30.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:30.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:30.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:30.395 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:30.395 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:15:30.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:30.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:30.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:30.469 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:30.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:30.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:30.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:30.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:30.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:30.491 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:30.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:30.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:30.540 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:30.540 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:15:30.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.575 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:15:30.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:30.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:30.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:30.623 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:30.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:30.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:30.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:30.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:30.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:30.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:30.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:30.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:30.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:30.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:30.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:30.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:30.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:30.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:30.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:30.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:30.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:30.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:30.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:30.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:30.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:30.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:30.754 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:30.754 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:30.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:30.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:30.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:30.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:30.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:30.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:30.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:30.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:30.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:30.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:30.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:30.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:30.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:30.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:31.045 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:15:31.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:31.053 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:31.053 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:15:31.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:31.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:31.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:31.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:31.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:31.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:31.130 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:31.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:31.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:31.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:31.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:31.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:31.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:31.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:31.148 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:31.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:31.190 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:31.190 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:15:31.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:31.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:31.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:31.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:31.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:31.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:31.364 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:31.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:31.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:31.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:31.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:31.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:15:31.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:15:31.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:15:31.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:15:31.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:15:31.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:15:31.375 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:15:31.375 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=380 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:31.375 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=380 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:31.375 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=380 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:31.375 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=380 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:31.375 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=380 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:31.375 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=380 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:36.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:15:36.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:15:36.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:15:36.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:15:36.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:15:36.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:15:36.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:15:36.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:15:36.383 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:36.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:15:36.383 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:15:36.384 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:15:36.384 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:15:36.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:15:36.384 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:36.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:15:36.384 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:15:36.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:15:36.385 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:15:36.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:36.385 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:15:36.385 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:15:36.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:15:36.385 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:36.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:15:36.385 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:15:36.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:15:36.385 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:15:36.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:36.386 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:15:36.387 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:15:36.387 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:15:36.387 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:36.387 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:15:36.387 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:15:36.387 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:15:36.387 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:15:36.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:15:36.389 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:15:36.389 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:15:36.389 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:36.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:36.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:36.394 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:15:36.871 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:15:36.915 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:15:36.917 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:15:36.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:36.920 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:15:36.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:36.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:36.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:36.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:36.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:36.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:36.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:36.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:36.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:36.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:36.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:36.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:36.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:37.342 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:15:37.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:37.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:37.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:37.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:37.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:37.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:37.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:37.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:37.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:37.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:37.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:37.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:37.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:37.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:37.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:37.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:37.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:37.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:37.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:37.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:37.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:37.814 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:15:37.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:37.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:37.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:37.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:37.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:37.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:37.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:37.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:37.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:37.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:37.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:37.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:37.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:37.858 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:37.858 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:15:37.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:37.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:38.286 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:15:38.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:38.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:38.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:38.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:38.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:38.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:38.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:38.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:38.558 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:38.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:38.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:38.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:38.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:38.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:38.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:38.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:38.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:38.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:38.626 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:38.626 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:15:38.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:38.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:38.759 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:15:39.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:39.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:39.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:39.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:39.036 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:39.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:39.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:39.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:39.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:39.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:39.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:39.057 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:39.057 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:39.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:39.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:39.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:39.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:39.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:39.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:39.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:39.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:39.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:39.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:39.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:39.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:39.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:39.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:39.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:39.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:39.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:39.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:39.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:39.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:39.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:39.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:39.231 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:15:39.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:39.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:39.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:39.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:39.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:39.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:39.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:39.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:39.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:39.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:39.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:39.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:39.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:39.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:39.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:39.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:39.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:39.701 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:39.701 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:15:39.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:39.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:39.703 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:15:40.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:40.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:40.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:40.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:40.097 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:40.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:40.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:40.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:40.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:40.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:40.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:40.118 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:40.118 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:40.174 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:15:40.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:40.176 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:40.176 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:15:40.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:40.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:40.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:40.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:40.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:40.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:40.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:40.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:40.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:40.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:40.569 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:40.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:40.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:40.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:40.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:40.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:15:40.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:15:40.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:15:40.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:15:40.575 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:15:40.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:15:40.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:15:45.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:15:45.583 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:15:45.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:15:45.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:15:45.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:15:45.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:15:45.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:15:45.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:15:45.593 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:45.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:15:45.593 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:15:45.596 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:15:45.597 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:15:45.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:15:45.597 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:45.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:15:45.598 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:15:45.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:15:45.598 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:15:45.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:45.599 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:15:45.599 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:15:45.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:15:45.600 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:45.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:15:45.600 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:15:45.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:15:45.600 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:15:45.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:45.602 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:15:45.602 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:15:45.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:15:45.602 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:45.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:15:45.602 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:15:45.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:15:45.602 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:15:45.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:15:45.605 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:15:45.605 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:15:45.605 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:45.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:45.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:45.610 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:15:46.088 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:15:46.126 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:15:46.127 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:15:46.129 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:15:46.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:46.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:46.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:46.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:46.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:46.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:46.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:46.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:46.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:46.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:46.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:46.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:46.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:46.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:46.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:46.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:46.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:46.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:46.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:46.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:46.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:46.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:46.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:46.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:46.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:46.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:46.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:46.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:46.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:46.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:46.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:46.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:46.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:46.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:46.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:46.421 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:46.421 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:15:46.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:46.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:46.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:46.510 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:46.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:46.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:46.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:46.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:46.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:46.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:46.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:46.555 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:15:46.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:46.569 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:46.569 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:15:46.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:46.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:46.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:46.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:46.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:46.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:46.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:46.666 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:46.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:46.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:46.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:46.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:46.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:46.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:46.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:46.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:46.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:46.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:46.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:46.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:46.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:46.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:46.803 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:46.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:46.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:46.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:46.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:46.805 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:46.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:46.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:46.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:46.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:46.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:47.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:47.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:47.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:47.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:47.026 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:15:47.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:47.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:47.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:47.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:47.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:47.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:47.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:47.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:47.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:47.081 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:47.081 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:15:47.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:47.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:47.498 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:15:47.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:47.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:47.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:47.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:47.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:47.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:47.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:47.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:47.655 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:47.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:47.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:47.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:47.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:47.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:47.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:47.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:47.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:47.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:47.679 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:47.679 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:15:47.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:47.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:47.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:47.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:47.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:47.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:47.890 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:47.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:47.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:47.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:47.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:47.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:15:47.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:15:47.905 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:15:47.905 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:15:47.905 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:15:47.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:15:47.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:15:47.905 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:47.906 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:47.906 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:47.906 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:47.906 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:47.906 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:47.906 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:15:52.905 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:15:52.905 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:15:52.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:15:52.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:15:52.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:15:52.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:15:52.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:15:52.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:15:52.915 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:52.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:15:52.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:15:52.918 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:15:52.918 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:15:52.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:15:52.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:52.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:15:52.919 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:15:52.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:15:52.920 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:15:52.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:52.922 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:15:52.922 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:15:52.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:15:52.923 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:52.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:15:52.923 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:15:52.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:15:52.924 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:15:52.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:52.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:15:52.926 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:15:52.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:15:52.926 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:15:52.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:15:52.927 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:15:52.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:15:52.927 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:15:52.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:52.932 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:15:52.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:15:52.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:15:52.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:15:52.932 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:15:52.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:15:52.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:15:52.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:52.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:15:52.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:15:52.932 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:15:52.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:52.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:52.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:52.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:52.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:52.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:52.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:52.933 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:15:52.933 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:15:52.933 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:15:52.933 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:15:52.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:52.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:52.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:52.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:15:52.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:52.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:52.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:52.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:52.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:52.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:52.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:52.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:52.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:52.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:52.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:52.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:52.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:52.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:52.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:15:52.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:52.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:52.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:52.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:52.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:15:52.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:15:52.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:15:52.938 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:15:53.415 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:15:53.465 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:15:53.467 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:15:53.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:53.469 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:15:53.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:53.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:53.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:53.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:53.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:53.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:53.495 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:53.495 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:53.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:53.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:53.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:53.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:53.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:53.886 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:15:53.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:53.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:53.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:53.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:54.359 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:15:54.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:54.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:54.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:54.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:54.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:54.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:54.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:54.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:54.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:54.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:54.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:54.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:54.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:54.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:54.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:54.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:54.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:54.831 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:15:54.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:54.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:54.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:54.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:55.305 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:15:55.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:55.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:55.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:55.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:55.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:55.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:55.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:55.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:55.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:55.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:55.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:55.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:55.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:55.400 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:55.400 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:15:55.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:55.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:55.776 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:15:55.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:55.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:55.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:55.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:56.248 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:15:56.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:56.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:56.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:56.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:56.549 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:56.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:56.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:56.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:56.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:56.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:56.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:56.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:56.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:56.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:56.624 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:56.624 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:15:56.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:56.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:56.721 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:15:56.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:56.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:56.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:56.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:57.195 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:15:57.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:57.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:57.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:57.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:57.516 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:15:57.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:57.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:57.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:57.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:57.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:57.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:57.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:57.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:57.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:57.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:57.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:57.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:57.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:57.667 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:15:57.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:15:57.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:15:57.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:15:57.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:15:58.138 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:15:58.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:58.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:58.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:58.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:58.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:58.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:58.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:58.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:58.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:58.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:58.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:58.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:58.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:58.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:58.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:58.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:58.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:58.611 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:15:59.084 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:15:59.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:59.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:59.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:59.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:59.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:15:59.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:15:59.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:15:59.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:59.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:15:59.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:15:59.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:15:59.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:15:59.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:15:59.184 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:15:59.184 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:15:59.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:59.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:15:59.555 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:16:00.028 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:16:00.501 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:16:00.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:00.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:00.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:00.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:00.960 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:00.974 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:16:00.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:00.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:00.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:00.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:00.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:00.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:00.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:00.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:01.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:01.027 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:01.027 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:16:01.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:01.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:01.447 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:16:01.919 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:16:02.391 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:16:02.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:02.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:02.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:02.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:02.849 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:02.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:02.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:02.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:02.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:02.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:02.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:02.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:02.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:16:02.863 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:16:02.863 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:16:02.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:02.863 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2144 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:02.863 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2144 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:02.863 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2144 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:02.863 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2144 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:02.863 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2144 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:02.863 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2144 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:02.863 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2144 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:07.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:16:07.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:16:07.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:07.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:07.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:07.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:07.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:07.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:16:07.877 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:07.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:16:07.878 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:16:07.879 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:16:07.880 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:16:07.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:16:07.880 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:07.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:07.880 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:16:07.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:16:07.880 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:16:07.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:07.882 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:16:07.882 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:16:07.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:16:07.882 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:07.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:07.882 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:16:07.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:16:07.882 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:16:07.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:07.883 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:16:07.883 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:16:07.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:16:07.883 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:07.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:07.883 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:16:07.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:16:07.883 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:16:07.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:07.885 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:16:07.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:16:07.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:16:07.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:16:07.885 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:16:07.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:16:07.886 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:16:07.886 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:16:07.886 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:07.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:07.890 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:16:08.368 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:16:08.412 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:16:08.415 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:16:08.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:08.417 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:16:08.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:08.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:08.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:08.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:08.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:08.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:08.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:08.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:08.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:08.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:08.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:08.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:08.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:08.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:08.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:08.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:08.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:08.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:08.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:08.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:08.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:08.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:08.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:08.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:08.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:08.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:08.603 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:08.603 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:16:08.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:08.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:08.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:08.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:08.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:08.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:08.754 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:08.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:08.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:08.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:08.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:08.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:08.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:08.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:08.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:08.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:08.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:08.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:08.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:08.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:08.837 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:16:08.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:08.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:08.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:08.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:09.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:09.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:09.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:09.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:09.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:09.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:09.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:09.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:09.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:09.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:09.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:09.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:09.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:09.126 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:09.126 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:16:09.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:09.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:09.310 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:16:09.782 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:16:09.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:09.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:09.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:09.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:09.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:09.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:09.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:09.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:09.940 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:09.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:09.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:09.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:09.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:09.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:09.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:09.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:09.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:09.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:16:09.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:16:09.954 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:16:14.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:16:14.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:16:14.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:14.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:14.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:14.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:14.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:14.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:16:14.972 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:14.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:16:14.972 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:16:14.975 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:16:14.975 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:16:14.976 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:16:14.976 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:14.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:14.976 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:16:14.977 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:16:14.977 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:16:14.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:14.978 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:16:14.978 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:16:14.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:16:14.979 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:14.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:14.979 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:16:14.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:16:14.979 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:16:14.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:14.982 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:16:14.982 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:16:14.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:16:14.982 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:14.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:14.982 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:16:14.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:16:14.983 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:16:14.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:14.986 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:16:14.986 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:16:14.986 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:16:14.987 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:14.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:14.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:14.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:14.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:14.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:14.991 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:16:15.469 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:16:15.512 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:16:15.514 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:16:15.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:15.517 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:16:15.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:15.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:15.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:15.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:15.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:15.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:15.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:15.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:15.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:15.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:15.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:15.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:15.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:15.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:15.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:15.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:15.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:15.674 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=148 tn=2 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:15.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:15.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:15.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:15.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:15.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:15.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:15.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:15.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:15.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:15.705 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:15.705 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:16:15.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:15.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:15.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:15.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:15.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:15.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:15.854 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:15.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:15.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:15.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:15.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:15.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:15.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:15.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:15.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:15.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:15.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:15.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:15.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:15.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:15.940 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:16:15.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:15.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:15.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:15.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:16.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:16.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:16.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:16.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:16.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:16.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:16.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:16.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:16.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:16.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:16.192 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:16.192 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:16.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:16.232 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:16.232 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:16:16.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:16.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:16.412 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:16:16.885 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:16:16.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:16.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:16.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:16.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:17.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:17.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:17.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:17.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:17.039 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:17.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:17.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:17.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:17.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:17.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:17.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:17.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:16:17.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:16:17.052 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:16:17.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:17.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:22.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:16:22.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:16:22.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:22.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:22.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:22.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:22.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:22.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:16:22.064 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:22.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:16:22.064 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:16:22.067 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:16:22.067 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:16:22.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:16:22.068 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:22.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:22.069 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:16:22.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:16:22.069 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:16:22.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:22.071 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:16:22.071 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:16:22.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:16:22.072 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:22.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:22.072 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:16:22.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:16:22.072 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:16:22.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:22.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:16:22.074 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:16:22.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:16:22.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:22.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:22.074 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:16:22.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:16:22.074 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:16:22.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:16:22.077 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:16:22.077 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:16:22.077 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:22.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:22.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:22.082 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:16:22.560 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:16:22.606 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:16:22.608 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:16:22.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:22.610 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:16:22.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:22.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:22.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:22.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:22.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:22.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:22.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:22.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:22.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:22.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:22.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:22.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:22.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:22.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:22.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:22.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:22.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:22.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:22.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:22.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:22.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:22.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:22.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:22.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:22.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:22.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:22.795 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:22.795 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:16:22.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:22.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:22.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:22.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:22.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:22.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:22.944 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:22.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:22.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:22.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:22.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:22.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:22.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:22.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:22.964 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:22.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:22.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:22.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:22.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:22.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:23.026 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:16:23.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:23.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:23.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:23.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:23.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:23.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:23.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:23.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:23.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:23.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:23.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:23.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:23.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:23.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:23.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:23.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:23.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:23.311 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:23.311 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:16:23.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:23.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:23.496 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:16:23.969 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:16:24.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:24.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:24.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:24.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:24.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:24.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:24.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:24.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:24.129 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:24.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:24.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:24.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:24.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:24.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:24.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:24.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:16:24.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:16:24.142 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:16:24.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:24.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:24.142 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:24.142 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:24.142 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:24.142 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:24.142 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:24.142 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:24.142 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:29.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:16:29.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:16:29.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:29.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:29.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:29.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:29.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:29.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:16:29.151 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:29.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:16:29.151 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:16:29.153 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:16:29.153 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:16:29.154 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:16:29.154 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:29.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:29.154 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:16:29.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:16:29.155 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:16:29.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:29.156 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:16:29.156 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:16:29.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:16:29.156 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:29.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:29.156 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:16:29.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:16:29.156 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:16:29.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:29.158 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:16:29.158 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:16:29.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:16:29.158 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:29.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:29.158 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:16:29.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:16:29.158 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:16:29.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:29.161 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:16:29.161 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:16:29.162 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:16:29.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:29.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:29.166 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:16:29.645 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:16:29.687 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:16:29.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:29.689 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:16:29.690 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:16:29.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:29.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:29.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:29.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:29.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:29.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:29.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:29.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:29.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:29.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:29.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:29.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:29.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:29.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:29.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:29.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:29.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:29.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:29.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:29.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:29.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:29.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:29.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:29.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:29.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:29.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:29.934 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:29.934 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:16:29.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:29.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:30.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:30.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:30.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:30.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:30.109 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:30.116 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:16:30.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:30.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:30.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:30.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:30.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:30.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:30.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:30.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:30.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:30.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:30.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:30.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:30.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:30.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:30.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:30.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:30.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:30.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:30.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:30.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:30.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:30.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:30.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:30.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:30.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:30.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:30.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:30.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:30.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:30.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:30.403 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:30.403 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:16:30.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:30.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:30.588 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:16:31.060 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:16:31.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:31.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:31.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:31.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:31.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:31.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:31.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:31.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:31.216 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:31.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:31.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:31.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:31.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:31.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:31.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:31.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:31.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:31.230 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:16:31.230 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:16:31.230 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:16:31.230 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:31.230 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:31.231 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:31.231 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:31.231 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:31.231 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:31.231 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:16:36.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:16:36.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:16:36.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:36.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:36.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:36.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:36.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:36.236 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:16:36.236 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:36.236 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:16:36.236 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:16:36.237 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:16:36.237 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:16:36.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:16:36.237 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:36.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:36.237 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:16:36.238 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:16:36.238 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:16:36.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:36.238 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:16:36.238 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:16:36.238 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:16:36.238 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:36.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:36.238 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:16:36.238 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:16:36.238 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:16:36.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:36.240 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:16:36.240 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:16:36.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:16:36.240 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:36.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:36.240 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:16:36.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:16:36.240 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:16:36.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:16:36.242 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:16:36.242 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:16:36.242 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:36.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:36.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:36.247 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:16:36.725 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:16:36.765 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:16:36.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:36.768 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:16:36.769 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:16:36.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:36.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:36.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:36.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:36.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:36.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:36.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:36.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:36.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:36.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:36.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:36.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:36.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:37.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:37.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:37.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:37.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:37.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:37.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:37.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:37.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:37.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:37.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:37.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:37.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:37.197 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:16:37.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:37.206 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:37.206 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:16:37.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:37.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:37.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:37.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:37.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:37.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:37.671 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:16:37.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:37.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:37.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:37.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:37.683 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:37.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:37.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:37.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:37.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:37.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:37.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:37.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:37.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:37.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:37.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:37.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:37.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:37.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:38.143 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:16:38.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:38.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:38.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:38.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:38.615 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:16:38.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:38.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:38.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:38.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:38.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:38.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:38.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:38.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:38.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:38.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:38.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:38.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:38.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:38.797 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:38.797 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:16:38.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:38.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:39.086 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:16:39.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:39.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:39.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:39.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:39.560 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:16:40.032 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:16:40.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:40.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:40.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:40.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:40.504 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:16:40.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:40.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:40.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:40.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:40.823 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:40.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:40.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:40.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:40.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:40.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:40.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:40.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:16:40.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:16:40.829 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:16:40.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:40.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:45.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:16:45.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:16:45.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:45.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:45.836 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:45.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:45.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:45.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:16:45.841 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:45.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:16:45.841 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:16:45.843 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:16:45.843 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:16:45.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:16:45.844 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:45.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:45.844 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:16:45.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:16:45.844 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:16:45.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:45.846 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:16:45.846 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:16:45.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:16:45.846 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:45.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:45.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:16:45.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:16:45.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:16:45.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:45.848 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:16:45.848 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:16:45.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:16:45.848 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:45.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:45.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:16:45.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:16:45.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:16:45.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:16:45.851 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:16:45.851 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:16:45.851 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:16:45.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:45.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:45.856 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:16:46.333 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:16:46.371 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:16:46.372 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:16:46.374 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:16:46.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:46.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:46.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:46.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:46.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:46.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:46.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:46.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:46.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:46.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:46.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:46.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:46.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:46.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:46.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:46.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:46.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:46.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:46.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:46.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:46.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:46.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:46.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:46.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:46.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:46.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:46.803 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:16:46.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:46.817 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:46.817 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:16:46.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:46.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:46.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:46.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:46.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:46.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:47.277 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:16:47.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:47.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:47.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:47.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:47.338 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:47.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:47.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:47.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:47.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:47.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:47.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:47.359 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:47.359 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:47.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:47.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:47.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:47.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:47.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:47.749 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:16:47.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:47.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:47.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:47.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:48.220 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:16:48.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:48.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:48.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:48.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:48.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:48.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:48.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:48.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:48.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:48.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:48.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:48.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:48.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:48.459 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:48.479 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:16:48.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:48.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:48.693 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:16:48.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:48.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:48.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:48.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:49.165 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:16:49.637 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:16:49.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:49.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:49.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:49.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:50.110 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:16:50.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:50.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:50.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:50.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:50.428 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:50.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:50.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:50.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:50.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:50.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:50.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:50.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:50.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:16:50.434 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:16:50.434 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:16:50.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:55.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:16:55.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:16:55.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:55.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:55.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:55.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:55.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:16:55.450 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:16:55.450 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:55.451 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:16:55.451 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:16:55.456 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:16:55.457 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:16:55.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:16:55.458 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:55.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:16:55.459 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:16:55.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:16:55.459 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:16:55.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:55.462 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:16:55.463 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:16:55.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:16:55.463 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:55.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:16:55.464 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:16:55.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:16:55.465 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:16:55.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:55.467 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:16:55.467 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:16:55.467 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:16:55.467 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:16:55.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:16:55.468 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:16:55.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:16:55.468 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:16:55.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:55.473 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:16:55.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:16:55.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:16:55.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:16:55.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:16:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:16:55.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:16:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:16:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:16:55.474 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:16:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:55.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:55.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:55.475 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:16:55.475 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:16:55.475 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:16:55.475 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:16:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:55.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:55.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:16:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:55.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:55.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:55.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:55.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:55.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:55.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:55.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:55.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:16:55.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:55.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:55.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:55.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:55.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:16:55.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:16:55.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:16:55.480 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:16:55.957 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:16:56.010 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:16:56.013 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:16:56.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:56.015 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:16:56.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:56.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:56.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:56.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:56.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:56.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:56.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:56.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:56.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:56.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:56.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:56.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:56.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:56.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:56.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:56.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:56.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:56.427 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:16:56.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:56.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:56.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:56.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:56.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:56.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:56.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:56.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:56.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:56.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:56.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:56.480 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:56.480 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:16:56.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:56.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:56.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:56.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:56.900 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:16:56.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:56.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:57.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:57.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:57.001 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:16:57.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:57.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:57.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:57.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:57.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:57.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:57.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:57.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:57.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:57.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:57.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:57.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:57.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:57.372 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:16:57.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:57.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:57.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:57.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:57.843 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:16:57.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:58.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:58.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:58.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:58.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:16:58.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:16:58.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:16:58.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:58.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:16:58.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:16:58.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:16:58.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:16:58.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:16:58.087 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:16:58.088 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:16:58.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:58.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:16:58.316 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:16:58.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:58.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:58.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:58.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:58.789 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:16:59.262 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:16:59.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:16:59.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:16:59.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:16:59.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:16:59.735 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:17:00.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:00.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:00.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:00.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:00.054 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:00.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:00.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:00.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:00.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:00.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:00.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:00.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:00.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:00.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:17:00.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:17:00.066 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:17:00.066 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:00.066 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:00.066 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:00.066 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:05.070 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:17:05.070 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:17:05.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:05.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:05.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:05.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:05.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:05.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:17:05.083 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:05.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:17:05.083 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:17:05.085 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:17:05.085 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:17:05.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:17:05.085 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:05.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:05.085 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:17:05.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:17:05.085 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:17:05.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:05.087 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:17:05.087 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:17:05.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:17:05.087 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:05.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:05.087 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:17:05.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:17:05.087 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:17:05.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:05.088 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:17:05.088 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:17:05.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:17:05.088 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:05.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:05.088 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:17:05.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:17:05.089 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:17:05.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:05.090 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:17:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:17:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:17:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:17:05.090 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:17:05.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:17:05.091 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:17:05.091 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:17:05.091 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:05.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:05.095 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:17:05.574 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:17:05.616 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:17:05.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:05.620 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:17:05.623 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:17:05.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:05.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:05.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:05.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:05.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:05.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:05.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:05.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:05.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:05.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:05.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:05.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:05.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:05.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:05.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:05.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:05.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:06.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:06.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:06.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:06.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:06.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:06.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:06.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:06.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:06.041 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:17:06.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:06.056 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:17:06.057 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:17:06.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:06.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:06.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:06.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:06.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:06.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:06.513 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:17:06.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:06.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:06.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:06.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:06.570 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:06.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:06.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:06.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:06.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:06.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:06.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:06.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:06.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:06.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:06.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:06.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:06.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:06.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:06.986 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:17:07.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:07.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:07.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:07.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:07.458 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:17:07.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:07.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:07.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:07.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:07.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:07.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:07.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:07.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:07.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:07.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:07.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:07.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:07.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:07.703 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:17:07.704 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:17:07.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:07.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:07.930 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:17:08.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:08.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:08.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:08.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:08.403 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:17:08.876 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:17:09.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:09.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:09.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:09.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:09.348 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:17:09.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:09.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:09.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:09.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:09.668 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:09.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:09.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:09.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:09.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:09.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:09.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:09.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:09.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:09.681 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:17:09.681 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:17:09.681 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:17:09.681 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:09.681 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:09.681 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:09.681 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:14.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:17:14.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:17:14.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:14.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:14.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:14.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:14.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:14.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:17:14.696 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:14.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:17:14.696 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:17:14.701 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:17:14.701 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:17:14.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:17:14.701 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:14.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:14.702 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:17:14.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:17:14.702 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:17:14.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:14.706 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:17:14.706 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:17:14.706 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:17:14.706 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:14.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:14.707 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:17:14.707 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:17:14.707 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:17:14.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:14.710 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:17:14.710 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:17:14.710 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:17:14.710 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:14.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:14.711 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:17:14.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:17:14.711 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:17:14.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:14.715 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:17:14.715 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:17:14.716 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:17:14.716 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:14.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:14.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:14.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:14.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:14.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:14.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:14.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:14.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:14.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:14.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:14.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:14.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:14.720 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:17:15.198 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:17:15.243 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:17:15.245 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:17:15.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:15.248 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:17:15.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:15.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:15.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:15.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:15.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:15.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:15.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:15.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:15.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:15.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:15.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:15.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:17:15.288 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:17:15.288 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:17:15.288 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:15.288 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:15.288 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:15.288 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:15.288 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:15.288 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:15.288 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:20.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:17:20.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:17:20.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:20.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:20.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:20.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:20.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:20.301 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:17:20.301 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:20.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:17:20.302 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:17:20.305 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:17:20.305 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:17:20.305 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:17:20.305 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:20.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:20.306 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:17:20.306 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:17:20.306 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:17:20.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:20.308 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:17:20.308 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:17:20.308 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:17:20.308 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:20.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:20.308 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:17:20.308 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:17:20.308 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:17:20.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:20.310 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:17:20.310 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:17:20.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:17:20.310 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:20.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:20.310 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:17:20.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:17:20.310 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:17:20.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:20.313 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:17:20.313 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:17:20.313 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:17:20.314 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:20.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:20.318 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:17:20.794 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:17:20.839 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:17:20.842 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:17:20.844 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:17:20.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:20.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:20.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:20.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:20.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:20.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:20.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:20.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:20.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:20.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:20.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:20.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:20.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:20.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:20.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:17:20.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:17:20.906 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:17:20.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:20.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:20.906 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:20.906 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:20.906 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:20.906 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:20.906 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:20.906 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:20.906 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:17:25.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:17:25.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:17:25.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:25.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:25.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:25.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:25.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:25.929 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:17:25.929 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:25.929 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:17:25.929 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:17:25.932 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:17:25.932 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:17:25.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:17:25.933 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:25.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:25.933 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:17:25.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:17:25.933 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:17:25.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:25.935 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:17:25.936 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:17:25.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:17:25.936 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:25.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:25.936 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:17:25.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:17:25.936 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:17:25.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:25.939 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:17:25.939 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:17:25.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:17:25.939 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:25.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:25.939 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:17:25.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:17:25.939 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:17:25.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:25.943 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:17:25.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:17:25.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:17:25.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:17:25.943 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:17:25.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:17:25.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:17:25.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:17:25.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:17:25.943 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:17:25.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:17:25.944 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:17:25.944 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:17:25.944 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:25.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:25.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:25.949 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:17:26.426 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:17:26.477 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:17:26.480 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:17:26.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:26.482 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:17:26.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:26.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:26.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:26.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:26.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:26.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:26.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:26.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:26.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:26.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:26.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:26.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:17:26.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:17:26.518 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:17:31.524 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:17:31.524 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:17:31.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:31.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:31.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:31.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:31.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:31.532 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:17:31.532 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:31.533 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:17:31.533 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:17:31.535 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:17:31.535 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:17:31.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:17:31.536 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:31.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:31.536 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:17:31.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:17:31.536 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:17:31.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:31.538 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:17:31.538 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:17:31.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:17:31.539 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:31.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:31.539 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:17:31.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:17:31.539 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:17:31.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:31.542 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:17:31.542 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:17:31.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:17:31.542 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:31.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:31.543 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:17:31.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:17:31.543 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:17:31.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:31.549 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:17:31.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:17:31.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:17:31.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:17:31.550 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:17:31.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:17:31.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:17:31.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:31.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:17:31.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:17:31.550 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:17:31.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:31.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:31.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:31.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:31.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:31.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:31.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:31.551 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:17:31.551 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:17:31.551 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:17:31.551 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:17:31.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:31.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:31.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:31.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:17:31.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:31.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:31.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:31.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:31.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:31.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:31.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:31.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:31.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:31.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:31.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:17:31.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:17:31.554 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:17:31.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:36.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:17:36.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:17:36.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:36.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:36.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:36.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:36.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:36.567 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:17:36.567 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:36.567 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:17:36.568 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:17:36.568 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:17:36.568 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:17:36.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:17:36.569 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:36.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:36.569 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:17:36.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:17:36.569 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:17:36.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:36.569 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:17:36.569 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:17:36.569 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:17:36.569 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:36.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:36.570 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:17:36.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:17:36.570 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:17:36.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:36.571 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:17:36.571 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:17:36.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:17:36.571 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:36.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:36.571 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:17:36.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:17:36.571 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:17:36.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:36.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:17:36.575 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:17:36.575 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:17:36.575 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:36.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:36.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:36.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:36.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:36.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:36.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:36.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:36.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:36.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:36.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:36.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:36.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:36.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:36.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:36.579 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:17:37.057 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:17:37.096 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:17:37.098 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:17:37.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:37.100 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:17:37.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:37.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:37.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:37.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:37.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:37.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:37.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:37.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:37.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:37.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:37.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:37.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:37.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:37.530 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:17:37.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:37.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:37.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:37.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:38.003 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:17:38.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:38.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:38.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:38.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:38.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:38.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:38.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:38.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:38.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:38.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:38.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:38.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:38.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:38.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:38.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:38.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:38.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:38.476 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:17:38.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:38.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:38.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:38.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:38.948 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:17:39.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:39.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:39.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:39.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:39.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:39.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:39.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:39.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:39.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:39.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:39.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:39.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:39.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:39.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:39.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:39.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:39.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:39.419 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:17:39.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:39.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:39.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:39.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:39.889 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:17:40.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:40.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:40.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:40.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:40.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:40.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:40.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:40.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:40.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:40.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:40.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:40.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:40.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:40.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:40.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:40.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:40.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:40.363 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:17:40.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:40.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:40.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:40.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:40.835 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:17:41.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:41.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:41.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:41.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:41.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:41.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:41.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:41.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:41.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:41.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:41.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:41.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:41.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:41.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:41.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:41.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:41.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:41.308 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:17:41.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:41.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:41.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:41.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:41.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:41.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:41.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:41.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:41.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:41.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:41.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:41.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:41.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:41.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:41.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:41.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:41.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:41.685 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:17:41.685 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 03:17:41.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:41.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:41.779 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:17:42.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:42.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:42.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:42.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:42.227 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:42.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:42.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:42.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:42.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:42.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:42.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:42.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:42.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:42.250 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:17:42.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:42.300 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:17:42.301 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-03 03:17:42.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:42.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:42.723 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:17:42.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:42.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:42.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:42.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:42.855 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:42.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:42.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:42.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:42.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:42.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:42.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:42.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:42.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:42.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:42.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:42.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:42.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:42.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:42.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:43.196 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:17:43.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:43.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:43.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:43.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:43.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:43.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:43.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:43.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:43.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:43.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:43.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:43.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:43.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:43.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:43.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:43.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:43.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:43.666 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:17:44.137 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:17:44.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:44.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:44.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:44.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:44.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:44.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:44.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:44.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:44.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:44.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:44.173 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:44.173 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:44.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:44.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:44.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:44.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:44.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:44.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:44.608 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:17:44.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:44.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:44.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:44.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:44.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:44.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:44.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:44.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:44.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:44.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:44.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:44.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:44.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:44.798 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:17:44.798 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:17:44.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:44.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:45.081 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:17:45.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:45.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:45.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:45.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:45.391 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:45.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:45.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:45.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:45.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:45.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:45.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:45.402 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:45.402 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:45.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:45.461 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:17:45.462 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:17:45.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:45.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:45.554 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:17:46.026 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:17:46.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:46.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:46.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:46.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:46.079 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:46.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:46.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:46.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:46.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:46.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:46.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:46.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:46.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:46.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:46.124 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:17:46.124 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:17:46.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:46.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:46.498 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:17:46.971 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:17:46.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:46.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:46.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:46.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:46.979 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:46.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:46.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:46.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:46.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:46.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:46.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:46.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:46.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:47.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:47.028 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:17:47.028 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:17:47.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:47.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:47.443 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:17:47.917 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:17:47.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:47.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:47.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:47.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:47.943 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:47.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:47.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:47.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:47.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:47.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:47.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:47.964 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:47.964 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:48.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:48.015 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:17:48.015 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:17:48.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:48.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:48.389 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:17:48.861 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:17:48.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:48.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:48.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:48.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:48.909 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:48.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:48.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:48.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:48.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:48.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:48.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:48.919 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:48.919 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:48.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:48.955 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:17:48.956 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:17:48.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:48.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:49.334 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:17:49.807 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:17:49.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:49.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:49.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:49.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:49.874 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:49.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:49.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:49.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:49.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:49.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:49.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:49.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:49.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:49.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:49.903 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:17:49.903 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:17:49.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:49.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:50.279 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:17:50.751 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:17:50.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:50.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:50.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:50.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:50.835 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:50.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:50.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:50.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:50.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:50.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:50.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:50.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:50.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:50.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:50.899 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:17:50.899 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:17:50.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:50.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:51.224 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:17:51.696 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:17:51.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:51.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:51.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:51.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:51.802 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:51.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:51.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:51.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:51.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:51.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:51.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:51.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:51.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:51.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:51.841 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:17:51.841 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:17:51.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:51.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:52.168 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:17:52.640 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:17:52.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:52.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:52.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:52.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:52.761 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:52.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:52.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:52.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:52.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:52.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:52.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:52.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:52.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:52.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:52.775 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:17:52.775 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:17:52.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:52.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:53.113 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:17:53.585 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:17:53.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:53.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:53.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:53.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:53.726 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:17:53.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:53.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:53.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:53.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:53.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:53.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:53.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:17:53.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:17:53.732 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:17:53.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:53.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:58.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:17:58.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:17:58.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:58.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:58.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:58.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:58.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:17:58.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:17:58.749 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:58.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:17:58.750 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:17:58.754 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:17:58.755 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:17:58.755 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:17:58.755 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:58.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:17:58.755 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:17:58.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:17:58.756 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:17:58.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:58.759 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:17:58.760 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:17:58.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:17:58.760 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:58.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:17:58.760 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:17:58.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:17:58.760 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:17:58.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:58.764 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:17:58.764 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:17:58.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:17:58.764 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:17:58.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:17:58.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:17:58.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:17:58.765 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:17:58.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:58.770 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:17:58.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:17:58.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:17:58.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:17:58.770 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:17:58.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:17:58.771 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:17:58.771 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:17:58.771 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:58.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:58.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:17:58.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:58.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:58.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:58.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:58.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:58.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:58.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:58.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:58.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:58.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:58.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:58.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:58.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:58.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:58.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:17:58.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:58.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:58.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:58.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:58.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:17:58.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:17:58.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:17:58.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:17:59.254 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:17:59.302 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:17:59.304 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:17:59.306 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:17:59.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:59.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:59.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:59.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:59.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:59.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:59.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:59.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:59.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:59.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:59.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:59.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:59.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:59.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:59.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:59.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:59.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:59.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:59.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:59.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:59.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:59.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:59.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:59.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:59.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:59.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:59.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:59.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:59.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:59.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:59.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:59.723 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:17:59.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:17:59.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:17:59.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:17:59.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:17:59.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:59.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:59.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:59.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:59.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:17:59.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:17:59.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:17:59.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:59.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:59.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:59.863 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:17:59.863 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:17:59.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:17:59.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:17:59.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:17:59.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:17:59.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:18:00.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:18:00.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:18:00.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:18:00.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:18:00.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:18:00.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:18:00.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:18:00.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:18:00.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:18:00.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:18:00.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:18:00.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:18:00.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:18:00.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:18:00.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:18:00.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:18:00.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:18:00.196 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:18:00.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:18:00.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:18:00.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:18:00.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:18:00.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:18:00.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:18:00.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:18:00.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:18:00.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:18:00.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:18:00.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:18:00.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:18:00.384 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:18:00.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:18:00.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:18:05.388 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:18:05.388 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:18:05.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:18:05.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:18:05.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:18:05.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:18:05.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:18:05.396 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:18:05.396 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:18:05.397 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:18:05.397 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:18:05.400 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:18:05.401 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:18:05.401 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:18:05.401 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:18:05.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:18:05.402 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:18:05.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:18:05.403 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:18:05.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:18:05.404 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:18:05.405 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:18:05.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:18:05.405 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:18:05.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:18:05.406 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:18:05.406 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:18:05.406 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:18:05.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:18:05.408 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:18:05.408 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:18:05.408 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:18:05.408 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:18:05.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:18:05.408 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:18:05.408 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:18:05.408 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:18:05.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:18:05.411 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:18:05.412 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:18:05.412 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:18:05.412 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:05.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:05.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:05.417 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:18:05.895 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:18:06.367 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:18:06.843 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:18:07.315 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:18:07.790 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:18:08.262 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:18:08.737 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:18:09.209 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:18:09.684 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:18:10.155 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:18:10.627 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:18:11.101 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:18:11.573 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:18:12.045 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:18:12.519 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:18:12.992 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:18:13.463 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:18:13.937 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:18:14.410 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:18:14.881 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:18:15.356 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:18:15.828 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:18:16.299 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:18:16.773 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:18:17.246 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:18:17.717 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:18:18.192 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:18:18.664 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:18:19.135 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:18:19.609 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:18:20.082 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:18:20.553 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:18:21.029 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:18:21.501 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:18:21.976 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:18:22.448 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:18:22.919 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:18:23.394 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:18:23.864 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:18:24.336 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:18:24.808 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:18:25.284 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:18:25.755 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:18:26.231 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:18:26.703 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:18:27.178 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:18:27.650 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:18:28.125 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:18:28.597 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:18:29.072 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:18:29.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:18:29.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:18:29.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:18:29.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:18:29.439 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:18:29.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:18:29.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:18:29.440 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5181 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:18:29.440 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5181 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:18:29.440 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5181 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:18:29.440 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5181 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:18:29.440 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5181 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:18:29.440 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5181 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:18:29.440 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5181 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:18:34.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:18:34.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:18:34.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:18:34.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:18:34.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:18:34.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:18:34.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:18:34.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:18:34.457 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:18:34.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:18:34.457 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:18:34.461 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:18:34.461 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:18:34.461 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:18:34.462 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:18:34.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:18:34.462 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:18:34.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:18:34.463 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:18:34.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:18:34.465 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:18:34.465 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:18:34.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:18:34.466 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:18:34.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:18:34.467 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:18:34.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:18:34.467 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:18:34.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:18:34.469 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:18:34.469 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:18:34.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:18:34.469 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:18:34.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:18:34.469 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:18:34.470 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:18:34.470 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:18:34.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:18:34.474 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:18:34.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:18:34.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:18:34.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:18:34.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:18:34.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:18:34.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:18:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:18:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:18:34.475 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:18:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:34.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:18:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:34.475 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:18:34.475 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:18:34.475 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:18:34.475 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:18:34.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:34.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:18:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:34.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:34.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:34.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:34.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:34.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:34.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:34.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:34.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:34.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:34.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:18:34.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:34.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:34.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:34.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:34.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:18:34.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:18:34.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:18:34.480 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:18:34.958 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:18:35.430 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:18:35.906 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:18:36.378 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:18:36.853 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:18:37.325 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:18:37.800 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:18:38.272 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:18:38.748 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:18:39.220 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:18:39.695 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:18:40.167 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:18:40.642 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:18:41.114 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:18:41.590 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:18:42.062 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:18:42.537 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:18:43.009 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:18:43.484 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:18:43.956 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:18:44.432 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:18:44.904 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:18:45.378 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:18:45.850 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:18:46.322 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:18:46.793 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:18:47.268 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:18:47.740 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:18:48.215 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:18:48.687 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:18:49.163 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:18:49.634 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:18:50.110 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:18:50.582 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:18:51.057 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:18:51.529 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:18:52.004 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:18:52.476 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:18:52.952 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:18:53.424 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:18:53.899 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:18:54.371 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:18:54.846 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:18:55.318 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:18:55.793 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:18:56.265 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:18:56.741 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:18:57.213 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:18:57.688 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:18:58.160 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:18:58.636 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:18:59.107 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:18:59.583 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:19:00.055 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:19:00.529 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:19:01.001 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 03:19:01.473 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 03:19:01.947 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 03:19:02.419 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 03:19:02.891 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 03:19:03.365 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 03:19:03.837 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 03:19:04.309 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 03:19:04.784 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 03:19:05.259 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 03:19:05.732 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 03:19:06.203 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 03:19:06.677 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 03:19:07.150 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 03:19:07.622 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 03:19:08.096 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 03:19:08.568 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 03:19:09.040 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 03:19:09.515 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 03:19:09.987 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 03:19:10.461 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 03:19:10.933 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 03:19:11.405 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 03:19:11.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:11.879 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 03:19:12.351 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 03:19:12.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:12.823 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 03:19:13.298 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 03:19:13.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:13.770 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 03:19:14.244 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 03:19:14.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:14.716 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 03:19:15.188 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 03:19:15.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:15.662 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 03:19:16.134 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 03:19:16.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:16.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:19:16.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:19:16.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:19:16.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:19:16.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:19:16.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:19:16.510 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:19:21.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:19:21.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:19:21.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:19:21.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:19:21.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:19:21.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:19:21.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:19:21.526 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:19:21.526 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:19:21.526 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:19:21.527 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:19:21.529 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:19:21.529 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:19:21.529 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:19:21.529 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:19:21.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:19:21.530 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:19:21.530 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:19:21.530 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:19:21.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:19:21.532 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:19:21.532 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:19:21.532 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:19:21.532 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:19:21.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:19:21.532 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:19:21.532 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:19:21.532 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:19:21.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:19:21.534 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:19:21.534 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:19:21.534 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:19:21.534 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:19:21.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:19:21.535 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:19:21.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:19:21.535 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:19:21.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:19:21.539 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:19:21.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:19:21.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:19:21.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:19:21.539 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:19:21.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:19:21.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:19:21.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:21.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:19:21.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:19:21.539 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:19:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:21.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:21.540 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:19:21.540 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:19:21.540 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:19:21.540 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:19:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:21.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:21.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:21.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:21.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:21.545 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:19:22.022 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:19:22.073 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:19:22.074 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:22.075 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:19:22.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:22.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:19:22.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:19:22.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:19:22.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:22.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:19:22.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:19:22.105 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:19:22.105 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:19:22.114 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:22.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:22.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:19:22.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:19:22.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:22.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:22.494 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:19:22.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:22.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:19:22.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:19:22.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:19:22.968 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:19:22.979 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 03:19:23.441 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:19:23.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:23.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:19:23.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:19:23.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:19:23.913 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:19:24.384 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:19:24.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:24.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:19:24.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:19:24.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:19:24.857 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:19:25.330 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:19:25.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:25.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:19:25.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:19:25.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:19:25.802 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:19:25.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:25.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:25.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:19:25.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:19:25.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:19:25.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:19:25.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:19:25.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:25.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:19:25.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:19:25.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:19:25.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:19:25.941 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:25.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:25.953 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:19:25.953 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:19:25.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:25.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:26.274 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:19:26.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:26.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:19:26.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:19:26.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:19:26.748 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:19:27.221 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:19:27.694 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:19:28.167 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:19:28.639 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:19:29.112 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:19:29.585 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:19:29.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:29.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:29.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:19:29.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:19:29.978 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:19:29.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:19:29.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:19:29.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:19:29.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:29.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:19:29.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:19:29.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:19:29.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:19:30.002 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:30.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:30.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:19:30.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:19:30.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:30.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:30.057 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:19:30.492 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 03:19:30.528 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:19:30.999 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:19:31.473 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:19:31.945 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:19:32.417 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:19:32.888 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:19:33.361 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:19:33.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:33.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:33.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:19:33.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:19:33.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:19:33.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:19:33.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:19:33.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:33.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:19:33.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:19:33.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:19:33.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:19:33.825 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:33.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:33.829 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:19:33.829 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:19:33.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:33.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:33.833 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:19:34.305 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:19:34.777 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:19:35.250 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:19:35.635 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 03:19:35.722 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:19:36.194 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:19:36.584 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 03:19:36.666 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:19:37.139 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:19:37.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:37.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:37.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:19:37.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:19:37.531 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:19:37.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:37.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:19:37.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:19:37.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:19:37.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:19:37.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:19:37.547 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:19:37.547 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:19:37.548 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:19:37.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:19:37.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:19:37.548 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3457 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:19:37.548 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3457 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:19:37.548 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3457 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:19:37.548 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3457 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:19:37.549 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3457 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:19:37.549 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3457 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:19:37.549 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3457 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:19:42.551 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:19:42.551 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:19:42.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:19:42.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:19:42.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:19:42.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:19:42.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:19:42.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:19:42.559 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:19:42.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:19:42.559 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:19:42.562 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:19:42.562 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:19:42.562 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:19:42.563 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:19:42.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:19:42.563 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:19:42.564 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:19:42.564 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:19:42.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:19:42.565 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:19:42.566 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:19:42.566 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:19:42.566 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:19:42.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:19:42.566 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:19:42.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:19:42.567 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:19:42.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:19:42.568 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:19:42.568 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:19:42.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:19:42.568 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:19:42.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:19:42.569 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:19:42.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:19:42.569 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:19:42.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:19:42.572 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:19:42.572 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:19:42.572 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:42.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:19:42.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:19:42.577 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:19:43.055 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:19:43.099 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:19:43.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:43.103 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:43.106 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:19:43.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:19:43.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:19:43.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:19:43.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:43.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:19:43.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:19:43.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:19:43.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:19:43.194 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:43.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:43.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:19:43.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:19:43.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:43.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:43.528 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:19:43.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:43.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:19:43.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:19:43.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:19:44.001 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:19:44.013 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:44.474 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:19:44.499 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:44.501 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 03:19:44.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:44.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:19:44.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:19:44.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:19:44.946 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:19:44.979 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:45.420 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:19:45.459 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:45.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:45.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:19:45.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:19:45.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:19:45.892 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:19:45.945 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:46.365 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:19:46.425 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:46.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:46.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:19:46.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:19:46.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:19:46.835 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:19:46.905 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:47.309 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:19:47.385 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:47.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:19:47.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:19:47.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:19:47.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:19:47.781 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:19:47.871 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:48.254 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:19:48.351 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:48.725 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:19:48.831 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:49.195 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:19:49.311 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:49.669 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:19:49.791 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:50.141 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:19:50.277 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:50.613 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:19:50.757 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:51.084 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:19:51.237 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:51.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:51.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:51.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:19:51.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:19:51.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:19:51.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:19:51.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:19:51.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:51.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:19:51.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:19:51.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:19:51.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:19:51.264 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:51.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:51.267 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:19:51.267 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:19:51.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:51.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:51.557 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:19:51.957 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:52.030 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:19:52.443 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:52.502 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:19:52.923 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:52.975 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:19:53.404 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:53.448 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:19:53.890 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:53.921 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:19:54.369 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:54.394 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:19:54.849 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:54.867 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:19:55.336 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:55.340 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:19:55.814 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:19:55.816 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:56.286 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:19:56.301 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:56.760 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:19:56.781 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:57.232 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:19:57.267 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:57.704 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:19:57.747 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:58.178 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:19:58.227 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:58.651 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:19:58.713 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:59.123 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:19:59.193 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:59.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:59.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:59.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:19:59.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:19:59.201 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:19:59.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:19:59.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:19:59.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:19:59.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:59.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:19:59.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:19:59.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:19:59.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:19:59.260 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:59.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:19:59.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:19:59.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:19:59.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:59.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:19:59.558 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:19:59.596 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:20:00.028 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:00.030 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 03:20:00.069 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:20:00.505 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:00.541 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:20:00.975 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:01.012 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:20:01.446 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:01.485 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:20:01.917 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:01.958 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:20:02.393 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:02.430 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:20:02.864 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:02.901 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:20:03.335 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:03.374 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:20:03.806 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:03.847 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:20:04.282 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:04.319 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:20:04.753 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:04.790 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:20:05.224 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:05.263 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:20:05.695 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:05.736 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:20:06.171 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:06.208 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:20:06.642 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:06.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:06.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:06.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:06.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:06.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:06.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:06.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:20:06.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:06.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:06.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:06.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:20:06.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:20:06.674 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:06.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:06.678 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:20:06.678 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:20:06.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:06.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:06.681 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:20:07.068 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:07.153 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:20:07.543 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:07.546 [DEBUG] fake_trx.py:269 (MS@172.18.37.22:6700) Recv SETTA cmd
2026-05-03 03:20:07.626 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:20:08.014 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:08.099 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:20:08.484 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:08.572 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:20:08.962 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:09.044 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 03:20:09.432 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:09.518 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 03:20:09.902 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:09.990 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 03:20:10.381 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:10.462 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 03:20:10.850 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:10.935 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 03:20:11.322 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:11.408 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 03:20:11.797 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:11.881 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 03:20:12.269 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:12.354 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 03:20:12.739 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:12.826 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 03:20:13.217 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:13.299 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 03:20:13.687 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:13.772 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 03:20:14.158 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:14.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:14.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:14.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:14.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:14.164 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:20:14.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:14.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:14.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:14.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:14.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:20:14.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:20:14.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:20:14.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:20:14.168 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:20:14.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:20:14.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:20:19.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:20:19.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:20:19.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:20:19.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:20:19.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:20:19.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:20:19.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:20:19.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:20:19.190 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:19.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:20:19.190 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:20:19.192 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:20:19.193 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:20:19.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:20:19.193 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:19.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:20:19.193 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:20:19.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:20:19.194 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:20:19.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:19.195 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:20:19.195 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:20:19.195 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:20:19.195 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:19.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:20:19.195 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:20:19.195 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:20:19.195 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:20:19.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:19.197 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:20:19.197 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:20:19.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:20:19.197 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:19.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:20:19.197 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:20:19.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:20:19.197 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:20:19.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:20:19.199 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:20:19.199 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:20:19.199 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:19.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:19.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:19.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:19.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:19.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:19.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:19.204 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:20:19.682 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:20:19.726 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:20:19.728 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:19.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:19.730 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:20:19.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:19.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:19.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:20:19.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:19.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:19.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:19.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:20:19.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:20:19.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:19.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:19.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:19.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:19.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:20.153 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:20:20.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:20.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:20.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:20.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:20.625 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:20:21.096 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:20:21.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:21.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:21.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:21.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:21.567 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:20:21.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:21.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:21.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:21.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:21.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:21.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:21.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:20:21.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:21.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:21.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:21.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:20:21.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:20:21.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:21.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:21.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:21.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:21.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:22.037 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:20:22.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:22.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:22.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:22.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:22.508 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:20:22.982 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:20:23.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:23.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:23.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:23.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:23.454 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:20:23.926 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:20:24.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:24.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:24.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:24.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:24.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:24.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:24.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:20:24.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:24.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:24.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:24.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:20:24.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:20:24.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:24.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:24.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:24.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:24.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:24.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:24.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:24.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:24.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:24.397 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:20:24.868 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:20:25.342 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:20:25.814 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:20:26.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:26.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:26.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:26.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:26.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:26.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:26.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:26.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:26.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:20:26.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:20:26.230 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:20:26.230 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:20:26.230 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:20:26.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:20:26.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:20:26.231 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1520 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:20:26.231 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1520 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:20:26.231 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1520 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:20:26.231 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1520 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:20:26.231 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1520 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:20:26.231 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1520 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:20:26.231 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1520 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:20:31.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:20:31.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:20:31.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:20:31.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:20:31.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:20:31.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:20:31.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:20:31.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:20:31.262 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:31.263 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:20:31.263 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:20:31.271 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:20:31.271 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:20:31.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:20:31.272 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:31.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:20:31.273 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:20:31.274 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:20:31.274 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:20:31.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:31.278 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:20:31.278 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:20:31.279 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:20:31.279 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:31.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:20:31.280 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:20:31.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:20:31.280 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:20:31.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:31.283 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:20:31.283 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:20:31.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:20:31.283 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:31.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:20:31.284 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:20:31.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:20:31.284 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:20:31.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:31.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:31.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:31.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:31.289 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:20:31.289 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:20:31.289 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:20:31.289 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:20:31.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:31.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:31.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:31.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:20:31.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:31.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:31.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:31.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:31.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:31.293 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:20:31.772 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:20:31.818 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:20:31.820 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:31.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:31.822 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:20:31.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:31.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:31.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:20:31.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:31.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:31.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:31.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:20:31.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:20:31.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:31.873 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:20:31.873 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:20:31.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:31.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:32.243 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:20:32.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:32.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:32.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:32.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:32.717 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:20:33.190 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:20:33.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:33.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:33.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:33.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:33.662 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:20:33.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:33.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:33.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:33.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:33.977 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:20:33.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:33.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:33.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:20:33.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:33.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:33.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:33.997 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:20:33.998 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:20:34.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:34.042 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:20:34.042 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:20:34.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:34.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:34.136 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:20:34.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:34.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:34.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:34.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:34.608 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:20:35.081 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:20:35.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:35.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:35.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:35.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:35.554 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:20:36.026 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:20:36.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:36.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:36.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:36.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:36.149 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:20:36.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:36.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:36.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:36.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:36.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:20:36.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:20:36.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:20:36.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:20:36.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:20:36.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:20:36.158 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:20:41.163 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:20:41.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:20:41.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:20:41.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:20:41.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:20:41.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:20:41.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:20:41.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:20:41.173 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:41.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:20:41.173 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:20:41.176 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:20:41.177 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:20:41.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:20:41.177 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:41.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:20:41.178 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:20:41.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:20:41.178 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:20:41.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:41.180 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:20:41.180 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:20:41.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:20:41.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:41.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:20:41.181 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:20:41.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:20:41.181 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:20:41.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:41.183 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:20:41.183 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:20:41.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:20:41.183 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:41.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:20:41.183 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:20:41.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:20:41.183 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:20:41.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:41.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:20:41.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:20:41.187 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:20:41.188 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:41.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:41.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:41.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:41.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:41.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:41.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:41.192 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:20:41.671 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:20:41.718 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:20:41.720 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:41.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:41.722 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:20:41.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:41.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:41.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:20:41.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:41.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:41.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:41.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:20:41.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:20:41.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:41.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:41.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:41.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:41.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:42.142 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:20:42.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:42.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:42.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:42.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:42.614 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:20:43.085 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:20:43.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:43.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:43.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:43.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:43.556 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:20:43.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:43.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:43.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:43.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:43.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:43.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:43.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:20:43.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:43.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:43.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:43.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:20:43.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:20:43.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:43.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:43.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:43.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:43.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:44.029 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:20:44.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:44.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:44.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:44.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:44.502 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:20:44.974 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:20:45.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:45.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:45.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:45.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:45.445 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:20:45.918 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:20:46.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:46.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:46.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:46.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:46.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:46.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:46.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:20:46.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:46.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:46.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:46.043 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:20:46.043 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:20:46.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:46.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:46.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:46.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:46.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:46.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:46.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:46.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:46.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:46.391 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:20:46.864 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:20:47.337 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:20:47.810 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:20:48.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:48.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:48.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:48.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:48.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:48.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:48.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:48.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:48.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:20:48.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:20:48.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:20:48.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:20:48.148 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:20:48.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:20:48.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:20:53.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:20:53.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:20:53.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:20:53.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:20:53.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:20:53.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:20:53.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:20:53.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:20:53.168 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:53.169 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:20:53.169 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:20:53.171 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:20:53.171 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:20:53.171 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:20:53.171 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:53.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:20:53.171 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:20:53.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:20:53.172 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:20:53.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:53.173 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:20:53.173 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:20:53.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:20:53.173 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:53.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:20:53.173 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:20:53.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:20:53.173 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:20:53.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:53.174 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:20:53.174 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:20:53.174 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:20:53.174 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:20:53.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:20:53.175 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:20:53.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:20:53.175 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:20:53.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:20:53.177 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:20:53.177 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:20:53.177 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:20:53.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:20:53.182 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:20:53.659 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:20:53.701 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:20:53.704 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:20:53.705 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:20:53.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:53.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:53.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:53.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:20:53.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:53.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:53.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:53.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:20:53.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:20:53.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:53.763 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:20:53.764 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:20:53.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:53.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:54.130 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:20:54.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:54.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:54.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:54.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:54.603 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:20:55.074 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:20:55.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:55.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:55.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:55.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:55.548 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:20:55.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:55.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:55.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:55.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:55.866 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:20:55.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:55.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:55.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:20:55.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:55.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:20:55.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:20:55.885 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:20:55.885 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:20:55.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:55.931 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:20:55.931 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:20:55.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:55.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:56.021 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:20:56.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:56.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:56.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:56.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:56.493 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:20:56.968 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:20:57.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:57.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:57.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:57.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:57.441 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:20:57.915 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:20:58.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:20:58.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:20:58.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:20:58.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:20:58.042 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:20:58.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:20:58.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:20:58.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:20:58.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:20:58.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:20:58.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:20:58.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:20:58.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:20:58.057 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:20:58.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:20:58.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:20:58.057 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1052 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:20:58.057 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1052 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:20:58.057 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1052 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:20:58.057 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1052 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:20:58.057 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1052 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:20:58.057 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1052 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:20:58.057 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1052 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:03.058 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:03.058 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:03.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:03.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:03.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:03.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:03.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:03.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:03.062 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:03.063 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:03.063 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:21:03.065 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:21:03.066 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:21:03.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:03.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:03.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:03.067 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:21:03.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:03.067 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:21:03.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:03.068 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:21:03.068 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:21:03.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:03.069 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:03.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:03.069 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:21:03.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:03.069 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:21:03.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:03.070 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:21:03.070 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:21:03.070 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:03.070 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:03.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:03.071 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:21:03.071 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:03.071 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:21:03.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:21:03.073 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:21:03.073 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:21:03.073 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:03.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:03.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:03.078 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:21:03.556 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:21:03.598 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:21:03.600 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:21:03.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:03.602 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:21:03.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:03.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:03.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:21:03.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:03.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:03.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:03.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:21:03.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:21:03.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:03.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:03.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:03.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:03.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:04.029 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:21:04.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:04.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:04.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:04.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:04.502 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:21:04.975 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:21:05.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:05.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:05.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:05.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:05.447 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:21:05.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:05.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:05.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:05.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:05.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:05.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:05.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:05.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:05.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:05.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:05.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:05.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:05.859 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:05.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:05.859 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:21:05.859 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:05.859 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:05.860 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:05.860 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:05.860 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:05.860 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:05.860 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:10.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:10.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:10.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:10.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:10.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:10.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:10.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:10.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:10.865 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:10.865 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:10.865 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:21:10.866 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:21:10.866 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:21:10.866 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:10.866 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:10.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:10.867 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:21:10.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:10.867 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:21:10.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:10.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:21:10.868 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:21:10.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:10.868 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:10.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:10.868 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:21:10.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:10.868 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:21:10.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:10.869 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:21:10.869 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:21:10.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:10.869 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:10.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:10.869 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:21:10.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:10.869 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:21:10.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:21:10.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:21:10.871 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:21:10.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:10.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:21:11.353 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:21:11.398 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:21:11.401 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:21:11.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:11.403 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:21:11.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:11.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:11.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:21:11.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:11.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:11.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:11.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:21:11.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:21:11.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:11.457 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:21:11.457 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:21:11.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:11.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:11.821 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:21:11.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:11.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:11.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:11.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:12.294 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:21:12.763 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:21:12.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:12.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:12.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:12.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:13.237 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:21:13.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:13.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:13.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:13.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:13.649 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:21:13.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:13.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:13.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:13.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:13.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:13.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:13.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:13.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:13.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:13.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:13.663 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:21:13.663 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:13.664 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:13.664 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:13.664 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:13.664 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:13.664 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:13.664 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:18.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:18.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:18.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:18.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:18.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:18.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:18.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:18.676 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:18.676 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:18.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:18.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:21:18.681 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:21:18.681 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:21:18.682 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:18.682 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:18.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:18.683 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:21:18.684 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:18.684 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:21:18.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:18.686 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:21:18.686 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:21:18.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:18.687 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:18.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:18.687 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:21:18.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:18.688 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:21:18.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:18.691 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:21:18.691 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:21:18.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:18.691 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:18.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:18.691 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:21:18.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:18.691 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:21:18.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:18.696 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:21:18.696 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:21:18.696 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:21:18.697 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:21:18.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:18.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:18.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:18.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:21:18.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:18.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:18.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:18.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:18.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:18.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:18.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:18.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:18.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:18.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:18.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:18.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:18.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:18.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:18.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:18.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:18.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:18.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:18.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:18.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:18.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:18.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:18.701 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:21:19.180 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:21:19.227 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:21:19.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:19.229 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:21:19.230 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:21:19.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:19.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:19.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:21:19.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:19.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:19.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:19.285 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:21:19.285 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:21:19.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:19.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:19.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:19.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:19.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:19.648 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:21:19.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:19.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:19.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:19.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:19.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:19.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:19.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:19.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:19.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:19.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:19.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:21:19.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:19.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:19.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:19.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:21:19.726 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:21:19.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:19.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:19.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:19.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:19.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:20.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:20.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:20.119 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:21:20.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:20.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:20.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:20.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:20.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:20.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:20.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:20.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:20.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:20.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:20.129 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:21:20.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:20.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:25.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:25.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:25.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:25.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:25.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:25.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:25.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:25.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:25.144 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:25.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:25.144 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:21:25.147 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:21:25.147 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:21:25.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:25.148 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:25.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:25.148 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:21:25.149 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:25.149 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:21:25.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:25.150 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:21:25.150 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:21:25.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:25.150 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:25.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:25.150 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:21:25.151 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:25.151 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:21:25.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:25.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:21:25.152 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:21:25.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:25.153 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:25.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:25.153 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:21:25.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:25.153 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:21:25.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:25.155 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:21:25.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:21:25.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:21:25.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:21:25.155 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:21:25.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:21:25.156 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:21:25.156 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:21:25.156 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:25.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:25.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:25.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:25.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:25.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:25.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:25.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:25.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:25.161 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:21:25.638 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:21:25.682 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:21:25.684 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:21:25.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:25.686 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:21:25.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:25.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:25.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:21:25.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:25.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:25.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:25.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:21:25.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:21:25.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:25.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:25.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:25.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:25.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:26.111 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:21:26.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:26.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:26.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:26.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:26.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:26.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:26.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:26.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:26.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:26.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:26.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:21:26.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:26.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:26.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:26.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:21:26.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:21:26.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:26.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:26.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:26.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:26.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:26.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:26.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:26.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:26.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:26.582 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:21:26.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:26.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:26.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:26.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:26.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:26.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:26.594 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:26.594 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:26.594 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:21:26.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:26.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:31.599 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:31.599 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:31.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:31.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:31.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:31.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:31.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:31.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:31.608 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:31.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:31.608 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:21:31.613 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:21:31.613 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:21:31.613 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:31.613 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:31.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:31.614 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:21:31.614 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:31.614 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:21:31.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:31.618 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:21:31.618 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:21:31.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:31.618 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:31.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:31.618 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:21:31.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:31.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:21:31.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:31.621 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:21:31.622 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:21:31.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:31.622 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:31.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:31.622 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:21:31.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:31.622 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:21:31.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:31.626 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:21:31.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:21:31.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:21:31.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:21:31.626 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:21:31.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:21:31.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:21:31.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:21:31.627 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:21:31.627 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:21:31.627 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:31.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:31.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:31.632 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:21:32.110 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:21:32.155 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:21:32.157 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:21:32.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:32.159 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:21:32.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:32.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:32.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:21:32.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:32.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:32.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:32.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:21:32.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:21:32.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:32.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:32.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:32.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:32.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:32.577 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:21:32.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:32.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:32.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:32.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:32.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:32.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:32.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:32.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:32.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:32.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:32.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:21:32.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:32.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:32.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:32.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:21:32.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:21:32.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:32.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:32.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:32.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:32.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:33.048 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:21:33.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:33.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:33.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:33.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:33.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:33.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:33.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:33.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:33.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:33.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:33.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:33.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:33.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:33.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:33.101 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:21:38.104 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:38.104 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:38.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:38.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:38.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:38.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:38.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:38.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:38.116 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:38.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:38.116 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:21:38.119 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:21:38.119 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:21:38.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:38.119 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:38.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:38.119 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:21:38.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:38.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:21:38.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:38.122 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:21:38.122 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:21:38.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:38.122 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:38.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:38.122 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:21:38.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:38.122 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:21:38.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:38.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:21:38.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:21:38.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:38.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:38.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:38.124 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:21:38.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:38.125 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:21:38.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:38.127 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:21:38.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:21:38.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:21:38.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:21:38.127 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:21:38.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:21:38.128 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:21:38.128 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:21:38.128 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:38.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:38.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:38.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:38.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:38.133 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:21:38.611 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:21:38.648 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:21:38.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:38.650 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:21:38.651 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:21:38.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:38.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:38.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:21:38.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:38.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:38.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:38.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:21:38.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:21:38.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:38.757 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:21:38.757 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:21:38.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:38.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:39.081 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:21:39.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:39.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:39.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:39.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:39.554 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:21:40.026 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:21:40.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:40.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:40.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:40.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:40.500 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:21:40.973 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:21:41.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:41.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:41.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:41.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:41.445 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:21:41.918 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:21:42.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:42.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:42.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:42.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:42.391 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:21:42.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:42.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:42.762 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:21:42.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:42.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:42.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:42.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:42.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:42.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:42.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:42.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:42.771 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:42.771 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:42.771 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:21:42.771 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1002 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:42.772 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1002 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:42.772 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1002 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:42.772 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1002 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:42.772 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1002 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:42.772 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1002 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:21:47.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:47.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:47.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:47.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:47.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:47.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:47.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:47.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:47.781 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:47.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:47.781 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:21:47.783 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:21:47.783 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:21:47.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:47.784 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:47.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:47.784 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:21:47.785 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:47.785 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:21:47.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:47.786 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:21:47.786 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:21:47.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:47.786 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:47.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:47.786 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:21:47.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:47.786 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:21:47.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:47.789 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:21:47.789 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:21:47.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:47.789 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:47.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:47.789 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:21:47.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:47.789 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:21:47.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:47.792 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:21:47.793 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:21:47.793 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:21:47.793 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:47.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:47.798 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:21:48.273 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:21:48.326 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:21:48.328 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:21:48.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:48.330 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:21:48.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:48.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:48.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:21:48.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:48.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:48.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:48.398 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:21:48.398 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:21:48.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:48.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:48.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:48.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:48.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:48.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:48.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:48.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:48.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:48.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:48.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:48.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:21:48.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:48.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:48.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:48.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:21:48.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:21:48.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:48.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:48.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:48.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:48.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:48.740 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:21:48.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:48.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:48.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:48.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:48.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:48.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:48.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:48.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:48.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:48.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:48.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:48.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:48.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:48.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:48.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:48.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:48.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:48.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:48.924 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:21:53.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:53.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:53.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:53.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:53.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:53.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:53.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:53.931 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:53.931 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:53.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:21:53.932 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:21:53.932 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:21:53.933 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:21:53.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:53.933 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:53.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:53.933 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:21:53.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:21:53.933 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:21:53.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:53.934 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:21:53.934 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:21:53.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:53.934 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:53.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:53.934 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:21:53.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:21:53.934 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:21:53.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:53.935 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:21:53.935 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:21:53.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:53.935 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:21:53.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:21:53.935 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:21:53.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:21:53.935 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:21:53.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:53.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:21:53.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:21:53.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:21:53.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:21:53.937 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:21:53.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:21:53.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:21:53.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:53.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:21:53.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:21:53.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:21:53.938 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:21:53.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:21:53.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:21:53.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:53.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:53.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:21:53.942 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:21:54.419 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:21:54.459 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:21:54.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:54.462 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:21:54.464 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:21:54.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:54.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:54.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:21:54.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:54.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:21:54.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:21:54.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:21:54.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:21:54.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:21:54.567 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:21:54.567 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:21:54.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:54.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:21:54.890 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:21:54.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:54.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:54.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:54.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:55.363 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:21:55.835 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:21:55.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:55.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:55.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:55.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:56.308 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:21:56.781 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:21:56.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:56.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:56.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:56.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:57.254 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:21:57.727 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:21:57.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:57.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:57.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:57.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:58.199 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:21:58.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:21:58.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:21:58.572 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:21:58.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:21:58.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:21:58.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:21:58.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:21:58.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:21:58.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:21:58.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:21:58.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:21:58.577 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:21:58.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:21:58.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:03.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:03.583 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:03.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:03.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:03.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:03.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:03.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:03.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:03.591 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:03.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:03.591 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:22:03.593 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:22:03.593 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:22:03.593 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:03.593 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:03.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:03.593 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:22:03.593 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:03.593 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:22:03.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:03.595 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:22:03.595 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:22:03.595 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:03.595 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:03.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:03.596 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:22:03.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:03.596 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:22:03.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:03.598 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:22:03.598 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:22:03.599 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:03.599 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:03.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:03.599 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:22:03.599 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:03.599 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:22:03.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:03.604 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:22:03.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:22:03.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:22:03.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:22:03.604 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:22:03.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:22:03.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:22:03.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:03.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:22:03.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:22:03.605 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:22:03.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:03.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:03.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:03.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:03.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:03.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:03.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:03.605 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:22:03.605 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:22:03.605 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:22:03.605 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:22:03.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:03.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:03.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:03.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:22:03.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:03.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:03.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:03.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:03.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:03.610 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:22:04.088 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:22:04.137 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:22:04.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:04.140 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:22:04.142 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:22:04.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:04.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:04.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:22:04.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:04.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:22:04.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:22:04.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:22:04.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:22:04.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:04.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:22:04.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:22:04.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:04.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:04.561 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:22:04.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:04.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:04.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:04.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:04.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:04.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:04.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:04.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:04.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:04.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:04.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:04.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:04.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:04.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:04.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:04.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:04.968 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:22:04.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:04.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:09.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:09.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:09.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:09.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:09.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:09.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:09.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:09.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:09.981 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:09.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:09.981 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:22:09.984 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:22:09.985 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:22:09.985 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:09.985 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:09.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:09.986 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:22:09.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:09.986 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:22:09.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:09.988 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:22:09.988 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:22:09.988 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:09.988 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:09.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:09.988 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:22:09.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:09.989 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:22:09.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:09.991 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:22:09.991 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:22:09.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:09.991 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:09.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:09.991 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:22:09.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:09.991 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:22:09.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:09.994 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:22:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:22:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:22:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:22:09.994 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:22:09.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:22:09.995 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:22:09.995 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:22:09.995 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:09.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:09.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:10.000 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:22:10.478 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:22:10.520 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:22:10.522 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:22:10.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:10.524 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:22:10.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:10.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:10.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:22:10.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:10.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:22:10.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:22:10.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:22:10.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:22:10.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:10.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:22:10.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:22:10.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:10.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:10.949 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:22:10.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:10.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:10.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:10.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:11.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:11.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:11.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:11.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:11.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:11.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:11.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:11.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:11.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:11.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:11.355 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:11.355 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:11.355 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:22:11.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:11.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:11.355 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=295 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:11.355 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:11.355 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:11.355 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:11.355 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:16.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:16.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:16.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:16.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:16.359 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:16.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:16.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:16.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:16.369 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:16.369 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:16.369 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:22:16.372 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:22:16.372 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:22:16.373 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:16.373 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:16.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:16.374 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:22:16.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:16.374 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:22:16.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:16.377 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:22:16.377 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:22:16.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:16.377 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:16.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:16.377 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:22:16.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:16.377 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:22:16.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:16.380 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:22:16.380 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:22:16.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:16.380 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:16.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:16.380 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:22:16.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:16.380 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:22:16.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:16.383 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:22:16.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:22:16.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:22:16.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:22:16.383 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:22:16.384 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:22:16.384 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:22:16.384 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:16.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:16.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:16.389 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:22:16.866 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:22:16.906 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:22:16.907 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:22:16.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:16.908 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:22:16.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:16.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:16.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:22:16.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:16.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:22:16.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:22:16.938 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:22:16.938 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:22:16.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:16.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:22:16.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:22:16.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:16.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:17.338 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:22:17.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:17.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:17.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:17.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:17.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:17.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:17.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:17.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:17.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:17.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:17.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:17.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:17.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:17.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:17.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:17.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:17.706 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:17.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:17.707 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:22:17.707 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=285 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:17.707 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=285 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:17.707 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=285 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:17.707 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=285 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:17.708 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=286 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:17.708 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=286 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:17.708 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=286 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:17.708 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=286 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:17.708 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=286 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:17.708 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=286 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:17.708 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=286 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:22.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:22.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:22.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:22.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:22.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:22.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:22.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:22.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:22.717 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:22.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:22.717 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:22:22.721 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:22:22.721 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:22:22.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:22.722 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:22.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:22.722 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:22:22.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:22.723 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:22:22.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:22.724 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:22:22.724 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:22:22.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:22.724 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:22.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:22.725 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:22:22.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:22.725 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:22:22.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:22.727 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:22:22.727 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:22:22.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:22.727 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:22.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:22.727 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:22:22.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:22.727 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:22:22.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:22.730 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:22:22.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:22:22.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:22:22.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:22:22.730 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:22:22.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:22:22.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:22:22.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:22.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:22:22.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:22:22.730 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:22:22.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:22:22.731 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:22:22.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:22.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:22.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:22.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:22.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:22.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:22.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:22.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:22.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:22.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:22.735 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:22:23.214 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:22:23.252 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:22:23.254 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:22:23.256 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:22:23.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:23.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:23.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:23.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:22:23.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:23.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:22:23.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:22:23.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:22:23.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:22:23.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:23.361 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:22:23.361 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:22:23.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:23.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:23.686 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:22:23.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:23.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:23.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:23.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:24.156 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:22:24.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:24.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:24.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:24.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:24.215 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:22:24.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:24.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:24.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:24.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:24.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:24.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:24.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:24.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:24.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:24.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:24.229 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:22:29.233 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:29.233 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:29.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:29.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:29.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:29.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:29.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:29.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:29.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:29.243 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:29.243 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:22:29.247 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:22:29.247 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:22:29.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:29.248 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:29.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:29.249 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:22:29.249 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:29.249 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:22:29.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:29.251 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:22:29.252 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:22:29.252 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:29.252 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:29.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:29.252 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:22:29.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:29.253 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:22:29.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:29.255 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:22:29.255 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:22:29.255 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:29.255 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:29.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:29.255 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:22:29.256 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:29.256 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:22:29.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:29.259 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:22:29.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:22:29.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:22:29.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:22:29.259 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:22:29.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:22:29.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:22:29.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:22:29.260 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:22:29.260 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:22:29.260 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:29.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:29.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:29.265 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:22:29.742 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:22:29.787 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:22:29.789 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:22:29.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:29.792 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:22:29.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:29.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:29.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:22:29.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:29.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:22:29.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:22:29.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:22:29.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:22:29.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:29.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:22:29.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:22:29.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:29.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:30.214 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:22:30.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:30.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:30.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:30.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:30.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:30.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:30.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:30.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:30.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:30.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:30.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:30.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:30.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:30.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:30.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:30.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:30.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:30.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:30.624 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:22:30.624 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:30.624 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:30.625 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:30.625 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:30.625 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:30.625 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=295 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:30.625 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:30.625 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:30.625 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:30.625 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:30.625 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:30.625 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:30.625 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:35.625 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:35.625 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:35.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:35.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:35.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:35.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:35.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:35.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:35.634 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:35.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:35.634 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:22:35.637 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:22:35.637 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:22:35.638 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:35.638 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:35.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:35.638 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:22:35.639 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:35.639 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:22:35.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:35.640 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:22:35.640 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:22:35.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:35.640 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:35.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:35.640 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:22:35.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:35.640 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:22:35.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:35.642 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:22:35.642 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:22:35.642 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:35.642 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:35.642 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:35.642 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:22:35.642 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:35.642 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:22:35.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:22:35.645 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:22:35.645 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:22:35.645 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:35.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:35.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:35.650 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:22:36.124 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:22:36.171 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:22:36.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:36.175 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:22:36.178 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:22:36.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:36.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:36.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:22:36.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:36.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:22:36.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:22:36.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:22:36.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:22:36.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:36.271 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:22:36.271 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:22:36.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:36.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:36.595 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:22:36.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:36.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:36.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:36.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:37.067 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:22:37.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:37.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:37.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:37.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:37.125 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:22:37.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:37.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:37.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:37.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:37.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:37.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:37.137 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:37.137 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:37.137 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:22:37.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:37.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:37.138 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:37.138 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:37.138 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:37.138 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:37.138 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:37.138 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:37.138 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:42.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:42.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:42.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:42.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:42.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:42.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:42.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:42.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:42.154 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:42.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:42.155 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:22:42.160 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:22:42.161 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:22:42.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:42.161 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:42.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:42.162 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:22:42.163 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:42.163 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:22:42.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:42.165 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:22:42.166 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:22:42.166 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:42.166 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:42.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:42.167 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:22:42.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:42.167 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:22:42.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:42.169 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:22:42.169 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:22:42.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:42.169 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:42.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:42.169 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:22:42.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:42.169 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:22:42.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:22:42.173 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:22:42.173 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:22:42.173 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:42.178 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:22:42.656 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:22:42.694 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:22:42.695 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:22:42.697 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:22:42.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:42.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:42.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:42.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:22:42.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:42.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:22:42.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:22:42.715 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:22:42.715 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:22:43.127 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:22:43.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:43.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:43.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:43.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:43.599 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:22:43.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:43.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:43.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:43.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:43.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:43.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:43.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:22:43.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:43.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:22:43.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:22:43.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:22:43.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:22:44.071 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:22:44.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:44.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:44.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:44.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:44.545 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:22:44.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 03:22:45.017 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:22:45.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 03:22:45.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:45.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:45.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:45.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:45.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:45.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:45.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:45.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:45.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:45.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:45.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:45.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:45.069 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:22:45.069 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=625 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:45.069 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=625 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:45.069 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=625 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:45.069 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=625 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:45.069 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=625 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:45.069 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=625 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:45.069 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=625 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:22:50.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:50.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:50.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:50.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:50.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:50.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:50.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:50.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:50.081 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:50.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:22:50.081 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:22:50.085 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:22:50.085 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:22:50.086 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:50.086 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:50.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:50.086 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:22:50.086 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:22:50.086 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:22:50.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:50.090 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:22:50.090 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:22:50.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:50.090 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:50.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:50.090 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:22:50.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:22:50.090 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:22:50.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:50.093 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:22:50.093 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:22:50.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:50.093 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:22:50.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:22:50.094 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:22:50.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:22:50.094 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:22:50.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:50.097 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:22:50.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:22:50.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:22:50.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:22:50.098 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:22:50.098 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:22:50.098 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:50.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:22:50.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:22:50.103 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:22:50.581 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:22:50.628 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:22:50.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:22:50.631 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:22:50.634 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:22:50.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:50.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:50.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:22:50.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:50.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:22:50.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:22:50.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:22:50.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:22:51.053 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:22:51.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:51.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:51.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:51.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:51.524 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:22:51.996 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:22:52.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:52.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:52.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:52.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:52.469 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:22:52.941 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:22:53.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:53.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:53.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:53.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:53.413 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:22:53.884 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:22:54.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:54.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:54.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:54.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:54.358 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:22:54.830 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:22:55.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:55.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:55.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:55.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:55.302 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:22:55.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 03:22:55.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:22:55.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:22:55.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:55.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:22:55.775 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:22:56.248 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:22:56.720 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:22:57.195 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:22:57.667 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:22:58.141 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:22:58.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:22:58.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:22:58.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:22:58.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:22:58.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:22:58.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:22:58.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:22:58.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:22:58.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:22:58.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:22:58.532 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:22:58.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:22:58.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:03.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:23:03.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:23:03.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:23:03.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:23:03.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:03.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:23:03.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:23:03.547 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:23:03.547 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:03.547 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:23:03.547 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:23:03.550 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:23:03.550 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:23:03.550 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:23:03.550 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:03.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:23:03.551 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:23:03.552 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:23:03.552 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:23:03.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:03.554 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:23:03.554 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:23:03.554 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:23:03.555 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:03.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:23:03.555 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:23:03.555 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:23:03.555 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:23:03.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:03.559 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:23:03.559 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:23:03.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:23:03.559 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:03.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:03.559 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:23:03.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:23:03.560 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:23:03.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:03.565 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:23:03.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:23:03.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:23:03.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:23:03.565 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:03.566 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:23:03.566 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:23:03.567 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:23:03.567 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:23:03.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:03.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:03.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:03.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:23:03.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:03.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:03.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:03.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:03.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:03.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:03.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:03.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:03.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:03.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:03.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:03.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:03.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:03.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:03.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:03.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:03.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:03.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:03.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:03.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:03.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:03.571 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:23:04.049 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:23:04.100 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:23:04.103 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:23:04.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:23:04.105 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:23:04.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:23:04.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:23:04.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:23:04.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:23:04.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:23:04.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:23:04.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:23:04.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:23:04.521 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:23:04.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:04.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:04.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:04.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:04.992 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:23:05.463 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:23:05.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:05.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:05.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:05.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:05.937 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:23:06.409 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:23:06.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:06.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:06.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:06.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:06.880 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:23:07.352 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:23:07.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:07.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:07.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:07.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:07.825 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:23:08.297 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:23:08.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:08.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:08.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:08.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:08.769 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:23:09.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 03:23:09.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:23:09.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:23:09.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:23:09.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:23:09.242 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:23:09.715 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:23:10.187 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:23:10.661 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:23:11.133 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:23:11.606 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:23:11.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:23:11.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:23:12.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:12.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:12.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:12.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:12.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:23:12.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:23:12.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:23:12.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:12.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:23:12.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:23:12.002 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:23:12.002 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1822 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:12.002 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1822 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:12.002 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1822 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:12.002 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1822 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:12.002 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:12.002 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:17.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:23:17.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:23:17.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:23:17.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:23:17.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:17.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:23:17.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:23:17.018 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:23:17.018 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:17.018 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:23:17.018 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:23:17.022 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:23:17.022 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:23:17.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:23:17.023 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:17.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:23:17.024 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:23:17.024 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:23:17.024 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:23:17.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:17.027 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:23:17.027 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:23:17.027 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:23:17.027 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:17.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:23:17.028 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:23:17.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:23:17.029 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:23:17.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:17.031 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:23:17.031 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:23:17.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:23:17.031 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:17.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:17.032 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:23:17.032 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:23:17.032 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:23:17.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:17.036 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:23:17.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:23:17.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:23:17.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:23:17.036 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:23:17.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:23:17.037 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:23:17.037 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:23:17.037 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:17.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:17.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:17.042 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:23:17.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:23:17.565 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:23:17.567 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:23:17.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:23:17.569 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:23:17.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:23:17.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:23:17.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:23:17.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:23:17.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:23:17.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:23:17.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:23:17.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:23:17.991 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:23:18.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:18.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:18.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:18.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:18.462 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:23:18.936 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:23:19.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:19.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:19.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:19.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:19.408 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:23:19.880 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:23:20.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:20.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:20.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:20.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:20.351 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:23:20.825 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:23:21.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:21.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:21.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:21.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:21.297 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:23:21.768 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:23:22.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:22.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:22.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:22.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:22.240 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:23:22.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 03:23:22.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:23:22.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:23:22.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:23:22.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:23:22.714 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:23:23.186 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:23:23.660 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:23:24.132 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:23:24.605 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:23:25.079 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:23:25.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:23:25.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:23:25.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:25.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:25.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:25.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:25.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:23:25.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:23:25.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:23:25.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:23:25.472 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:23:25.472 [WARNING] transceiver.py:257 (TRX1@172.18.37.20:5700/1) RX TRXD message (ver=1 fn=1821 tn=0 bl=148 pwr=4), but transceiver is not running => dropping...
2026-05-03 03:23:25.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:23:25.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:25.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1821 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:25.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1821 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:25.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1821 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:25.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1821 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:25.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1821 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:25.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1821 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:25.472 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1821 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:30.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:23:30.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:23:30.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:23:30.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:23:30.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:30.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:23:30.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:23:30.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:23:30.485 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:30.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:23:30.485 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:23:30.489 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:23:30.489 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:23:30.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:23:30.489 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:30.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:23:30.489 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:23:30.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:23:30.490 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:23:30.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:30.493 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:23:30.493 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:23:30.493 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:23:30.494 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:30.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:23:30.494 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:23:30.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:23:30.494 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:23:30.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:30.496 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:23:30.496 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:23:30.496 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:23:30.496 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:30.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:30.496 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:23:30.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:23:30.497 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:23:30.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:30.500 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:23:30.500 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:23:30.500 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:23:30.501 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:30.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:30.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:30.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:30.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:30.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:30.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:30.505 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:23:30.982 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:23:31.028 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:23:31.030 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:23:31.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:23:31.033 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:23:31.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:23:31.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:23:31.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:23:31.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:23:31.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:23:31.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:23:31.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:23:31.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:23:31.455 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:23:31.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:31.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:31.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:31.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:31.926 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:23:32.399 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:23:32.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:32.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:32.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:32.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:32.872 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:23:33.344 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:23:33.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:33.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:33.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:33.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:33.815 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:23:34.288 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:23:34.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:34.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:34.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:34.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:34.760 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:23:35.232 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:23:35.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:35.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:35.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:35.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:35.703 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:23:35.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 03:23:35.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:23:35.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:23:35.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:23:35.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:23:36.177 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:23:36.649 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:23:37.121 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:23:37.595 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:23:38.068 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:23:38.540 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:23:38.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:23:38.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:23:38.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:38.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:38.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:38.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:38.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:23:38.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:23:38.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:23:38.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:38.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:23:38.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:23:38.936 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:23:43.948 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:23:43.948 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:23:43.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:23:43.948 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:23:43.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:23:43.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:43.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:23:43.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:23:43.959 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:43.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:23:43.960 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:23:43.965 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:23:43.965 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:23:43.966 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:23:43.966 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:43.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:23:43.966 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:23:43.966 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:23:43.966 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:23:43.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:43.970 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:23:43.970 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:23:43.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:23:43.970 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:43.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:23:43.970 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:23:43.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:23:43.971 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:23:43.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:43.974 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:23:43.974 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:23:43.974 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:23:43.974 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:43.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:43.974 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:23:43.974 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:23:43.974 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:23:43.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:43.978 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:23:43.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:23:43.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:23:43.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:23:43.978 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:23:43.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:23:43.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:23:43.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:43.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:23:43.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:23:43.978 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:23:43.979 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:23:43.979 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:23:43.979 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:43.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:43.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:43.984 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:23:44.462 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:23:44.507 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:23:44.510 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:23:44.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:23:44.512 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:23:44.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:23:44.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:23:44.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:23:44.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:23:44.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:23:44.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:23:44.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:23:44.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:23:44.933 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:23:44.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:44.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:44.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:44.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:45.405 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:23:45.878 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:23:45.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:45.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:45.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:45.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:46.351 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:23:46.823 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:23:46.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:46.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:46.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:46.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:47.294 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:23:47.767 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:23:47.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:47.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:47.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:47.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:48.240 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:23:48.712 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:23:48.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:48.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:48.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:48.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:49.183 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:23:49.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD NOHANDOVER
2026-05-03 03:23:49.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:23:49.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:23:49.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:23:49.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:23:49.656 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:23:50.128 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:23:50.600 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:23:51.074 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:23:51.547 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:23:52.018 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:23:52.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:23:52.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:23:52.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:52.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:52.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:52.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:52.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:23:52.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:23:52.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:23:52.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:52.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:23:52.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:23:52.416 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:23:52.416 [WARNING] transceiver.py:257 (TRX2@172.18.37.20:5700/2) RX TRXD message (ver=1 fn=1822 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:52.416 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1822 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:52.416 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1822 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:52.416 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1822 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:52.416 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1822 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:52.416 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1822 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:52.416 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:52.416 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:23:57.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:23:57.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:23:57.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:23:57.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:23:57.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:57.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:23:57.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:23:57.429 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:23:57.429 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:57.430 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:23:57.430 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:23:57.433 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:23:57.433 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:23:57.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:23:57.434 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:57.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:23:57.435 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:23:57.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:23:57.435 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:23:57.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:57.437 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:23:57.437 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:23:57.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:23:57.437 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:57.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:23:57.438 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:23:57.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:23:57.438 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:23:57.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:57.440 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:23:57.440 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:23:57.440 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:23:57.440 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:23:57.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:23:57.440 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:23:57.441 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:23:57.441 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:23:57.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:57.444 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:23:57.444 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:23:57.444 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:23:57.445 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:57.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:57.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:57.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:57.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:23:57.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:23:57.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:23:57.449 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:23:57.928 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:23:57.971 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:23:57.973 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:23:57.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:23:57.975 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:23:58.400 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:23:58.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:58.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:58.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:58.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:58.875 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:23:59.346 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:23:59.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:23:59.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:23:59.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:23:59.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:23:59.821 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:24:00.293 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:24:00.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:00.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:00.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:00.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:00.765 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:24:01.240 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:24:01.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:01.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:01.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:01.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:01.712 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:24:02.186 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:24:02.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:02.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:02.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:02.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:02.658 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:24:03.130 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:24:03.605 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:24:04.077 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:24:04.551 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:24:05.023 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:24:05.495 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:24:05.970 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:24:06.442 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:24:06.916 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:24:07.388 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:24:07.860 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:24:07.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:07.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:07.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:07.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:07.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:07.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:07.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:24:07.990 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:24:07.990 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:24:07.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:07.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:07.990 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2274 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:24:07.990 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2274 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:24:07.990 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2274 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:24:07.990 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2274 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:24:07.990 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2274 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:24:07.990 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2274 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:24:07.990 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2274 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:24:12.996 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:24:12.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:24:12.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:12.996 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:12.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:12.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:13.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:13.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:24:13.004 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:13.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:24:13.004 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:24:13.009 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:24:13.009 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:24:13.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:24:13.010 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:13.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:13.010 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:24:13.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:24:13.011 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:24:13.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:13.012 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:24:13.013 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:24:13.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:24:13.013 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:13.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:13.013 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:24:13.014 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:24:13.014 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:24:13.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:13.015 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:24:13.015 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:24:13.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:24:13.016 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:13.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:13.016 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:24:13.016 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:24:13.016 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:24:13.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:13.019 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:24:13.019 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:24:13.019 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:24:13.020 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:24:13.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:13.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:13.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:13.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:24:13.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:13.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:13.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:24:13.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:24:13.021 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:24:13.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:18.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:24:18.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:24:18.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:18.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:18.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:18.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:18.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:18.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:24:18.043 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:18.043 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:24:18.043 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:24:18.045 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:24:18.045 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:24:18.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:24:18.045 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:18.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:18.046 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:24:18.046 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:24:18.046 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:24:18.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:18.047 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:24:18.047 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:24:18.047 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:24:18.047 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:18.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:18.047 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:24:18.048 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:24:18.048 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:24:18.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:18.049 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:24:18.049 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:24:18.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:24:18.049 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:18.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:18.049 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:24:18.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:24:18.049 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:24:18.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:18.051 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:24:18.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:24:18.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:24:18.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:24:18.051 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:24:18.052 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:24:18.052 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:24:18.052 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:18.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:18.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:18.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:18.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:18.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:18.056 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:24:18.535 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:24:18.578 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:24:18.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:24:18.581 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:24:18.584 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:24:18.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:24:18.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:24:18.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:24:18.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:24:18.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:24:18.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:24:18.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:24:18.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:24:19.006 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:24:19.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:19.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:19.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:19.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:19.478 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:24:19.949 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:24:20.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:20.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:20.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:20.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:20.422 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:24:20.895 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:24:21.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:21.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:21.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:21.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:21.367 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:24:21.838 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:24:22.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:22.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:22.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:22.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:22.311 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:24:22.783 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:24:23.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:23.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:23.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:23.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:23.255 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:24:23.726 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:24:24.197 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:24:24.668 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:24:25.141 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:24:25.613 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:24:26.085 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:24:26.556 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:24:26.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:24:26.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:24:26.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:26.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:26.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:26.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:26.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:26.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:26.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:24:26.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:24:26.633 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:24:26.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:26.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:31.644 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:24:31.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:24:31.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:31.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:31.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:31.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:31.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:31.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:24:31.654 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:31.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:24:31.654 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:24:31.657 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:24:31.658 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:24:31.658 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:24:31.658 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:31.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:31.659 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:24:31.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:24:31.659 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:24:31.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:31.660 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:24:31.660 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:24:31.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:24:31.661 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:31.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:31.661 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:24:31.661 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:24:31.661 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:24:31.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:31.663 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:24:31.663 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:24:31.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:24:31.663 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:31.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:31.663 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:24:31.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:24:31.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:24:31.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:24:31.666 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:24:31.666 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:24:31.666 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:31.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:31.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:24:31.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:31.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:31.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:31.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:31.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:31.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:31.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:31.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:31.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:31.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:31.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:31.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:31.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:31.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:31.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:31.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:31.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:31.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:31.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:31.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:31.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:31.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:31.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:31.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:31.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:31.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:31.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:24:31.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:24:31.668 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:24:36.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:24:36.675 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:24:36.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:36.675 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:36.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:36.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:36.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:36.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:24:36.684 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:36.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:24:36.685 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:24:36.687 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:24:36.687 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:24:36.688 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:24:36.688 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:36.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:36.688 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:24:36.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:24:36.689 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:24:36.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:36.690 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:24:36.690 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:24:36.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:24:36.690 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:36.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:36.690 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:24:36.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:24:36.690 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:24:36.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:36.692 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:24:36.692 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:24:36.692 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:24:36.692 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:36.692 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:36.692 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:24:36.692 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:24:36.692 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:24:36.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:36.694 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:24:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:24:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:24:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:24:36.694 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:24:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:24:36.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:24:36.695 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:24:36.695 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:24:36.695 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:36.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:36.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:36.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:36.699 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:24:37.178 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:24:37.223 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:24:37.225 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:24:37.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:24:37.227 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:24:37.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:24:37.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:24:37.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:24:37.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:24:37.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:24:37.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:24:37.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:24:37.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:24:37.650 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:24:37.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:37.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:37.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:37.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:38.121 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:24:38.595 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:24:38.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:38.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:38.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:38.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:39.067 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:24:39.539 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:24:39.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:39.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:39.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:39.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:40.010 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:24:40.483 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:24:40.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:40.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:40.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:40.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:40.956 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:24:41.428 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:24:41.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:41.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:41.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:41.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:41.899 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:24:42.372 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:24:42.844 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:24:43.317 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:24:43.790 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:24:44.262 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:24:44.734 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:24:45.205 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:24:45.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:24:45.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:24:45.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:45.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:45.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:45.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:45.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:45.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:45.274 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:24:45.274 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:24:45.274 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:24:45.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:45.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:50.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:24:50.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:24:50.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:50.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:50.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:50.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:50.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:50.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:24:50.290 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:50.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:24:50.290 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:24:50.292 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:24:50.292 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:24:50.292 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:24:50.293 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:50.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:50.293 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:24:50.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:24:50.293 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:24:50.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:50.296 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:24:50.296 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:24:50.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:24:50.296 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:50.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:50.297 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:24:50.297 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:24:50.297 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:24:50.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:50.300 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:24:50.300 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:24:50.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:24:50.301 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:50.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:50.301 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:24:50.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:24:50.301 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:24:50.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:50.306 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:24:50.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:24:50.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:24:50.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:24:50.306 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:24:50.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:24:50.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:24:50.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:24:50.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:24:50.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:50.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:50.307 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:24:50.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:50.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:50.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:50.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:50.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:50.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:50.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:50.307 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:24:50.307 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:24:50.307 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:24:50.307 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:24:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:50.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:24:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:50.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:50.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:50.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:50.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:50.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:24:50.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:24:50.310 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:24:55.317 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:24:55.317 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:24:55.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:55.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:55.317 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:55.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:55.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:24:55.325 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:24:55.326 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:55.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:24:55.326 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:24:55.330 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:24:55.330 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:24:55.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:24:55.330 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:55.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:24:55.331 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:24:55.331 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:24:55.331 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:24:55.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:55.335 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:24:55.335 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:24:55.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:24:55.335 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:55.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:24:55.335 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:24:55.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:24:55.335 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:24:55.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:55.338 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:24:55.339 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:24:55.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:24:55.339 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:24:55.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:24:55.339 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:24:55.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:24:55.339 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:24:55.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:55.343 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:24:55.343 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:24:55.343 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:24:55.343 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:24:55.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:24:55.348 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:24:55.827 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:24:55.872 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:24:55.874 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:24:55.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:24:55.876 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:24:55.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:24:55.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:24:55.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:24:55.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:24:55.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:24:55.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:24:55.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:24:55.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:24:56.300 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:24:56.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:56.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:56.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:56.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:56.771 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:24:57.244 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:24:57.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:57.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:57.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:57.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:57.717 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:24:58.189 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:24:58.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:58.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:58.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:58.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:58.660 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:24:59.133 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:24:59.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:24:59.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:24:59.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:24:59.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:24:59.605 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:25:00.077 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:25:00.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:00.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:00.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:00.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:00.548 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:25:01.022 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:25:01.494 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:25:01.966 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:25:02.437 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:25:02.911 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:25:03.380 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:25:03.854 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:25:03.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:25:03.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:25:03.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:03.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:03.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:03.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:03.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:03.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:03.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:03.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:03.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:25:03.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:25:03.930 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:25:08.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:25:08.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:25:08.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:08.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:08.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:08.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:08.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:08.948 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:25:08.948 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:08.948 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:25:08.949 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:25:08.950 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:25:08.951 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:25:08.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:25:08.951 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:08.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:08.952 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:25:08.952 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:25:08.952 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:25:08.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:08.953 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:25:08.953 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:25:08.953 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:25:08.953 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:08.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:08.953 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:25:08.953 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:25:08.953 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:25:08.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:08.955 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:25:08.955 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:25:08.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:25:08.955 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:08.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:08.955 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:25:08.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:25:08.955 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:25:08.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:08.957 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:25:08.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:25:08.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:25:08.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:25:08.958 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:25:08.958 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:25:08.958 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:08.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:25:08.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:25:08.959 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:25:08.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:13.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:25:13.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:25:13.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:13.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:13.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:13.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:13.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:13.976 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:25:13.976 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:13.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:25:13.977 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:25:13.979 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:25:13.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:25:13.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:25:13.980 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:13.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:13.980 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:25:13.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:25:13.981 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:25:13.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:13.982 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:25:13.982 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:25:13.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:25:13.982 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:13.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:13.982 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:25:13.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:25:13.982 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:25:13.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:13.984 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:25:13.984 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:25:13.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:25:13.984 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:13.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:13.984 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:25:13.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:25:13.984 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:25:13.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:25:13.987 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:25:13.987 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:25:13.987 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:13.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:13.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:13.992 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:25:14.470 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:25:14.515 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:25:14.517 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:25:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:25:14.520 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:25:14.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:25:14.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:25:14.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:25:14.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:25:14.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:25:14.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:25:14.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:25:14.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:25:14.942 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:25:14.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:14.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:14.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:14.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:15.413 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:25:15.887 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:25:15.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:15.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:15.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:15.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:16.359 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:25:16.831 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:25:16.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:16.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:16.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:16.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:17.302 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:25:17.776 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:25:17.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:17.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:17.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:17.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:18.248 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:25:18.720 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:25:18.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:18.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:18.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:18.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:19.191 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:25:19.665 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:25:20.137 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:25:20.609 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:25:21.080 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:25:21.553 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:25:22.026 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:25:22.498 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:25:22.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:25:22.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:25:22.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:22.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:22.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:22.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:22.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:22.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:22.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:25:22.571 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:25:22.571 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:25:22.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:22.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:22.572 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:25:22.572 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:25:22.572 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:25:22.572 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:25:22.572 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:25:22.572 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:25:22.572 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:25:27.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:25:27.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:25:27.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:27.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:27.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:27.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:27.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:27.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:25:27.586 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:27.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:25:27.586 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:25:27.589 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:25:27.589 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:25:27.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:25:27.590 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:27.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:27.590 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:25:27.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:25:27.591 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:25:27.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:27.592 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:25:27.592 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:25:27.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:25:27.592 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:27.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:27.592 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:25:27.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:25:27.592 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:25:27.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:27.594 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:25:27.594 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:25:27.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:25:27.594 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:27.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:27.594 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:25:27.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:25:27.594 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:25:27.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:25:27.597 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:25:27.597 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:25:27.597 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:27.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:27.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:27.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:27.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:27.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:27.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:27.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:27.599 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:25:27.599 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:25:27.599 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:25:27.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:32.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:25:32.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:25:32.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:32.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:32.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:32.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:32.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:32.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:25:32.616 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:32.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:25:32.617 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:25:32.619 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:25:32.619 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:25:32.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:25:32.620 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:32.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:32.620 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:25:32.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:25:32.621 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:25:32.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:32.622 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:25:32.622 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:25:32.622 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:25:32.622 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:32.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:32.622 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:25:32.622 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:25:32.622 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:25:32.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:32.624 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:25:32.624 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:25:32.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:25:32.624 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:32.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:32.624 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:25:32.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:25:32.624 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:25:32.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:25:32.627 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:25:32.627 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:25:32.627 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:32.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:32.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:32.632 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:25:33.111 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:25:33.160 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:25:33.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:25:33.164 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:25:33.166 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:25:33.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:25:33.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:25:33.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:25:33.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:25:33.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:25:33.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:25:33.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:25:33.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:25:33.583 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:25:33.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:33.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:33.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:33.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:34.054 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:25:34.527 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:25:34.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:34.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:34.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:34.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:35.000 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:25:35.472 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:25:35.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:35.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:35.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:35.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:35.943 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:25:36.416 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:25:36.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:36.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:36.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:36.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:36.888 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:25:37.360 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:25:37.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:37.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:37.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:37.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:37.831 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:25:38.305 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:25:38.777 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:25:39.249 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:25:39.723 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:25:40.195 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:25:40.667 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:25:41.141 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:25:41.613 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:25:42.086 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:25:42.556 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:25:43.030 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:25:43.502 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:25:43.974 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:25:44.445 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:25:44.919 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:25:45.391 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:25:45.863 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:25:46.334 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:25:46.807 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:25:47.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:25:47.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:25:47.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:47.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:47.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:47.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:47.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:47.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:47.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:47.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:47.213 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:25:47.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:25:47.213 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:25:52.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:25:52.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:25:52.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:52.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:52.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:52.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:52.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:52.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:25:52.224 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:52.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:25:52.224 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:25:52.226 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:25:52.226 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:25:52.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:25:52.226 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:52.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:52.227 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:25:52.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:25:52.227 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:25:52.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:52.231 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:25:52.231 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:25:52.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:25:52.231 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:52.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:52.231 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:25:52.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:25:52.231 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:25:52.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:52.234 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:25:52.234 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:25:52.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:25:52.235 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:52.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:52.235 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:25:52.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:25:52.235 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:25:52.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:52.239 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:25:52.239 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:25:52.239 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:25:52.240 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:25:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:52.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:25:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:52.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:52.241 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:25:52.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:25:52.241 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:25:52.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:57.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:25:57.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:25:57.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:57.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:57.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:57.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:57.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:25:57.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:25:57.260 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:57.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:25:57.260 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:25:57.266 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:25:57.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:25:57.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:25:57.266 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:57.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:25:57.267 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:25:57.267 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:25:57.267 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:25:57.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:57.271 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:25:57.271 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:25:57.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:25:57.271 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:57.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:25:57.272 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:25:57.272 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:25:57.272 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:25:57.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:57.275 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:25:57.276 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:25:57.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:25:57.276 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:25:57.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:25:57.276 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:25:57.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:25:57.276 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:25:57.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:57.280 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:25:57.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:25:57.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:25:57.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:25:57.280 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:25:57.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:25:57.281 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:25:57.281 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:25:57.281 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:57.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:57.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:25:57.286 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:25:57.765 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:25:57.809 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:25:57.812 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:25:57.814 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:25:57.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:25:57.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:25:57.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:25:57.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:25:57.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:25:57.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:25:57.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:25:57.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:25:57.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:25:58.237 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:25:58.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:58.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:58.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:58.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:58.708 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:25:59.179 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:25:59.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:25:59.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:25:59.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:25:59.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:25:59.652 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:26:00.124 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:26:00.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:00.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:00.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:00.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:00.597 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:26:01.068 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:26:01.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:01.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:01.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:01.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:01.541 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:26:02.013 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:26:02.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:02.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:02.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:02.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:02.485 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:26:02.956 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:26:03.430 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:26:03.902 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:26:04.374 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:26:04.845 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:26:05.318 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:26:05.791 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:26:05.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:26:05.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:26:05.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:05.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:05.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:05.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:05.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:05.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:05.870 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:26:05.870 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:26:05.870 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:26:05.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:05.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:05.871 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:26:05.871 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:26:05.871 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:26:05.871 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:26:05.871 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:26:05.872 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:26:05.872 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:26:10.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:26:10.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:26:10.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:10.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:10.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:10.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:10.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:10.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:26:10.883 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:10.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:26:10.883 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:26:10.887 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:26:10.888 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:26:10.888 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:26:10.888 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:10.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:10.888 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:26:10.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:26:10.889 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:26:10.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:10.892 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:26:10.893 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:26:10.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:26:10.893 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:10.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:10.893 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:26:10.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:26:10.893 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:26:10.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:10.897 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:26:10.897 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:26:10.897 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:26:10.897 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:10.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:10.897 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:26:10.897 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:26:10.897 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:26:10.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:10.903 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:26:10.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:26:10.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:26:10.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:26:10.903 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:26:10.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:26:10.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:26:10.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:10.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:26:10.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:26:10.903 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:26:10.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:10.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:10.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:10.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:10.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:10.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:10.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:10.904 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:26:10.904 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:26:10.904 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:26:10.904 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:26:10.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:10.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:10.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:10.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:26:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:10.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:10.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:10.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:10.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:10.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:10.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:26:10.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:26:10.907 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:26:10.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:15.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:26:15.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:26:15.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:15.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:15.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:15.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:15.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:15.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:26:15.923 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:15.924 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:26:15.924 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:26:15.927 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:26:15.927 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:26:15.927 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:26:15.927 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:15.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:15.928 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:26:15.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:26:15.928 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:26:15.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:15.930 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:26:15.930 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:26:15.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:26:15.930 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:15.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:15.931 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:26:15.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:26:15.931 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:26:15.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:15.933 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:26:15.933 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:26:15.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:26:15.933 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:15.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:15.933 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:26:15.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:26:15.933 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:26:15.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:15.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:26:15.937 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:26:15.937 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:26:15.937 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:15.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:15.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:15.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:15.941 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:26:16.419 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:26:16.469 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:26:16.469 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:26:16.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:26:16.470 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:26:16.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:26:16.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:26:16.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:26:16.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:26:16.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:26:16.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:26:16.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:26:16.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:26:16.891 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:26:16.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:16.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:16.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:16.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:17.362 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:26:17.835 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:26:17.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:17.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:17.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:17.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:18.308 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:26:18.780 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:26:18.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:18.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:18.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:18.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:19.251 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:26:19.735 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:26:19.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:19.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:19.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:19.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:20.207 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:26:20.678 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:26:20.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:20.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:20.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:20.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:21.149 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:26:21.623 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:26:22.095 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:26:22.567 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:26:23.038 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:26:23.509 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:26:23.982 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:26:24.454 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:26:24.926 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:26:25.397 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:26:25.870 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:26:26.343 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:26:26.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:26:26.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:26:26.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:26.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:26.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:26.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:26.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:26.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:26.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:26.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:26:26.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:26:26.526 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:26:26.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:31.529 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:26:31.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:26:31.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:31.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:31.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:31.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:31.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:31.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:26:31.537 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:31.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:26:31.538 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:26:31.542 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:26:31.542 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:26:31.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:26:31.542 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:31.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:31.542 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:26:31.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:26:31.543 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:26:31.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:31.546 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:26:31.546 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:26:31.546 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:26:31.546 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:31.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:31.547 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:26:31.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:26:31.547 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:26:31.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:31.549 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:26:31.550 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:26:31.550 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:26:31.550 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:31.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:31.550 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:26:31.550 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:26:31.550 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:26:31.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:26:31.554 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:26:31.554 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:26:31.554 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:26:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:31.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:26:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:31.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:26:31.556 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:26:31.556 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:26:36.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:26:36.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:26:36.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:36.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:36.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:36.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:36.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:36.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:26:36.575 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:36.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:26:36.575 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:26:36.580 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:26:36.581 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:26:36.581 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:26:36.581 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:36.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:36.581 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:26:36.582 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:26:36.582 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:26:36.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:36.585 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:26:36.586 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:26:36.586 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:26:36.586 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:36.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:36.586 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:26:36.586 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:26:36.586 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:26:36.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:36.589 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:26:36.589 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:26:36.590 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:26:36.590 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:36.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:36.590 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:26:36.590 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:26:36.590 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:26:36.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:36.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:26:36.595 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:26:36.595 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:26:36.595 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:36.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:36.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:36.599 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:26:37.077 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:26:37.119 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:26:37.121 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:26:37.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:26:37.123 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:26:37.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:26:37.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:26:37.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:26:37.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:26:37.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:26:37.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:26:37.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:26:37.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:26:37.549 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:26:37.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:37.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:37.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:37.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:38.020 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:26:38.491 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:26:38.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:38.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:38.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:38.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:38.962 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:26:39.435 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:26:39.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:39.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:39.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:39.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:39.908 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:26:40.380 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:26:40.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:40.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:40.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:40.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:40.850 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:26:41.321 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:26:41.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:41.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:41.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:41.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:41.795 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:26:42.267 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:26:42.739 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:26:43.210 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:26:43.681 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:26:44.155 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:26:44.627 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:26:45.099 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:26:45.572 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:26:46.045 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:26:46.517 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:26:46.988 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:26:47.461 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:26:47.934 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:26:48.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:26:48.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:26:48.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:48.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:48.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:48.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:48.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:48.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:48.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:26:48.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:26:48.179 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:26:48.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:48.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:48.179 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2503 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:26:48.179 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2503 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:26:48.179 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2503 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:26:48.179 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2503 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:26:48.179 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2503 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:26:48.179 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2503 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:26:48.179 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2503 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:26:53.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:26:53.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:26:53.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:53.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:53.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:53.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:53.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:53.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:26:53.195 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:53.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:26:53.196 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:26:53.201 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:26:53.202 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:26:53.202 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:26:53.202 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:53.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:53.203 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:26:53.203 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:26:53.203 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:26:53.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:53.207 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:26:53.207 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:26:53.207 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:26:53.207 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:53.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:53.207 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:26:53.208 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:26:53.208 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:26:53.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:53.211 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:26:53.211 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:26:53.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:26:53.211 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:53.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:53.211 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:26:53.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:26:53.211 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:26:53.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:53.215 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:26:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:26:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:26:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:26:53.215 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:26:53.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:26:53.216 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:26:53.216 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:53.216 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:53.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:53.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:26:53.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:53.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:53.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:26:53.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:26:53.218 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:26:53.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:58.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:26:58.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:26:58.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:58.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:58.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:58.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:58.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:26:58.237 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:26:58.237 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:58.237 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:26:58.238 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:26:58.241 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:26:58.242 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:26:58.242 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:26:58.242 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:58.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:26:58.243 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:26:58.243 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:26:58.243 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:26:58.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:58.245 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:26:58.245 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:26:58.245 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:26:58.245 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:58.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:26:58.245 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:26:58.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:26:58.246 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:26:58.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:58.248 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:26:58.248 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:26:58.248 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:26:58.248 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:26:58.248 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:26:58.248 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:26:58.248 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:26:58.248 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:26:58.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:58.251 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:26:58.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:26:58.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:26:58.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:26:58.252 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:26:58.252 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:26:58.252 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:58.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:26:58.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:26:58.257 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:26:58.734 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:26:58.778 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:26:58.780 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:26:58.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:26:58.781 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:26:58.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:26:58.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:26:58.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:26:58.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:26:58.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:26:58.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:26:58.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:26:58.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:26:59.206 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:26:59.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:26:59.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:26:59.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:26:59.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:26:59.678 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:27:00.151 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:27:00.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:00.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:00.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:00.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:00.623 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:27:01.095 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:27:01.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:01.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:01.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:01.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:01.569 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:27:02.041 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:27:02.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:02.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:02.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:02.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:02.513 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:27:02.987 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:27:03.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:03.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:03.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:03.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:03.459 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:27:03.931 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:27:04.402 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:27:04.873 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:27:05.344 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:27:05.815 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:27:06.288 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:27:06.760 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:27:07.232 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:27:07.703 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:27:08.177 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:27:08.649 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:27:09.122 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:27:09.595 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:27:10.067 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:27:10.540 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:27:11.013 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:27:11.485 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:27:11.957 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:27:12.428 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:27:12.901 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:27:13.374 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:27:13.846 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:27:14.317 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:27:14.790 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:27:15.263 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:27:15.735 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:27:16.206 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:27:16.676 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:27:17.147 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:27:17.621 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:27:18.093 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:27:18.565 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:27:18.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:27:18.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:27:18.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:18.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:18.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:18.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:18.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:27:18.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:27:18.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:27:18.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:27:18.838 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:27:18.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:27:18.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:27:23.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:27:23.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:27:23.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:27:23.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:27:23.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:27:23.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:27:23.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:27:23.851 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:27:23.851 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:23.851 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:27:23.851 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:27:23.854 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:27:23.854 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:27:23.854 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:27:23.854 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:23.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:27:23.854 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:27:23.854 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:27:23.854 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:27:23.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:23.857 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:27:23.857 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:27:23.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:27:23.857 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:23.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:27:23.857 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:27:23.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:27:23.857 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:27:23.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:23.859 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:27:23.859 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:27:23.859 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:27:23.859 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:23.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:27:23.859 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:27:23.860 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:27:23.860 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:27:23.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:23.862 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:27:23.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:27:23.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:27:23.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:27:23.862 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:27:23.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:27:23.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:27:23.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:27:23.863 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:27:23.863 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:27:23.863 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:23.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:27:23.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:27:23.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:27:23.864 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:27:28.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:27:28.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:27:28.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:27:28.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:27:28.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:27:28.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:27:28.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:27:28.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:27:28.880 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:28.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:27:28.880 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:27:28.882 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:27:28.883 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:27:28.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:27:28.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:28.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:27:28.883 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:27:28.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:27:28.884 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:27:28.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:28.885 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:27:28.885 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:27:28.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:27:28.885 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:28.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:27:28.885 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:27:28.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:27:28.885 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:27:28.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:28.887 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:27:28.887 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:27:28.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:27:28.887 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:28.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:27:28.887 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:27:28.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:27:28.887 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:27:28.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:27:28.890 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:27:28.890 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:27:28.890 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:28.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:28.895 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:27:29.372 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:27:29.418 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:27:29.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:27:29.421 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:27:29.423 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:27:29.844 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:27:29.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:29.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:29.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:29.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:30.315 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:27:30.790 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:27:30.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:30.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:30.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:30.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:31.267 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:27:31.739 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:27:31.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:31.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:31.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:31.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:32.213 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:27:32.685 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:27:32.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:32.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:32.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:32.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:33.156 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:27:33.630 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:27:33.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:33.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:33.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:33.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:34.103 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:27:34.574 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:27:35.050 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:27:35.522 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:27:35.997 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:27:36.469 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:27:36.944 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:27:37.416 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:27:37.891 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:27:38.365 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:27:38.838 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:27:39.310 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:27:39.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:39.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:39.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:39.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:39.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:27:39.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:27:39.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:27:39.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:27:39.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:27:39.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:27:39.433 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:27:44.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:27:44.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:27:44.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:27:44.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:27:44.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:27:44.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:27:44.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:27:44.448 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:27:44.448 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:44.448 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:27:44.448 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:27:44.451 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:27:44.451 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:27:44.452 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:27:44.452 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:44.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:27:44.452 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:27:44.453 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:27:44.453 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:27:44.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:44.454 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:27:44.454 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:27:44.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:27:44.454 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:44.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:27:44.454 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:27:44.455 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:27:44.455 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:27:44.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:44.456 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:27:44.457 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:27:44.457 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:27:44.457 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:44.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:27:44.457 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:27:44.457 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:27:44.457 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:27:44.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:44.459 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:27:44.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:27:44.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:27:44.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:27:44.459 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:27:44.460 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:27:44.460 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:27:44.460 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:44.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:27:44.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:27:44.461 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:27:44.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:27:49.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:27:49.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:27:49.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:27:49.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:27:49.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:27:49.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:27:49.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:27:49.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:27:49.477 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:49.478 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:27:49.478 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:27:49.482 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:27:49.482 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:27:49.483 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:27:49.483 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:49.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:27:49.484 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:27:49.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:27:49.484 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:27:49.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:49.486 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:27:49.486 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:27:49.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:27:49.486 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:49.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:27:49.487 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:27:49.487 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:27:49.487 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:27:49.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:49.489 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:27:49.489 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:27:49.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:27:49.490 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:27:49.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:27:49.490 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:27:49.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:27:49.490 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:27:49.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:49.493 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:27:49.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:27:49.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:27:49.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:27:49.493 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:27:49.494 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:27:49.494 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:27:49.494 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:27:49.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:27:49.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:27:49.499 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:27:49.977 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:27:50.022 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:27:50.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:27:50.026 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:27:50.029 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:27:50.449 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:27:50.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:50.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:50.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:50.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:50.921 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:27:51.392 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:27:51.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:51.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:51.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:51.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:51.866 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:27:52.338 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:27:52.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:52.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:52.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:52.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:52.808 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:27:53.279 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:27:53.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:53.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:53.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:53.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:53.755 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:27:54.226 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:27:54.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:27:54.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:27:54.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:27:54.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:27:54.701 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:27:55.173 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:27:55.647 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:27:56.119 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:27:56.591 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:27:57.064 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:27:57.537 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:27:58.009 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:27:58.484 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:27:58.956 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:27:59.432 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:27:59.917 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:28:00.389 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:28:00.865 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:28:01.337 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:28:01.812 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:28:02.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:02.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:02.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:02.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:02.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:02.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:02.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:02.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:02.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:28:02.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:28:02.045 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:28:07.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:28:07.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:28:07.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:07.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:07.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:07.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:07.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:07.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:28:07.054 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:07.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:28:07.054 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:28:07.055 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:28:07.055 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:28:07.056 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:28:07.056 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:07.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:07.056 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:28:07.056 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:28:07.056 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:28:07.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:07.057 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:28:07.057 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:28:07.057 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:28:07.057 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:07.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:07.057 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:28:07.057 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:28:07.057 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:28:07.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:07.058 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:28:07.058 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:28:07.058 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:28:07.058 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:07.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:07.058 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:28:07.058 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:28:07.058 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:28:07.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:07.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:28:07.061 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:28:07.061 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:28:07.061 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:07.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:07.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:07.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:07.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:07.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:07.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:28:07.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:28:07.062 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:28:12.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:28:12.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:28:12.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:12.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:12.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:12.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:12.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:12.071 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:28:12.071 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:12.071 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:28:12.071 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:28:12.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:28:12.072 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:28:12.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:28:12.072 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:12.072 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:28:12.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:12.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:28:12.073 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:28:12.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:12.075 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:28:12.075 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:28:12.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:28:12.075 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:12.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:12.075 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:28:12.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:28:12.075 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:28:12.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:12.076 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:28:12.077 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:28:12.077 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:28:12.077 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:12.077 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:12.077 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:28:12.077 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:28:12.077 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:28:12.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:12.079 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:28:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:28:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:28:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:28:12.079 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:28:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:28:12.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:28:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:28:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:28:12.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:28:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:12.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:28:12.080 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:28:12.080 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:28:12.080 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:12.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:12.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:12.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:12.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:12.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:12.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:12.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:12.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:12.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:12.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:12.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:12.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:12.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:12.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:12.084 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:28:12.561 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:28:12.604 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:28:12.605 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:28:12.607 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:28:12.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:28:12.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:28:12.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:28:12.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:28:12.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:28:12.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:28:12.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:28:12.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:28:12.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:28:12.651 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:28:12.651 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 03:28:12.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:28:12.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:28:13.033 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:28:13.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:13.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:13.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:13.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:13.505 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:28:13.979 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:28:14.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:14.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:14.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:14.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:14.451 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:28:14.925 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:28:15.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:15.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:15.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:15.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:15.397 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:28:15.869 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:28:16.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:16.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:16.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:16.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:16.341 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:28:16.815 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:28:17.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:17.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:17.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:17.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:17.286 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:28:17.758 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:28:18.232 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:28:18.703 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:28:19.175 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:28:19.648 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:28:20.121 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:28:20.594 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:28:20.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:28:20.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:28:20.656 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:28:20.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:20.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:20.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:20.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:20.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:20.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:20.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:28:20.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:28:20.663 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:28:20.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:20.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:25.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:28:25.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:28:25.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:25.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:25.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:25.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:25.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:25.676 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:28:25.676 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:25.676 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:28:25.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:28:25.679 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:28:25.679 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:28:25.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:28:25.680 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:25.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:25.681 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:28:25.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:28:25.681 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:28:25.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:25.682 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:28:25.683 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:28:25.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:28:25.683 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:25.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:25.683 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:28:25.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:28:25.683 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:28:25.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:25.686 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:28:25.686 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:28:25.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:28:25.686 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:25.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:25.686 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:28:25.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:28:25.686 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:28:25.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:25.690 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:28:25.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:28:25.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:28:25.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:28:25.690 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:28:25.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:28:25.691 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:28:25.691 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:28:25.691 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:25.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:25.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:28:25.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:25.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:25.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:25.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:28:25.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:28:25.693 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:28:30.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:28:30.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:28:30.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:30.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:30.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:30.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:30.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:30.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:28:30.707 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:30.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:28:30.708 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:28:30.710 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:28:30.711 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:28:30.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:28:30.711 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:30.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:30.712 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:28:30.712 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:28:30.712 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:28:30.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:30.714 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:28:30.714 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:28:30.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:28:30.714 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:30.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:30.715 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:28:30.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:28:30.715 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:28:30.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:30.717 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:28:30.717 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:28:30.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:28:30.717 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:30.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:30.717 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:28:30.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:28:30.717 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:28:30.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:30.721 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:28:30.721 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:28:30.721 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:28:30.721 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:30.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:30.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:30.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:30.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:30.726 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:28:31.204 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:28:31.252 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:28:31.254 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:28:31.255 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:28:31.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:28:31.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:28:31.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:28:31.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:28:31.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:28:31.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:28:31.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:28:31.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:28:31.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:28:31.293 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:28:31.293 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 03:28:31.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:28:31.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:28:31.675 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:28:31.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:31.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:31.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:31.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:32.147 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:28:32.621 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:28:32.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:32.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:32.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:32.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:33.092 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:28:33.564 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:28:33.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:33.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:33.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:33.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:34.036 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:28:34.510 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:28:34.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:34.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:34.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:34.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:34.983 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:28:35.456 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:28:35.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:35.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:35.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:35.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:35.928 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:28:36.399 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:28:36.872 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:28:37.345 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:28:37.818 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:28:38.291 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:28:38.764 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:28:39.236 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:28:39.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:28:39.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:28:39.298 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:28:39.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:39.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:39.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:39.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:39.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:39.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:39.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:28:39.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:28:39.301 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:28:39.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:39.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:44.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:28:44.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:28:44.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:44.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:44.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:44.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:44.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:44.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:28:44.319 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:44.319 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:28:44.319 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:28:44.323 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:28:44.323 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:28:44.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:28:44.324 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:44.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:44.324 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:28:44.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:28:44.325 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:28:44.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:44.326 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:28:44.326 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:28:44.326 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:28:44.326 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:44.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:44.327 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:28:44.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:28:44.327 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:28:44.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:44.329 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:28:44.329 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:28:44.329 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:28:44.329 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:44.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:44.329 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:28:44.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:28:44.330 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:28:44.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:44.332 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:28:44.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:28:44.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:28:44.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:28:44.332 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:28:44.333 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:28:44.333 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:44.333 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:44.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:44.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:28:44.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:28:44.334 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:28:44.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:44.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:49.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:28:49.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:28:49.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:49.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:49.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:49.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:49.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:49.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:28:49.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:49.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:28:49.353 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:28:49.356 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:28:49.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:28:49.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:28:49.356 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:49.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:49.357 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:28:49.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:28:49.357 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:28:49.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:49.358 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:28:49.359 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:28:49.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:28:49.359 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:49.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:49.359 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:28:49.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:28:49.359 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:28:49.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:49.361 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:28:49.361 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:28:49.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:28:49.361 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:28:49.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:28:49.361 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:28:49.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:28:49.361 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:28:49.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:28:49.364 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:28:49.364 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:28:49.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:49.364 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:49.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:28:49.369 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:28:49.848 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:28:49.892 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:28:49.894 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:28:49.896 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:28:49.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:28:49.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:28:49.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:28:49.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:28:49.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:28:49.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:28:49.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:28:49.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:28:49.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:28:49.938 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:28:49.938 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 03:28:49.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:28:49.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:28:50.320 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:28:50.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:50.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:50.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:50.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:50.792 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:28:51.266 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:28:51.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:51.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:51.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:51.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:51.737 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:28:52.210 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:28:52.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:52.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:52.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:52.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:52.683 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:28:53.155 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:28:53.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:53.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:53.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:53.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:53.628 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:28:54.101 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:28:54.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:54.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:54.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:54.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:54.573 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:28:55.045 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:28:55.518 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:28:55.990 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:28:56.462 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:28:56.935 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:28:57.408 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:28:57.880 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:28:57.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:28:57.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:28:57.943 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:28:57.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:28:57.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:28:57.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:28:57.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:28:57.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:28:57.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:28:57.947 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:28:57.947 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:28:57.947 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:28:57.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:28:57.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:02.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:29:02.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:29:02.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:02.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:02.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:02.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:02.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:02.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:29:02.963 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:02.964 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:29:02.964 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:29:02.967 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:29:02.967 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:29:02.968 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:29:02.968 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:02.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:02.968 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:29:02.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:29:02.969 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:29:02.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:02.970 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:29:02.970 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:29:02.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:29:02.971 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:02.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:02.971 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:29:02.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:29:02.971 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:29:02.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:02.973 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:29:02.973 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:29:02.973 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:29:02.973 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:02.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:02.973 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:29:02.973 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:29:02.973 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:29:02.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:02.976 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:29:02.976 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:29:02.976 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:29:02.977 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:29:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:02.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:29:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:29:02.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:29:02.978 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:29:02.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:07.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:29:07.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:29:07.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:07.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:07.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:07.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:07.993 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:07.994 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:29:07.995 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:07.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:29:07.995 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:29:07.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:29:07.998 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:29:07.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:29:07.999 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:07.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:07.999 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:29:08.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:29:08.000 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:29:08.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:08.001 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:29:08.001 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:29:08.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:29:08.001 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:08.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:08.001 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:29:08.002 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:29:08.002 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:29:08.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:08.004 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:29:08.004 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:29:08.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:29:08.004 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:08.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:08.004 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:29:08.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:29:08.004 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:29:08.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:29:08.007 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:29:08.007 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:29:08.007 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:08.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:08.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:08.012 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:29:08.490 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:29:08.532 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:29:08.534 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:29:08.536 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:29:08.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:29:08.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:29:08.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:29:08.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:29:08.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:29:08.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:29:08.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:29:08.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:29:08.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:29:08.580 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:29:08.580 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 03:29:08.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:29:08.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:29:08.961 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:29:09.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:09.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:09.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:09.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:09.433 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:29:09.905 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:29:10.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:10.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:10.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:10.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:10.378 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:29:10.851 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:29:11.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:11.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:11.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:11.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:11.324 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:29:11.797 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:29:12.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:12.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:12.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:12.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:12.269 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:29:12.742 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:29:13.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:13.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:13.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:13.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:13.214 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:29:13.687 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:29:14.160 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:29:14.632 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:29:15.104 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:29:15.576 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:29:16.050 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:29:16.522 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:29:16.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:29:16.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:29:16.585 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:29:16.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:16.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:16.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:16.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:16.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:16.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:16.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:16.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:16.594 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:29:16.594 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:29:16.594 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:29:16.595 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:29:16.595 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:29:16.595 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:29:16.595 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:29:16.595 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:29:16.595 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:29:16.595 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:29:16.596 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:29:16.596 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:29:16.596 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:29:16.596 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:29:21.596 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:29:21.596 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:29:21.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:21.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:21.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:21.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:21.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:21.599 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:29:21.599 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:21.599 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:29:21.599 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:29:21.600 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:29:21.600 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:29:21.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:29:21.601 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:21.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:21.601 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:29:21.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:29:21.601 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:29:21.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:21.602 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:29:21.602 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:29:21.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:29:21.602 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:21.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:21.602 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:29:21.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:29:21.602 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:29:21.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:21.603 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:29:21.603 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:29:21.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:29:21.603 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:21.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:21.603 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:29:21.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:29:21.604 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:29:21.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:21.605 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:29:21.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:29:21.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:29:21.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:29:21.605 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:29:21.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:29:21.606 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:29:21.606 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:29:21.606 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:21.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:21.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:29:21.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:29:21.607 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:29:26.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:29:26.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:29:26.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:26.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:26.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:26.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:26.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:26.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:29:26.617 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:26.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:29:26.617 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:29:26.618 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:29:26.618 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:29:26.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:29:26.618 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:26.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:26.618 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:29:26.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:29:26.619 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:29:26.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:26.619 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:29:26.619 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:29:26.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:29:26.619 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:26.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:26.619 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:29:26.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:29:26.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:29:26.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:26.621 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:29:26.621 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:29:26.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:29:26.621 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:26.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:26.621 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:29:26.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:29:26.622 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:29:26.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:26.624 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:29:26.624 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:29:26.624 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:29:26.625 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:26.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:26.629 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:29:27.107 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:29:27.141 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:29:27.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:29:27.142 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:29:27.143 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:29:27.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:29:27.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:29:27.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:29:27.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:29:27.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:29:27.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:29:27.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:29:27.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:29:27.150 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:29:27.150 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 03:29:27.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:29:27.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:29:27.579 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:29:27.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:27.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:27.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:27.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:28.051 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:29:28.525 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:29:28.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:28.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:28.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:28.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:28.997 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:29:29.471 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:29:29.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:29.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:29.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:29.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:29.943 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:29:30.415 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:29:30.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:30.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:30.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:30.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:30.887 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:29:31.361 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:29:31.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:31.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:31.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:31.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:31.834 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:29:32.307 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:29:32.779 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:29:33.251 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:29:33.724 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:29:34.196 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:29:34.668 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:29:35.141 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:29:35.614 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:29:36.086 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:29:36.557 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:29:37.031 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:29:37.503 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:29:37.975 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:29:38.448 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:29:38.921 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:29:39.393 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:29:39.866 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:29:40.338 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:29:40.810 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:29:41.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:29:41.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:29:41.157 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:29:41.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:41.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:41.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:41.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:41.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:41.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:41.159 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:29:41.159 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:29:41.159 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:29:41.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:41.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:46.169 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:29:46.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:29:46.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:46.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:46.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:46.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:46.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:46.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:29:46.185 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:46.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:29:46.186 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:29:46.188 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:29:46.188 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:29:46.188 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:29:46.188 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:46.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:46.189 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:29:46.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:29:46.189 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:29:46.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:46.190 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:29:46.190 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:29:46.190 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:29:46.190 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:46.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:46.191 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:29:46.191 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:29:46.191 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:29:46.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:46.192 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:29:46.192 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:29:46.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:29:46.192 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:46.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:46.192 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:29:46.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:29:46.192 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:29:46.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:46.194 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:29:46.194 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:29:46.194 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:29:46.195 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:46.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:46.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:46.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:46.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:46.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:46.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:46.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:46.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:46.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:46.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:46.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:46.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:46.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:29:46.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:29:46.196 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:29:51.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:29:51.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:29:51.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:51.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:51.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:51.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:51.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:51.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:29:51.214 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:51.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:29:51.214 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:29:51.217 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:29:51.217 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:29:51.218 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:29:51.218 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:51.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:51.218 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:29:51.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:29:51.219 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:29:51.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:51.220 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:29:51.220 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:29:51.220 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:29:51.220 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:51.220 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:51.220 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:29:51.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:29:51.221 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:29:51.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:51.222 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:29:51.223 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:29:51.223 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:29:51.223 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:29:51.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:29:51.223 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:29:51.223 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:29:51.223 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:29:51.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:29:51.226 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:29:51.226 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:29:51.226 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:51.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:29:51.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:29:51.231 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:29:51.710 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:29:51.754 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:29:51.757 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:29:51.758 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:29:51.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:29:51.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:29:51.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:29:51.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:29:51.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:29:51.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:29:51.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:29:51.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:29:51.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:29:51.799 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:29:51.799 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 03:29:51.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:29:51.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:29:52.182 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:29:52.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:52.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:52.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:52.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:52.654 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:29:53.128 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:29:53.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:53.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:53.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:53.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:53.599 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:29:54.071 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:29:54.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:54.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:54.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:54.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:54.544 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:29:55.017 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:29:55.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:55.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:55.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:55.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:55.489 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:29:55.963 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:29:56.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:56.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:56.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:56.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:56.435 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:29:56.907 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:29:57.379 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:29:57.852 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:29:58.324 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:29:58.796 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:29:59.269 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:29:59.741 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:29:59.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:29:59.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:29:59.804 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:29:59.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:29:59.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:29:59.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:29:59.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:29:59.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:29:59.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:29:59.808 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:29:59.808 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:29:59.808 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:29:59.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:29:59.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:04.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:30:04.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:30:04.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:04.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:04.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:04.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:04.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:04.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:30:04.814 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:04.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:30:04.814 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:30:04.815 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:30:04.815 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:30:04.815 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:30:04.815 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:04.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:04.815 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:30:04.815 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:30:04.816 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:30:04.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:04.816 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:30:04.816 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:30:04.816 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:30:04.816 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:04.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:04.816 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:30:04.816 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:30:04.816 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:30:04.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:04.817 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:30:04.817 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:30:04.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:30:04.817 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:04.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:04.817 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:30:04.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:30:04.817 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:30:04.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:04.819 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:30:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:30:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:30:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:30:04.819 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:30:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:30:04.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:30:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:30:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:30:04.819 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:30:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:04.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:04.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:04.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:04.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:04.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:04.820 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:30:04.820 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:30:04.820 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:30:04.820 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:30:04.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:04.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:04.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:04.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:30:04.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:04.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:04.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:04.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:30:04.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:30:04.821 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:30:04.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:09.828 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:30:09.828 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:30:09.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:09.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:09.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:09.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:09.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:09.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:30:09.837 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:09.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:30:09.837 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:30:09.840 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:30:09.841 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:30:09.841 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:30:09.841 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:09.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:09.841 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:30:09.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:30:09.842 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:30:09.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:09.844 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:30:09.845 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:30:09.845 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:30:09.845 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:09.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:09.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:30:09.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:30:09.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:30:09.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:09.848 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:30:09.848 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:30:09.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:30:09.848 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:09.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:09.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:30:09.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:30:09.849 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:30:09.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:09.853 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:30:09.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:30:09.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:30:09.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:30:09.853 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:30:09.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:30:09.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:30:09.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:09.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:30:09.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:30:09.853 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:30:09.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:09.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:09.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:09.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:09.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:09.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:09.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:09.854 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:30:09.854 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:30:09.854 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:30:09.854 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:30:09.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:09.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:09.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:09.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:30:09.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:09.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:09.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:09.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:09.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:09.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:09.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:09.859 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:30:10.329 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:30:10.374 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:30:10.374 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:30:10.375 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:30:10.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:30:10.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:30:10.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:30:10.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:30:10.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:30:10.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:30:10.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:30:10.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:30:10.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:30:10.418 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:30:10.418 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 03:30:10.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:30:10.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:30:10.796 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:30:10.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:10.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:10.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:10.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:11.266 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:30:11.738 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:30:11.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:11.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:11.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:11.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:12.210 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:30:12.683 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:30:12.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:12.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:12.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:12.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:13.151 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:30:13.625 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:30:13.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:13.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:13.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:13.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:14.094 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:30:14.565 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:30:14.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:14.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:14.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:14.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:15.029 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:30:15.496 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:30:15.959 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:30:16.426 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:30:16.892 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:30:17.355 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:30:17.817 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:30:18.279 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:30:18.743 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:30:19.208 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:30:19.679 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:30:20.146 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:30:20.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:30:20.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:30:20.421 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:30:20.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:20.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:20.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:20.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:20.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:20.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:20.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:20.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:20.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:30:20.424 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:30:20.424 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:30:25.426 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:30:25.426 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:30:25.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:25.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:25.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:25.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:25.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:25.431 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:30:25.431 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:25.431 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:30:25.432 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:30:25.433 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:30:25.434 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:30:25.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:30:25.434 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:25.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:25.435 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:30:25.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:30:25.435 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:30:25.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:25.436 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:30:25.436 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:30:25.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:30:25.437 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:25.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:25.437 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:30:25.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:30:25.437 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:30:25.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:25.438 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:30:25.439 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:30:25.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:30:25.439 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:25.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:25.439 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:30:25.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:30:25.439 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:30:25.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:25.441 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:30:25.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:30:25.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:30:25.442 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:30:25.442 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:30:25.442 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:25.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:30:25.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:30:25.444 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:30:25.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:30.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:30:30.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:30:30.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:30.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:30.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:30.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:30.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:30.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:30:30.456 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:30.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:30:30.456 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:30:30.458 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:30:30.458 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:30:30.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:30:30.459 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:30.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:30.459 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:30:30.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:30:30.460 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:30:30.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:30.460 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:30:30.461 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:30:30.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:30:30.461 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:30.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:30.461 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:30:30.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:30:30.461 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:30:30.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:30.463 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:30:30.463 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:30:30.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:30:30.464 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:30.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:30.464 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:30:30.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:30:30.464 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:30:30.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:30.467 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:30:30.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:30:30.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:30:30.468 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:30:30.468 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:30:30.468 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:30.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:30.473 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:30:30.936 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:30:30.998 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:30:31.000 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:30:31.002 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:30:31.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:30:31.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:30:31.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:30:31.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:30:31.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:30:31.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:30:31.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:30:31.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:30:31.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:30:31.025 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:30:31.025 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-03 03:30:31.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:30:31.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:30:31.400 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:30:31.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:31.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:31.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:31.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:31.869 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:30:32.336 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:30:32.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:32.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:32.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:32.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:32.801 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:30:33.268 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:30:33.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:33.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:33.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:33.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:33.732 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:30:34.198 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:30:34.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:34.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:34.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:34.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:34.666 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:30:35.132 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:30:35.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:35.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:35.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:35.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:35.597 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:30:36.063 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:30:36.527 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:30:36.993 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:30:37.458 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:30:37.922 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:30:38.387 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:30:38.860 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:30:39.332 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:30:39.804 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:30:40.275 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:30:40.747 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:30:41.220 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:30:41.692 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:30:42.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:30:42.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:30:42.030 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:30:42.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:42.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:42.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:42.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:42.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:42.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:42.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:42.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:42.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:30:42.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:30:42.037 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:30:47.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:30:47.043 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:30:47.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:47.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:47.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:47.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:47.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:47.051 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:30:47.051 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:47.051 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:30:47.051 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:30:47.053 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:30:47.053 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:30:47.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:30:47.054 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:47.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:47.054 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:30:47.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:30:47.054 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:30:47.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:47.056 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:30:47.056 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:30:47.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:30:47.056 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:47.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:47.056 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:30:47.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:30:47.056 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:30:47.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:47.058 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:30:47.058 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:30:47.058 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:30:47.058 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:47.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:47.059 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:30:47.059 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:30:47.059 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:30:47.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:47.062 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:30:47.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:30:47.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:30:47.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:30:47.062 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:30:47.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:30:47.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:30:47.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:30:47.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:47.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:30:47.063 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:30:47.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:47.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:47.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:47.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:47.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:47.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:47.063 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:30:47.063 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:30:47.063 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:30:47.063 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:30:47.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:47.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:47.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:47.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:47.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:47.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:47.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:30:47.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:30:47.066 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:30:47.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:47.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:52.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:30:52.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:30:52.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:52.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:52.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:52.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:52.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:30:52.082 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:30:52.082 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:52.082 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:30:52.082 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:30:52.086 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:30:52.087 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:30:52.087 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:30:52.087 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:52.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:30:52.087 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:30:52.087 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:30:52.087 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:30:52.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:52.091 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:30:52.092 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:30:52.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:30:52.092 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:52.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:30:52.092 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:30:52.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:30:52.092 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:30:52.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:52.096 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:30:52.096 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:30:52.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:30:52.096 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:30:52.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:30:52.097 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:30:52.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:30:52.097 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:30:52.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:52.101 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:52.102 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:30:52.102 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:30:52.102 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:30:52.102 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:30:52.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:52.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:52.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:52.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:30:52.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:52.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:52.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:52.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:52.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:52.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:52.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:52.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:52.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:52.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:52.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:52.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:52.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:52.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:30:52.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:30:52.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:52.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:52.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:52.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:30:52.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:52.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:30:52.107 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:30:52.573 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:30:52.636 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:30:52.638 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:30:52.640 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:30:52.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:30:53.044 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:30:53.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:53.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:53.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:53.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:53.512 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:30:53.975 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:30:54.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:54.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:54.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:54.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:54.447 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:30:54.919 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:30:55.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:55.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:55.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:55.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:55.390 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:30:55.860 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:30:56.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:56.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:56.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:56.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:56.331 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:30:56.806 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:30:57.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:30:57.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:30:57.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:30:57.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:30:57.278 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:30:57.753 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:30:58.225 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:30:58.699 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:30:59.169 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:30:59.642 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:31:00.113 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:31:00.583 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:31:01.055 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:31:01.518 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:31:01.982 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:31:02.446 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:31:02.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:02.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:02.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:02.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:02.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:31:02.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:31:02.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:31:02.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:31:02.655 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:31:02.655 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:31:02.655 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:31:02.655 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2290 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:02.655 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2290 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:02.655 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2290 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:02.655 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2291 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:02.656 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2291 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:02.656 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2291 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:02.656 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2291 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:02.656 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2291 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:02.656 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:02.656 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:02.656 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:07.658 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:31:07.658 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:31:07.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:31:07.658 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:31:07.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:31:07.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:31:07.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:31:07.668 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:31:07.668 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:07.669 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:31:07.669 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:31:07.673 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:31:07.673 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:31:07.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:31:07.673 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:07.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:31:07.673 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:31:07.674 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:31:07.674 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:31:07.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:07.678 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:31:07.678 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:31:07.678 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:31:07.678 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:07.678 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:31:07.678 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:31:07.678 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:31:07.678 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:31:07.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:07.682 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:31:07.682 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:31:07.682 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:31:07.682 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:07.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:31:07.683 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:31:07.683 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:31:07.683 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:31:07.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:07.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:07.689 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:31:07.689 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:31:07.689 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:31:07.689 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:31:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:07.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:31:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:07.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:07.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:07.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:31:07.691 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:31:07.691 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:31:07.691 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:31:12.699 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:31:12.699 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:31:12.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:31:12.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:31:12.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:31:12.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:31:12.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:31:12.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:31:12.702 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:12.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:31:12.703 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:31:12.703 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:31:12.703 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:31:12.704 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:31:12.704 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:12.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:31:12.704 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:31:12.704 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:31:12.704 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:31:12.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:12.705 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:31:12.705 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:31:12.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:31:12.705 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:12.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:31:12.705 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:31:12.706 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:31:12.706 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:31:12.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:12.706 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:31:12.706 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:31:12.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:31:12.706 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:12.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:31:12.706 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:31:12.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:31:12.706 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:31:12.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:12.708 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:31:12.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:31:12.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:31:12.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:31:12.708 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:31:12.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:31:12.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:31:12.709 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:31:12.709 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:31:12.709 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:12.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:12.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:12.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:12.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:12.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:12.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:12.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:12.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:12.713 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:31:13.190 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:31:13.234 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:31:13.236 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:31:13.238 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:31:13.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:31:13.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:31:13.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:13.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:13.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:13.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:14.132 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:31:14.603 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:31:14.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:14.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:14.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:14.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:15.071 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:31:15.541 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:31:15.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:15.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:15.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:15.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:16.015 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:31:16.483 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:31:16.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:16.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:16.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:16.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:16.954 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:31:17.425 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:31:17.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:17.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:17.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:17.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:17.899 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:31:18.370 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:31:18.842 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:31:19.313 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:31:19.779 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:31:20.250 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:31:20.718 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:31:21.191 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:31:21.663 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:31:22.139 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:31:22.611 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:31:23.083 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:31:23.557 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:31:24.029 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:31:24.503 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:31:24.972 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:31:25.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:25.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:25.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:25.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:25.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:31:25.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:31:25.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:31:25.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:31:25.252 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:31:25.252 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:31:25.252 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:31:25.252 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2715 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:25.252 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2715 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:25.252 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2715 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:25.252 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2715 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:25.252 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2715 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:25.252 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2715 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:25.252 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2715 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:31:30.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:31:30.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:31:30.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:31:30.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:31:30.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:31:30.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:31:30.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:31:30.268 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:31:30.268 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:30.268 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:31:30.268 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:31:30.271 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:31:30.271 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:31:30.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:31:30.271 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:30.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:31:30.271 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:31:30.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:31:30.271 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:31:30.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:30.274 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:31:30.274 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:31:30.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:31:30.274 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:30.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:31:30.274 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:31:30.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:31:30.274 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:31:30.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:30.276 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:31:30.276 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:31:30.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:31:30.276 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:30.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:31:30.276 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:31:30.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:31:30.276 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:31:30.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:31:30.279 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:31:30.279 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:31:30.279 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:30.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:30.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:30.284 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:31:30.750 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:31:30.804 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:31:30.804 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:31:30.804 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:31:30.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:31:30.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:31:30.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:31:30.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:31:30.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:31:30.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:31:30.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:31:30.806 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:31:30.806 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:31:31.222 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:31:31.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:31.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:31.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:31.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:31.693 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:31:32.167 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:31:32.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:32.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:32.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:32.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:32.639 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:31:33.110 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:31:33.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:33.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:33.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:33.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:33.582 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:31:34.053 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:31:34.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:34.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:34.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:34.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:34.526 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:31:34.998 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:31:35.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:35.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:35.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:35.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:35.471 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:31:35.941 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:31:36.415 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:31:36.887 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:31:37.360 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:31:37.833 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:31:38.302 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:31:38.768 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:31:39.237 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:31:39.703 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:31:40.170 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:31:40.638 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:31:41.104 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:31:41.569 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:31:41.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:31:41.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:31:41.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:41.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:41.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:41.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:41.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:31:41.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:31:41.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:31:41.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:31:41.853 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:31:41.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:31:41.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:31:46.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:31:46.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:31:46.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:31:46.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:31:46.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:31:46.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:31:46.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:31:46.867 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:31:46.867 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:46.867 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:31:46.867 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:31:46.870 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:31:46.871 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:31:46.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:31:46.871 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:46.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:31:46.872 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:31:46.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:31:46.872 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:31:46.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:46.874 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:31:46.874 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:31:46.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:31:46.874 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:46.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:31:46.874 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:31:46.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:31:46.874 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:31:46.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:46.876 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:31:46.876 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:31:46.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:31:46.876 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:31:46.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:31:46.876 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:31:46.877 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:31:46.877 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:31:46.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:46.879 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:31:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:31:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:31:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:31:46.879 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:31:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:31:46.880 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:31:46.880 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:31:46.880 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:46.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:31:46.885 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:31:47.348 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:31:47.409 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:31:47.411 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:31:47.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:31:47.413 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:31:47.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:31:47.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:31:47.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:31:47.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:31:47.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:31:47.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:31:47.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:31:47.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:31:47.818 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:31:47.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:47.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:47.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:47.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:48.291 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:31:48.762 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:31:48.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:48.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:48.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:48.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:49.229 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:31:49.696 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:31:49.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:49.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:49.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:49.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:50.169 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:31:50.636 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:31:50.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:50.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:50.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:50.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:51.103 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:31:51.574 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:31:51.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:31:51.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:31:51.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:31:51.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:31:52.047 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:31:52.520 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:31:52.992 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:31:53.463 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:31:53.936 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:31:54.409 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:31:54.881 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:31:55.354 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:31:55.822 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:31:56.288 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:31:56.756 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:31:57.223 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:31:57.691 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:31:58.162 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:31:58.633 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:31:59.100 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:31:59.568 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:32:00.035 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:32:00.499 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:32:00.969 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:32:01.442 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:32:01.914 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:32:02.386 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:32:02.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:02.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:02.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:02.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:02.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:02.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:02.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:32:02.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:32:02.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:32:02.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:32:02.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:32:02.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:32:02.456 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:32:02.456 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3383 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:02.456 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3383 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:02.456 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3383 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:02.456 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3383 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:02.456 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3383 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:02.456 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3383 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:02.456 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3383 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:07.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:32:07.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:32:07.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:32:07.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:32:07.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:32:07.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:32:07.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:32:07.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:32:07.474 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:07.475 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:32:07.475 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:32:07.477 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:32:07.477 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:32:07.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:32:07.477 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:07.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:32:07.477 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:32:07.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:32:07.477 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:32:07.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:07.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:32:07.480 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:32:07.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:32:07.480 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:07.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:32:07.480 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:32:07.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:32:07.480 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:32:07.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:07.482 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:32:07.482 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:32:07.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:32:07.482 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:07.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:32:07.482 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:32:07.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:32:07.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:32:07.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:07.484 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:32:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:32:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:32:07.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:32:07.485 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:32:07.485 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:32:07.485 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:07.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:07.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:07.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:07.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:07.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:07.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:07.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:07.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:07.490 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:32:07.953 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:32:08.013 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:32:08.015 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:32:08.017 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:32:08.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:08.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:08.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:08.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:08.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:08.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:08.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:08.025 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:32:08.025 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:32:08.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:08.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:08.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:08.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:08.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:08.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:08.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:32:08.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:32:08.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:32:08.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:32:08.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:32:08.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:32:08.063 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:32:08.063 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:08.063 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:08.063 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:08.063 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:08.064 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:08.064 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:08.064 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:13.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:32:13.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:32:13.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:32:13.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:32:13.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:32:13.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:32:13.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:32:13.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:32:13.070 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:13.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:32:13.070 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:32:13.073 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:32:13.073 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:32:13.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:32:13.073 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:13.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:32:13.073 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:32:13.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:32:13.073 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:32:13.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:13.076 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:32:13.076 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:32:13.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:32:13.076 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:13.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:32:13.076 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:32:13.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:32:13.076 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:32:13.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:13.078 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:32:13.078 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:32:13.078 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:32:13.078 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:13.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:32:13.078 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:32:13.078 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:32:13.078 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:32:13.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:13.081 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:32:13.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:32:13.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:32:13.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:32:13.081 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:32:13.082 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:32:13.082 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:32:13.082 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:13.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:13.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:13.087 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:32:13.557 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:32:13.606 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:32:13.608 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:32:13.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:13.611 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:32:13.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:13.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:13.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:13.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:13.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:13.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:13.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:13.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:13.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:13.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:13.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:32:13.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:32:13.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:13.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:13.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:13.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:13.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:13.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:13.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:13.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:13.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:13.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:13.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:13.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:13.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:13.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:13.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:13.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:13.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:13.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:13.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:32:13.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:32:13.885 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:32:13.885 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:32:13.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:13.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:14.026 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:32:14.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:14.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:14.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:14.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:14.075 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:32:14.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:14.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:14.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:14.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:14.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:14.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:14.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:14.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:14.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:14.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:14.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:14.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:14.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:14.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:14.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:32:14.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:32:14.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:14.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:14.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:14.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:14.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:14.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:14.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:14.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:14.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:14.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:14.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:14.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:14.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:14.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:14.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:14.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:14.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:14.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:14.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:32:14.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:32:14.495 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:32:14.496 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:32:14.496 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:32:14.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:14.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:14.967 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:32:15.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:15.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:15.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:15.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:15.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:15.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:15.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:15.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:15.288 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:32:15.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:15.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:15.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:15.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:15.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:32:15.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:32:15.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:32:15.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:32:15.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:32:15.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:32:15.310 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:32:15.311 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=483 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:15.311 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=483 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:15.311 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=483 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:15.311 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=483 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:15.311 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=484 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:15.311 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=484 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:15.311 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=484 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:15.311 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=484 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:15.311 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=484 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:15.312 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=484 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:15.312 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=484 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:15.312 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=484 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:20.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:32:20.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:32:20.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:32:20.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:32:20.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:32:20.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:32:20.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:32:20.312 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:32:20.312 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:20.312 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:32:20.312 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:32:20.313 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:32:20.313 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:32:20.313 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:32:20.313 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:20.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:32:20.313 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:32:20.313 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:32:20.313 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:32:20.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:20.314 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:32:20.314 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:32:20.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:32:20.314 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:20.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:32:20.314 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:32:20.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:32:20.314 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:32:20.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:20.315 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:32:20.315 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:32:20.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:32:20.315 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:20.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:32:20.315 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:32:20.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:32:20.315 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:32:20.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:20.317 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:32:20.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:32:20.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:32:20.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:32:20.317 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:32:20.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:32:20.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:32:20.318 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:32:20.318 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:32:20.318 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:20.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:20.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:20.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:20.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:20.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:20.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:20.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:20.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:20.323 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:32:20.793 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:32:20.834 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:32:20.835 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:32:20.835 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:32:20.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:20.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:20.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:20.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:20.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:20.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:20.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:20.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:20.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:20.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:20.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:20.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:32:20.869 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:32:20.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:20.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:20.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:20.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:21.261 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:32:21.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:21.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:21.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:21.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:21.732 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:32:22.206 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:32:22.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:22.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:22.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:22.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:22.678 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:32:23.151 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:32:23.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:23.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:23.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:23.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:23.621 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:32:24.095 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:32:24.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:24.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:24.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:24.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:24.568 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:32:25.040 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:32:25.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:25.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:25.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:25.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:25.513 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:32:25.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:25.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:25.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:25.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:25.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:25.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:25.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:25.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:25.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:25.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:25.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:25.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:25.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:25.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:25.919 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:32:25.919 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:32:25.926 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:32:25.927 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:32:25.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:25.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:25.985 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:32:26.457 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:32:26.929 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:32:27.396 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:32:27.862 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:32:28.327 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:32:28.792 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:32:29.262 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:32:29.728 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:32:30.192 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:32:30.662 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:32:30.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:30.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:30.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:30.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:30.936 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:32:30.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:30.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:30.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:30.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:30.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:30.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:30.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:30.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:30.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:30.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:30.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:32:30.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:32:30.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:30.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:30.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:30.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:31.131 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:32:31.602 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:32:32.074 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:32:32.543 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:32:33.012 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:32:33.483 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:32:33.954 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:32:34.425 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:32:34.897 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:32:35.369 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:32:35.842 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:32:35.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:35.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:35.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:35.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:36.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:36.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:36.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:36.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:36.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:36.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:36.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:36.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:36.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:36.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:36.024 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:32:36.024 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:32:36.078 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:32:36.078 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:32:36.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:36.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:36.311 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:32:36.780 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:32:37.248 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:32:37.712 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:32:38.180 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:32:38.653 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:32:39.125 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:32:39.591 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:32:40.059 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:32:40.533 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:32:41.004 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:32:41.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:41.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:41.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:41.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:41.089 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:32:41.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:41.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:41.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:41.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:41.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:32:41.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:32:41.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:32:41.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:32:41.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:32:41.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:32:41.110 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:32:41.110 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4512 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:41.110 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4512 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:41.110 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4512 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:41.110 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4512 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:41.110 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4512 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:41.111 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4512 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:41.111 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4513 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:41.111 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4513 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:41.111 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4513 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:41.111 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4513 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:41.111 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4513 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:41.111 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4513 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:41.111 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4513 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:41.111 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4513 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:32:46.111 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:32:46.111 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:32:46.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:32:46.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:32:46.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:32:46.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:32:46.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:32:46.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:32:46.119 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:46.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:32:46.120 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:32:46.122 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:32:46.123 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:32:46.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:32:46.123 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:46.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:32:46.123 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:32:46.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:32:46.123 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:32:46.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:46.126 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:32:46.126 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:32:46.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:32:46.126 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:46.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:32:46.127 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:32:46.127 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:32:46.127 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:32:46.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:46.130 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:32:46.130 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:32:46.131 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:32:46.131 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:32:46.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:32:46.131 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:32:46.131 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:32:46.131 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:32:46.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:46.136 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:32:46.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:32:46.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:46.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:46.138 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:32:46.138 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:32:46.138 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:32:46.138 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:32:46.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:46.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:46.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:46.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:32:46.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:46.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:46.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:46.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:46.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:46.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:46.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:46.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:46.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:46.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:46.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:46.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:46.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:46.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:46.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:32:46.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:46.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:46.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:46.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:32:46.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:46.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:32:46.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:32:46.143 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:32:46.609 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:32:46.669 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:32:46.671 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:32:46.672 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:32:46.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:46.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:46.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:46.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:46.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:46.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:46.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:46.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:46.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:46.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:46.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:46.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:32:46.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:32:46.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:46.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:46.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:46.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:47.077 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:32:47.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:47.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:47.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:47.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:47.548 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:32:48.021 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:32:48.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:48.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:48.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:48.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:48.494 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:32:48.966 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:32:49.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:49.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:49.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:49.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:49.437 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:32:49.910 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:32:50.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:50.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:50.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:50.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:50.383 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:32:50.855 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:32:51.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:32:51.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:32:51.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:32:51.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:32:51.326 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:32:51.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:51.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:51.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:51.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:51.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:51.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:51.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:51.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:51.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:51.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:51.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:51.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:51.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:51.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:51.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:32:51.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:32:51.792 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:32:51.792 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:32:51.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:51.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:51.799 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:32:52.271 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:32:52.743 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:32:53.215 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:32:53.683 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:32:54.153 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:32:54.623 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:32:55.097 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:32:55.567 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:32:56.040 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:32:56.512 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:32:56.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:56.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:56.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:56.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:56.801 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:32:56.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:56.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:56.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:56.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:32:56.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:32:56.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:32:56.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:32:56.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:56.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:56.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:56.830 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:32:56.830 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:32:56.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:32:56.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:32:56.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:56.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:32:56.983 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:32:57.454 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:32:57.925 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:32:58.398 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:32:58.865 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:32:59.330 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:32:59.800 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:33:00.273 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:33:00.745 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:33:01.216 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:33:01.687 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:33:01.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:01.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:01.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:01.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:01.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:01.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:01.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:01.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:01.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:01.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:01.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:01.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:01.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:33:01.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:33:01.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:33:01.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:33:01.921 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:33:01.922 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:33:01.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:01.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:02.158 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:33:02.631 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:33:03.104 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:33:03.576 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:33:04.048 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:33:04.521 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:33:04.994 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:33:05.465 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:33:05.937 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:33:06.410 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:33:06.881 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:33:06.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:06.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:06.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:06.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:06.929 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:33:06.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:06.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:06.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:06.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:06.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:33:06.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:33:06.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:33:06.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:33:06.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:33:06.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:33:06.944 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:33:11.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:33:11.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:33:11.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:33:11.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:33:11.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:33:11.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:33:11.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:33:11.961 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:33:11.961 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:33:11.961 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:33:11.961 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:33:11.964 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:33:11.964 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:33:11.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:33:11.964 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:33:11.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:33:11.964 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:33:11.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:33:11.964 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:33:11.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:11.966 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:33:11.966 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:33:11.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:33:11.967 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:33:11.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:33:11.967 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:33:11.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:33:11.967 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:33:11.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:11.969 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:33:11.969 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:33:11.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:33:11.969 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:33:11.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:33:11.969 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:33:11.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:33:11.969 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:33:11.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:11.972 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:33:11.972 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:33:11.972 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:33:11.973 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:11.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:11.977 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:33:12.448 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:33:12.495 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:33:12.497 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:33:12.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:12.498 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:33:12.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:12.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:12.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:12.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:12.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:12.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:12.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:12.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:12.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:33:12.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:33:12.531 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:33:12.531 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:33:12.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:33:12.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:33:12.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:12.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:12.915 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:33:12.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:12.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:12.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:12.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:13.386 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:33:13.857 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:33:13.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:13.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:13.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:13.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:14.328 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:33:14.801 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:33:14.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:14.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:14.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:14.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:15.279 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:33:15.751 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:33:15.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:15.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:15.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:15.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:16.222 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:33:16.695 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:33:16.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:16.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:16.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:16.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:17.168 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:33:17.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:17.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:17.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:17.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:17.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:17.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:17.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:17.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:17.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:17.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:17.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:17.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:17.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:33:17.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:33:17.569 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:33:17.569 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:33:17.585 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:33:17.585 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:33:17.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:17.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:17.639 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:33:18.113 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:33:18.583 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:33:19.055 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:33:19.529 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:33:20.001 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:33:20.472 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:33:20.943 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:33:21.416 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:33:21.882 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:33:22.348 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:33:22.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:22.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:22.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:22.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:22.594 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:33:22.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:22.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:22.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:22.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:22.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:22.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:22.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:22.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:22.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:33:22.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:33:22.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:33:22.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:33:22.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:33:22.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:33:22.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:22.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:22.812 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:33:23.277 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:33:23.746 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:33:24.210 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:33:24.674 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:33:25.147 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:33:25.619 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:33:26.089 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:33:26.555 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:33:27.021 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:33:27.488 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:33:27.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:27.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:27.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:27.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:27.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:27.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:27.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:27.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:27.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:27.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:27.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:27.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:27.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:33:27.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:33:27.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:33:27.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:33:27.669 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:33:27.669 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:33:27.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:27.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:27.959 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:33:28.431 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:33:28.898 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:33:29.367 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:33:29.834 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:33:30.298 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:33:30.762 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:33:31.234 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:33:31.706 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:33:32.178 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:33:32.650 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:33:32.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:32.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:32.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:32.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:32.676 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:33:32.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:32.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:32.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:32.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:32.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:33:32.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:33:32.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:33:32.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:33:32.695 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:33:32.695 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:33:32.695 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:33:32.696 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4500 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:33:32.696 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4500 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:33:32.696 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4500 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:33:32.696 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4500 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:33:32.696 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4500 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:33:32.696 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4500 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:33:32.696 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4500 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:33:37.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:33:37.697 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:33:37.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:33:37.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:33:37.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:33:37.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:33:37.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:33:37.709 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:33:37.710 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:33:37.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:33:37.710 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:33:37.713 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:33:37.713 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:33:37.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:33:37.713 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:33:37.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:33:37.713 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:33:37.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:33:37.714 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:33:37.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:37.716 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:33:37.716 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:33:37.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:33:37.716 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:33:37.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:33:37.716 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:33:37.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:33:37.716 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:33:37.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:37.718 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:33:37.718 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:33:37.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:33:37.718 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:33:37.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:33:37.718 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:33:37.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:33:37.719 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:33:37.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:37.723 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:33:37.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:33:37.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:33:37.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:33:37.723 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:33:37.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:33:37.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:33:37.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:33:37.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:33:37.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:37.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:37.724 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:33:37.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:37.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:37.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:37.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:37.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:37.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:37.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:37.724 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:33:37.724 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:33:37.724 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:33:37.724 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:33:37.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:37.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:37.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:37.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:33:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:37.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:37.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:37.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:37.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:37.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:33:37.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:33:37.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:37.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:37.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:33:37.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:33:37.729 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:33:38.197 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:33:38.258 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:33:38.260 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:33:38.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:38.261 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:33:38.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:38.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:38.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:38.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:38.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:38.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:38.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:38.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:38.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:33:38.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:33:38.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:33:38.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:33:38.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:33:38.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:33:38.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:38.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:38.669 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:33:38.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:38.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:38.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:38.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:39.140 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:33:39.606 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:33:39.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:39.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:39.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:39.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:40.076 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:33:40.543 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:33:40.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:40.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:40.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:40.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:41.010 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:33:41.481 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:33:41.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:41.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:41.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:41.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:41.951 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:33:42.424 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:33:42.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:42.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:42.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:42.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:42.897 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:33:43.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:43.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:43.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:43.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:43.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:43.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:43.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:43.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:43.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:43.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:43.369 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:33:43.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:43.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:43.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:33:43.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:33:43.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:33:43.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:33:43.414 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:33:43.415 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:33:43.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:43.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:43.840 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:33:44.311 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:33:44.785 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:33:45.252 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:33:45.718 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:33:46.184 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:33:46.655 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:33:47.123 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:33:47.592 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:33:48.062 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:33:48.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:48.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:48.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:48.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:48.425 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:33:48.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:48.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:48.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:48.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:48.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:48.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:48.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:48.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:48.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:33:48.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:33:48.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:33:48.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:33:48.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:33:48.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:33:48.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:48.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:48.533 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:33:49.005 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:33:49.476 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:33:49.947 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:33:50.418 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:33:50.888 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:33:51.362 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:33:51.834 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:33:52.306 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:33:52.775 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:33:53.244 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:33:53.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:53.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:53.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:53.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:53.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:53.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:53.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:53.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:53.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:53.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:33:53.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:53.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:53.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:33:53.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:33:53.513 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:33:53.513 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:33:53.521 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:33:53.521 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:33:53.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:53.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:53.717 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:33:54.189 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:33:54.660 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:33:55.129 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:33:55.597 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:33:56.063 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:33:56.529 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:33:56.996 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:33:57.466 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:33:57.938 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:33:58.405 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:33:58.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:33:58.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:33:58.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:33:58.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:33:58.529 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:33:58.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:33:58.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:33:58.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:33:58.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:33:58.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:33:58.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:33:58.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:33:58.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:33:58.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:33:58.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:33:58.546 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:33:58.546 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4520 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:33:58.546 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4520 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:33:58.546 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4520 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:33:58.546 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4520 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:33:58.546 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4520 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:33:58.546 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4520 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:34:03.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:34:03.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:34:03.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:34:03.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:34:03.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:34:03.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:34:03.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:34:03.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:34:03.568 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:34:03.568 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:34:03.568 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:34:03.571 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:34:03.571 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:34:03.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:34:03.572 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:34:03.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:34:03.572 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:34:03.572 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:34:03.572 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:34:03.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:34:03.576 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:34:03.576 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:34:03.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:34:03.576 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:34:03.576 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:34:03.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:34:03.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:34:03.577 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:34:03.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:34:03.580 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:34:03.581 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:34:03.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:34:03.581 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:34:03.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:34:03.581 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:34:03.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:34:03.581 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:34:03.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:34:03.585 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:34:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:34:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:34:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:34:03.585 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:34:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:34:03.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:34:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:34:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:34:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:03.585 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:34:03.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:34:03.586 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:34:03.586 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:34:03.586 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:03.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:03.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:03.591 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:34:04.056 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:34:04.115 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:34:04.117 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:34:04.119 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:34:04.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:04.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:04.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:04.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:34:04.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:04.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:04.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:04.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:34:04.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:04.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:34:04.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:34:04.173 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:34:04.173 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:34:04.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:34:04.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:34:04.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:04.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:04.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:04.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:04.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:04.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:04.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:04.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:04.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:34:04.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:04.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:04.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:34:04.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:04.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:04.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:34:04.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:34:04.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:34:04.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:34:04.475 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:34:04.475 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:34:04.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:04.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:04.523 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:34:04.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:34:04.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:34:04.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:34:04.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:34:04.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:04.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:04.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:04.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:04.855 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:34:04.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:04.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:04.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:34:04.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:04.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:04.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:34:04.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:04.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:04.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:34:04.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:34:04.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:34:04.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:34:04.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:34:04.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:34:04.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:04.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:04.991 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:34:05.465 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:34:05.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:34:05.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:34:05.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:34:05.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:34:05.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:05.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:05.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:05.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:05.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:05.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:05.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:34:05.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:05.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:05.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:34:05.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:05.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:05.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:34:05.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:34:05.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:34:05.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:34:05.701 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:34:05.701 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:34:05.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:05.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:05.936 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:34:06.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:06.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:06.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:06.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:06.259 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:34:06.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:34:06.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:34:06.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:34:06.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:34:06.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:34:06.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:34:06.275 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:34:06.275 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:34:06.275 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:34:06.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:34:06.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:34:06.276 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=585 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:34:06.276 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=585 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:34:06.276 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=585 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:34:06.276 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=585 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:34:06.276 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=585 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:34:06.276 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=585 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:34:06.276 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=585 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:34:11.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:34:11.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:34:11.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:34:11.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:34:11.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:34:11.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:34:11.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:34:11.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:34:11.287 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:34:11.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:34:11.287 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:34:11.290 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:34:11.290 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:34:11.290 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:34:11.290 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:34:11.290 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:34:11.290 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:34:11.290 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:34:11.290 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:34:11.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:34:11.292 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:34:11.292 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:34:11.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:34:11.292 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:34:11.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:34:11.292 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:34:11.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:34:11.293 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:34:11.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:34:11.294 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:34:11.294 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:34:11.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:34:11.294 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:34:11.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:34:11.294 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:34:11.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:34:11.294 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:34:11.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:34:11.296 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:34:11.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:34:11.297 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:34:11.297 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:34:11.297 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:11.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:34:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:34:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:11.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:34:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:34:11.302 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:34:11.766 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:34:11.814 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:34:11.816 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:34:11.817 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:34:11.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:11.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:11.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:11.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:34:11.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:11.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:11.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:34:11.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:11.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:11.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:34:11.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:34:11.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:34:11.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:34:11.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:34:11.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:34:11.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:11.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:12.235 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:34:12.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:34:12.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:34:12.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:34:12.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:34:12.708 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:34:13.181 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:34:13.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:34:13.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:34:13.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:34:13.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:34:13.651 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:34:14.117 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:34:14.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:34:14.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:34:14.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:34:14.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:34:14.588 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:34:15.055 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:34:15.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:34:15.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:34:15.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:34:15.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:34:15.520 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:34:15.991 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:34:16.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:34:16.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:34:16.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:34:16.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:34:16.462 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:34:16.933 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:34:17.404 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:34:17.877 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:34:18.350 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:34:18.822 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:34:19.289 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:34:19.759 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:34:20.228 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:34:20.696 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:34:21.163 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:34:21.630 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:34:22.095 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:34:22.564 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:34:23.031 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:34:23.502 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:34:23.976 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:34:24.449 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:34:24.921 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:34:25.392 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:34:25.863 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:34:26.336 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:34:26.809 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:34:27.281 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:34:27.752 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:34:28.225 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:34:28.698 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:34:29.170 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:34:29.641 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:34:30.111 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:34:30.582 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:34:31.053 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:34:31.524 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:34:31.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:31.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:31.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:31.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:31.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:31.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:31.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:34:31.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:31.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:31.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:34:31.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:31.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:31.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:34:31.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:34:31.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:34:31.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:34:31.943 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:34:31.943 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:34:31.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:31.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:31.994 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:34:32.468 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:34:32.936 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:34:33.407 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:34:33.877 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:34:34.349 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:34:34.820 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:34:35.291 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:34:35.761 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:34:36.231 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:34:36.703 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:34:37.173 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:34:37.645 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 03:34:38.117 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 03:34:38.590 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 03:34:39.062 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 03:34:39.533 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 03:34:40.002 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 03:34:40.474 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 03:34:40.943 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 03:34:41.409 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 03:34:41.882 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 03:34:42.355 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 03:34:42.828 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 03:34:43.300 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 03:34:43.773 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 03:34:44.246 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 03:34:44.719 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 03:34:45.189 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 03:34:45.657 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 03:34:46.128 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 03:34:46.598 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 03:34:47.070 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 03:34:47.543 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 03:34:48.016 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 03:34:48.488 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 03:34:48.960 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 03:34:49.431 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 03:34:49.904 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 03:34:50.373 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 03:34:50.846 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 03:34:51.317 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 03:34:51.790 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 03:34:51.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:51.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:51.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:51.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:51.958 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:34:51.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:51.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:51.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:34:51.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:34:51.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:34:51.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:34:51.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:34:51.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:51.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:34:51.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:34:51.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:34:51.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:34:52.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:34:52.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:34:52.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:52.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:34:52.260 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 03:34:52.731 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 03:34:53.202 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 03:34:53.675 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 03:34:54.148 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 03:34:54.620 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 03:34:55.091 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 03:34:55.561 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 03:34:56.032 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 03:34:56.505 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 03:34:56.978 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 03:34:57.450 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 03:34:57.924 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 03:34:58.396 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 03:34:58.868 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 03:34:59.339 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-03 03:34:59.809 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-03 03:35:00.275 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-03 03:35:00.743 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-03 03:35:01.211 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-03 03:35:01.678 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-03 03:35:02.150 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-03 03:35:02.621 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-03 03:35:03.090 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-03 03:35:03.562 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-03 03:35:04.033 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-03 03:35:04.506 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-03 03:35:04.978 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-03 03:35:05.450 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-03 03:35:05.921 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-03 03:35:06.392 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-03 03:35:06.860 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-03 03:35:07.325 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-03 03:35:07.790 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-03 03:35:08.262 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-03 03:35:08.727 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-03 03:35:09.198 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-03 03:35:09.665 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-03 03:35:10.130 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-03 03:35:10.601 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-03 03:35:11.072 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-03 03:35:11.543 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-03 03:35:12.014 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-03 03:35:12.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:12.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:12.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:12.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:12.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:12.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:12.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:12.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:12.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:12.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:12.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:12.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:12.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:12.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:12.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:35:12.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:35:12.105 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:35:12.106 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:35:12.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:12.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:12.484 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-03 03:35:12.955 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-03 03:35:13.429 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-03 03:35:13.902 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-03 03:35:14.373 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-03 03:35:14.846 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-03 03:35:15.319 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-03 03:35:15.791 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-03 03:35:16.260 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-03 03:35:16.725 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-03 03:35:17.191 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-03 03:35:17.656 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-03 03:35:18.120 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-03 03:35:18.587 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-03 03:35:19.059 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-03 03:35:19.530 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-03 03:35:20.000 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-03 03:35:20.471 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-03 03:35:20.942 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-03 03:35:21.415 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-03 03:35:21.888 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-03 03:35:22.360 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-03 03:35:22.833 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-03 03:35:23.306 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-03 03:35:23.774 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-03 03:35:24.241 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-03 03:35:24.710 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-03 03:35:25.182 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-03 03:35:25.654 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-03 03:35:26.127 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-03 03:35:26.600 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-03 03:35:27.073 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-03 03:35:27.546 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-03 03:35:28.018 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-03 03:35:28.491 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-03 03:35:28.963 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-03 03:35:29.436 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-03 03:35:29.909 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-03 03:35:30.380 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-03 03:35:30.852 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-03 03:35:31.324 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-03 03:35:31.796 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-03 03:35:32.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:32.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:32.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:32.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:32.113 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:35:32.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:35:32.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:35:32.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:35:32.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:35:32.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:35:32.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:35:32.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:35:32.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:35:32.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:35:32.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:35:32.133 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:35:32.133 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=17517 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:35:32.133 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=17517 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:35:32.133 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=17517 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:35:32.133 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=17517 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:35:32.133 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=17517 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:35:32.133 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=17517 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:35:32.133 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=17517 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:35:37.139 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:35:37.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:35:37.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:35:37.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:35:37.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:35:37.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:35:37.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:35:37.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:35:37.156 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:35:37.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:35:37.156 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:35:37.159 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:35:37.160 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:35:37.160 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:35:37.160 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:35:37.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:35:37.160 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:35:37.160 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:35:37.160 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:35:37.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:35:37.163 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:35:37.163 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:35:37.163 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:35:37.163 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:35:37.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:35:37.163 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:35:37.164 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:35:37.164 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:35:37.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:35:37.166 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:35:37.166 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:35:37.167 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:35:37.167 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:35:37.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:35:37.167 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:35:37.167 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:35:37.167 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:35:37.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:35:37.170 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:37.171 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:35:37.171 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:35:37.171 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:35:37.172 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:35:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:37.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:35:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:35:37.173 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:35:37.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:35:37.173 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:35:37.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:35:42.181 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:35:42.181 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:35:42.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:35:42.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:35:42.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:35:42.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:35:42.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:35:42.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:35:42.190 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:35:42.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:35:42.191 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:35:42.195 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:35:42.195 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:35:42.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:35:42.195 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:35:42.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:35:42.195 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:35:42.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:35:42.195 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:35:42.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:35:42.198 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:35:42.198 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:35:42.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:35:42.198 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:35:42.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:35:42.199 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:35:42.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:35:42.199 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:35:42.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:35:42.201 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:35:42.201 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:35:42.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:35:42.201 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:35:42.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:35:42.202 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:35:42.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:35:42.202 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:35:42.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:35:42.206 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:35:42.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:35:42.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:35:42.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:35:42.206 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:42.207 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:35:42.207 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:35:42.207 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:35:42.208 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:35:42.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:42.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:42.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:42.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:35:42.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:42.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:42.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:42.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:42.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:42.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:35:42.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:35:42.212 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:35:42.675 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:35:42.736 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:35:42.738 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:35:42.739 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:35:42.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:42.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:42.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:42.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:42.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:42.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:42.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:42.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:42.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:42.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:42.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:42.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:35:42.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:35:42.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:42.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:42.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:42.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:43.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:43.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:43.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:43.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:43.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:43.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:43.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:43.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:43.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:35:43.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:35:43.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:43.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:43.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.144 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:35:43.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:35:43.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:35:43.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:35:43.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:35:43.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:43.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:43.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:43.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:43.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:43.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:43.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:43.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:43.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:43.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:35:43.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:35:43.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:43.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:43.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:43.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:43.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:43.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:43.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:43.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:43.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:43.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:43.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:43.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:43.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:43.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:43.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:35:43.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:35:43.512 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:35:43.512 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:35:43.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.613 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:35:43.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:43.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:43.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:43.788 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:35:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:43.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:43.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:43.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:43.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:43.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:43.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:35:43.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:35:43.843 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:35:43.843 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:35:43.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:43.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:44.082 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:35:44.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:44.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:44.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:44.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:44.146 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:35:44.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:44.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:44.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:44.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:44.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:44.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:44.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:44.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:35:44.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:35:44.168 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:35:44.168 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:35:44.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:44.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:44.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:35:44.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:35:44.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:35:44.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:35:44.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:44.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:44.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:44.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:44.465 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:35:44.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:44.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:44.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:44.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:44.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:44.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:44.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:44.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:44.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:44.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:44.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:35:44.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:35:44.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:44.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:44.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:44.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:44.551 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:35:45.025 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:35:45.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:35:45.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:35:45.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:35:45.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:35:45.497 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:35:45.969 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:35:46.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:35:46.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:35:46.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:35:46.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:35:46.440 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:35:46.913 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:35:47.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:47.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:47.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:47.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:47.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:47.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:47.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:47.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:47.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:47.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:47.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:47.084 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:35:47.084 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:35:47.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:47.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:47.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:47.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:47.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:35:47.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:35:47.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:35:47.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:35:47.386 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:35:47.857 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:35:48.322 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:35:48.789 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:35:49.256 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:35:49.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:49.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:49.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:49.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:49.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:49.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:49.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:49.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:49.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:49.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:49.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:49.669 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:35:49.669 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:35:49.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:49.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:49.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:49.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:49.727 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:35:50.196 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:35:50.663 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:35:51.129 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:35:51.596 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:35:52.067 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:35:52.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:52.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:52.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:52.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:52.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:52.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:52.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:52.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:52.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:52.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:52.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:52.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:52.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:52.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:52.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:35:52.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:35:52.303 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:35:52.303 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:35:52.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:52.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:52.537 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:35:53.009 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:35:53.483 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:35:53.953 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:35:54.424 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:35:54.897 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:35:54.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:54.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:54.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:54.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:54.984 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:35:54.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:55.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:55.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:55.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:55.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:55.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:55.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:55.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:35:55.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:35:55.037 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:35:55.037 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:35:55.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:55.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:55.366 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:35:55.838 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:35:56.308 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:35:56.779 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:35:57.251 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:35:57.717 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:35:57.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:57.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:57.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:57.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:57.805 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:35:57.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:35:57.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:35:57.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:35:57.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:35:57.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:57.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:35:57.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:35:57.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:35:57.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:35:57.855 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:35:57.855 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:35:57.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:57.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:35:58.185 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:35:58.656 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:35:59.130 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:35:59.599 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:36:00.071 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:36:00.544 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:36:00.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:00.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:00.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:00.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:00.630 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:36:00.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:00.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:00.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:00.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:00.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:36:00.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:36:00.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:36:00.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:36:00.642 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:36:00.642 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:36:00.642 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:36:00.642 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4001 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:00.642 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4001 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:00.642 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4001 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:00.642 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4001 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:00.642 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4001 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:00.642 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4001 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:00.642 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=4001 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:05.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:36:05.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:36:05.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:36:05.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:36:05.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:36:05.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:36:05.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:36:05.668 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:36:05.668 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:36:05.668 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:36:05.668 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:36:05.674 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:36:05.674 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:36:05.674 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:36:05.674 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:36:05.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:36:05.675 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:36:05.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:36:05.675 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:36:05.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:05.678 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:36:05.678 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:36:05.678 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:36:05.678 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:36:05.678 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:36:05.678 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:36:05.678 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:36:05.678 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:36:05.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:05.681 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:36:05.682 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:36:05.682 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:36:05.682 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:36:05.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:36:05.682 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:36:05.682 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:36:05.682 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:36:05.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:05.686 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:36:05.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:36:05.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:36:05.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:36:05.686 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:36:05.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:36:05.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:36:05.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:05.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:36:05.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:36:05.687 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:36:05.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:05.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:05.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:05.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:05.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:05.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:05.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:05.687 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:36:05.687 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:36:05.687 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:36:05.687 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:05.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:05.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:05.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:05.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:05.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:05.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:05.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:05.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:05.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:05.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:05.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:05.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:05.692 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:36:06.164 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:36:06.217 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:36:06.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:06.221 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:36:06.223 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:36:06.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:06.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:06.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:06.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:06.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:06.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:06.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:06.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:06.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:06.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:06.269 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:36:06.269 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:36:06.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:06.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:06.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:06.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:06.632 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:36:06.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:06.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:06.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:06.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:07.099 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:36:07.565 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:36:07.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:07.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:07.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:07.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:08.035 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:36:08.509 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:36:08.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:08.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:08.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:08.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:08.981 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:36:09.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:09.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:09.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:09.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:09.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:09.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:09.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:09.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:09.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:09.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:09.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:09.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:09.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:09.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:09.443 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:36:09.443 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:36:09.448 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:36:09.448 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:36:09.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:09.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:09.453 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:36:09.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:09.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:09.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:09.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:09.922 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:36:10.387 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:36:10.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:10.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:10.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:10.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:10.853 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:36:11.320 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:36:11.793 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:36:12.260 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:36:12.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:12.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:12.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:12.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:12.656 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:36:12.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:12.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:12.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:12.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:12.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:12.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:12.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:12.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:12.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:12.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:12.679 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:36:12.679 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:36:12.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:12.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:12.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:12.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:12.731 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:36:13.201 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:36:13.667 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:36:14.139 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:36:14.605 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:36:15.070 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:36:15.534 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:36:15.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:15.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:15.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:15.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:15.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:15.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:15.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:15.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:15.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:15.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:15.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:15.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:15.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:15.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:15.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:36:15.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:36:15.999 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:36:15.999 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:36:15.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:15.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:15.999 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:36:16.470 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:36:16.942 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:36:17.416 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:36:17.887 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:36:18.359 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:36:18.832 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:36:19.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:19.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:19.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:19.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:19.155 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:36:19.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:19.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:19.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:19.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:19.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:36:19.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:36:19.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:36:19.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:36:19.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:36:19.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:36:19.170 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:36:19.171 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2932 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:19.171 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2932 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:19.171 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2932 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:19.171 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2932 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:19.171 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2932 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:19.171 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=2932 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:24.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:36:24.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:36:24.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:36:24.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:36:24.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:36:24.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:36:24.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:36:24.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:36:24.184 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:36:24.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:36:24.184 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:36:24.186 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:36:24.186 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:36:24.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:36:24.187 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:36:24.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:36:24.187 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:36:24.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:36:24.187 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:36:24.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:24.188 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:36:24.189 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:36:24.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:36:24.189 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:36:24.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:36:24.189 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:36:24.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:36:24.189 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:36:24.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:24.190 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:36:24.190 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:36:24.190 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:36:24.190 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:36:24.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:36:24.190 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:36:24.191 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:36:24.191 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:36:24.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:36:24.193 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:36:24.193 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:36:24.193 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:24.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:24.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:24.198 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:36:24.670 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:36:24.712 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:36:24.714 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:36:24.714 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:36:24.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:24.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:24.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:24.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:24.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:24.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:24.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:24.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:24.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:24.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:24.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:24.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:36:24.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:36:24.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:24.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:24.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:24.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:25.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:25.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:25.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:25.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:25.138 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:36:25.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:25.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:25.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:25.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:25.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:25.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:25.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:25.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:25.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:25.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:25.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:36:25.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:36:25.181 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:36:25.182 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:36:25.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:25.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:25.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:25.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:25.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:25.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:25.606 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:36:25.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:25.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:25.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:25.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:25.663 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:36:25.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:25.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:25.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:25.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:25.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:25.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:25.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:25.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:25.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:25.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:25.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:36:25.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:36:25.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:25.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:25.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:25.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:26.078 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:36:26.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:26.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:26.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:26.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:26.550 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:36:27.021 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:36:27.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:27.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:27.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:27.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:27.492 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:36:27.963 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:36:28.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:28.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:28.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:28.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:28.434 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:36:28.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:28.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:28.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:28.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:28.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:28.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:28.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:28.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:28.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:28.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:28.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:28.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:28.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:28.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:28.617 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:36:28.617 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:36:28.667 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:36:28.667 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:36:28.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:28.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:28.904 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:36:29.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:29.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:29.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:29.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:29.375 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:36:29.844 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:36:30.312 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:36:30.777 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:36:31.242 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:36:31.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:31.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:31.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:31.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:31.561 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:36:31.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:31.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:31.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:31.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:31.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:36:31.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:36:31.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:36:31.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:36:31.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:36:31.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:36:31.581 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:36:31.582 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:31.582 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:31.582 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:31.582 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:31.582 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:31.582 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:31.582 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:31.582 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1606 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:31.582 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1606 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:31.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1606 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:31.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1606 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:31.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1606 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:31.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1606 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:31.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1606 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:31.583 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:36:36.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:36:36.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:36:36.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:36:36.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:36:36.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:36:36.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:36:36.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:36:36.592 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:36:36.592 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:36:36.592 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:36:36.592 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:36:36.596 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:36:36.596 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:36:36.596 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:36:36.596 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:36:36.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:36:36.596 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:36:36.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:36:36.597 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:36:36.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:36.600 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:36:36.600 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:36:36.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:36:36.600 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:36:36.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:36:36.600 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:36:36.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:36:36.600 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:36:36.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:36.603 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:36:36.603 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:36:36.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:36:36.603 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:36:36.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:36:36.603 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:36:36.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:36:36.603 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:36:36.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:36.606 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:36:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:36:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:36:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:36:36.606 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:36:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:36:36.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:36:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:36:36.607 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:36:36.607 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:36:36.607 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:36.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:36.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:36.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:36.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:36:36.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:36.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:36.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:36.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:36.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:36:36.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:36:36.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:36.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:36.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:36:36.612 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:36:37.080 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:36:37.137 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:36:37.139 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:36:37.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:37.140 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:36:37.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:37.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:37.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:37.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:37.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:37.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:37.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:37.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:37.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:37.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:37.192 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:36:37.192 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:36:37.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:37.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:37.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:37.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:37.548 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:36:37.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:37.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:37.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:37.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:38.019 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:36:38.492 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:36:38.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:38.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:38.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:38.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:38.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:38.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:38.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:38.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:38.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:38.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:38.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:38.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:38.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:38.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:38.539 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:36:38.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:36:38.580 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:36:38.580 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:36:38.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:38.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:38.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:38.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:38.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:38.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:38.960 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:36:39.426 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:36:39.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:39.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:39.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:39.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:39.897 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:36:40.370 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:36:40.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:40.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:40.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:40.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:40.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:40.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:40.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:40.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:40.694 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:36:40.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:40.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:40.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:40.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:40.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:40.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:40.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:40.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:40.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:40.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:40.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:36:40.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:36:40.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:40.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:40.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:40.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:40.841 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:36:41.309 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:36:41.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:36:41.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:36:41.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:36:41.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:36:41.779 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:36:42.244 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:36:42.716 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:36:43.188 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:36:43.659 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:36:44.133 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:36:44.605 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:36:45.078 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:36:45.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:45.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:45.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:45.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:45.545 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:36:45.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:45.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:45.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:45.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:36:45.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:36:45.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:36:45.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:36:45.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:45.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:36:45.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:36:45.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:36:45.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:36:45.586 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:36:45.586 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:36:45.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:45.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:36:46.014 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:36:46.480 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:36:46.951 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:36:47.424 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:36:47.894 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:36:48.368 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:36:48.839 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:36:49.313 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:36:49.785 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:36:50.257 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:36:50.729 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:36:51.202 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:36:51.673 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:36:52.140 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:36:52.612 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:36:53.081 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:36:53.552 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:36:54.019 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:36:54.483 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:36:54.952 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:36:55.425 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:36:55.897 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:36:56.368 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:36:56.834 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:36:57.305 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:36:57.777 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:36:58.248 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:36:58.722 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:36:59.194 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:36:59.665 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:37:00.136 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:37:00.608 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:37:01.081 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:37:01.553 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:37:02.026 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:37:02.499 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:37:02.971 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 03:37:03.442 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 03:37:03.914 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 03:37:04.381 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 03:37:04.847 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 03:37:05.320 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 03:37:05.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:05.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:05.563 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:37:05.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:37:05.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:37:05.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:37:05.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:37:05.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:37:05.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:37:05.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:37:05.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:37:05.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:37:05.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:37:05.568 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:37:05.569 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6277 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:37:05.569 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6277 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:37:05.569 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6277 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:37:10.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:37:10.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:37:10.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:37:10.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:37:10.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:37:10.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:37:10.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:37:10.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:37:10.586 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:37:10.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:37:10.586 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:37:10.588 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:37:10.588 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:37:10.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:37:10.588 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:37:10.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:37:10.588 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:37:10.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:37:10.588 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:37:10.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:37:10.590 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:37:10.590 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:37:10.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:37:10.590 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:37:10.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:37:10.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:37:10.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:37:10.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:37:10.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:37:10.592 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:37:10.592 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:37:10.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:37:10.592 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:37:10.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:37:10.592 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:37:10.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:37:10.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:37:10.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:37:10.594 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:37:10.594 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:37:10.594 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:10.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:10.599 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:37:11.075 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:37:11.114 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:37:11.115 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:37:11.116 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:37:11.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:11.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:11.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:11.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:11.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:11.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:11.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:11.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:11.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:11.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:37:11.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:37:11.158 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:37:11.158 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:37:11.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:37:11.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:37:11.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:11.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:11.545 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:37:11.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:37:11.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:37:11.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:37:11.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:37:11.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:11.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:11.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:11.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:11.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:11.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:11.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:11.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:11.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:11.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:11.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:11.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:11.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:37:11.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:37:11.792 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:37:11.792 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:37:11.823 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:37:11.823 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:37:11.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:11.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:12.018 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:37:12.483 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:37:12.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:37:12.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:37:12.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:37:12.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:37:12.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:12.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:12.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:12.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:12.747 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:37:12.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:12.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:12.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:12.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:12.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:12.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:12.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:12.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:12.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:37:12.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:37:12.772 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:37:12.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:37:12.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:37:12.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:37:12.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:12.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:12.948 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:37:13.416 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:37:13.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:37:13.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:37:13.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:37:13.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:37:13.884 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:37:14.354 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:37:14.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:37:14.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:37:14.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:37:14.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:37:14.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:14.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:14.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:14.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:14.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:14.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:14.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:14.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:14.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:14.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:14.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:14.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:14.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:37:14.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:37:14.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:37:14.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:37:14.822 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:37:14.822 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:37:14.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:14.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:14.824 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:37:15.292 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:37:15.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:37:15.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:37:15.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:37:15.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:37:15.757 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:37:16.227 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:37:16.699 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:37:17.173 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:37:17.645 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:37:18.117 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:37:18.588 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:37:19.059 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:37:19.525 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:37:19.989 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:37:20.455 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:37:20.927 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:37:21.399 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:37:21.865 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:37:22.337 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:37:22.807 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:37:23.277 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:37:23.748 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:37:24.220 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:37:24.693 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:37:25.165 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:37:25.638 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:37:26.108 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:37:26.579 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:37:27.053 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:37:27.521 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:37:27.990 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:37:28.462 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:37:28.935 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:37:29.408 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:37:29.874 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:37:30.340 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:37:30.805 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:37:31.276 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:37:31.746 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:37:32.211 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:37:32.682 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:37:33.156 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:37:33.629 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:37:34.102 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:37:34.574 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:37:34.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:34.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:34.771 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:37:34.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:37:34.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:37:34.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:37:34.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:37:34.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:37:34.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:37:34.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:37:34.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:37:34.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:37:34.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:37:34.776 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:37:34.776 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5247 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:37:34.776 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5247 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:37:34.776 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=5247 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:37:39.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:37:39.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:37:39.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:37:39.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:37:39.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:37:39.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:37:39.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:37:39.804 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:37:39.804 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:37:39.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:37:39.805 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:37:39.808 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:37:39.808 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:37:39.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:37:39.809 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:37:39.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:37:39.809 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:37:39.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:37:39.810 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:37:39.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:37:39.811 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:37:39.811 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:37:39.811 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:37:39.811 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:37:39.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:37:39.811 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:37:39.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:37:39.812 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:37:39.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:37:39.813 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:37:39.813 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:37:39.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:37:39.813 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:37:39.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:37:39.814 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:37:39.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:37:39.814 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:37:39.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:39.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:37:39.817 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:37:39.817 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:37:39.817 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:39.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:39.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:39.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:39.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:39.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:37:39.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:39.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:39.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:39.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:39.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:37:39.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:37:39.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:39.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:37:39.821 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:37:40.298 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:37:40.339 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:37:40.342 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:37:40.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:40.344 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:37:40.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:40.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:40.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:40.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:40.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:40.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:40.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:40.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:40.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:37:40.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:37:40.395 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:37:40.395 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:37:40.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:37:40.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:37:40.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:40.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:40.769 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:37:40.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:37:40.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:37:40.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:37:40.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:37:41.242 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:37:41.714 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:37:41.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:37:41.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:37:41.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:37:41.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:37:42.185 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:37:42.656 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:37:42.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:37:42.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:37:42.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:37:42.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:37:42.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:42.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:42.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:42.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:42.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:42.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:42.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:42.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:42.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:42.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:42.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:42.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:42.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:37:42.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:37:42.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:37:42.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:37:42.935 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:37:42.935 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:37:42.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:42.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:43.125 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:37:43.589 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:37:43.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:37:43.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:37:43.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:37:43.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:37:44.054 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:37:44.518 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:37:44.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:37:44.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:37:44.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:37:44.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:37:44.986 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:37:45.457 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:37:45.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:45.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:45.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:45.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:45.641 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:37:45.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:45.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:45.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:45.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:45.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:45.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:45.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:45.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:45.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:37:45.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:37:45.670 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:37:45.670 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:37:45.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:37:45.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:37:45.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:45.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:45.928 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:37:46.401 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:37:46.874 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:37:47.346 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:37:47.817 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:37:48.282 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:37:48.752 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:37:49.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:49.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:49.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:49.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:49.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:49.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:49.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:49.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:37:49.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:37:49.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:37:49.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:37:49.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:49.174 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:37:49.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:37:49.174 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:37:49.174 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:37:49.221 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:37:49.223 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:37:49.223 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:37:49.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:49.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:37:49.687 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:37:50.153 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:37:50.619 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:37:51.088 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:37:51.561 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:37:52.034 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:37:52.505 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:37:52.977 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:37:53.448 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:37:53.921 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:37:54.394 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:37:54.866 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:37:55.336 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:37:55.803 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:37:56.276 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:37:56.749 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:37:57.222 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:37:57.693 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:37:58.157 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:37:58.621 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:37:59.086 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:37:59.552 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:38:00.019 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:38:00.492 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:38:00.961 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:38:01.434 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:38:01.906 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:38:02.373 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:38:02.846 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:38:03.318 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:38:03.787 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:38:04.259 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:38:04.731 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:38:05.204 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:38:05.677 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:38:06.149 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 03:38:06.617 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 03:38:07.090 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 03:38:07.562 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 03:38:08.034 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 03:38:08.506 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 03:38:08.980 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 03:38:09.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:09.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:09.170 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:38:09.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:38:09.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:38:09.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:38:09.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:38:09.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:38:09.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:38:09.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:38:09.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:38:09.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:38:09.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:38:09.175 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:38:09.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6368 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:38:09.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6368 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:38:09.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6368 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:38:09.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6368 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:38:09.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6368 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:38:09.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6368 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:38:09.175 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=6368 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:38:14.181 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:38:14.181 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:38:14.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:38:14.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:38:14.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:38:14.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:38:14.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:38:14.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:38:14.191 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:38:14.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:38:14.191 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:38:14.198 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:38:14.198 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:38:14.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:38:14.199 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:38:14.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:38:14.199 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:38:14.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:38:14.199 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:38:14.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:38:14.203 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:38:14.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:38:14.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:38:14.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:38:14.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:38:14.204 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:38:14.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:38:14.204 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:38:14.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:38:14.207 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:38:14.207 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:38:14.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:38:14.207 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:38:14.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:38:14.207 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:38:14.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:38:14.207 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:38:14.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:38:14.211 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:38:14.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:38:14.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:38:14.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:38:14.211 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:38:14.212 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:38:14.212 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:38:14.212 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:14.217 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:38:14.695 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:38:14.739 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:38:14.742 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:38:14.744 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:38:14.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:38:14.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:14.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:14.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:38:14.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:14.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:14.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:38:14.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:38:14.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:14.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:38:14.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:38:14.792 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:38:14.792 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:38:14.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:38:14.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:38:14.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:14.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:15.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:15.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:38:15.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:15.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:15.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:15.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:15.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:38:15.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:15.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:15.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:38:15.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:38:15.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:15.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:38:15.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:38:15.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:38:15.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:38:15.115 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:38:15.115 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:38:15.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:15.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:15.167 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:38:15.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:38:15.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:38:15.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:38:15.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:38:15.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:15.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:38:15.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:15.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:15.456 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:38:15.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:15.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:15.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:38:15.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:15.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:15.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:38:15.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:38:15.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:15.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:38:15.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:38:15.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:38:15.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:38:15.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:38:15.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:38:15.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:15.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:15.637 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:38:16.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:16.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:38:16.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:16.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:16.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:16.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:16.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:38:16.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:16.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:16.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:38:16.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:38:16.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:16.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:38:16.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:38:16.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:38:16.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:38:16.107 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:38:16.107 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:38:16.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:16.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:16.108 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:38:16.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:38:16.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:38:16.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:38:16.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:38:16.580 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:38:16.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:38:16.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:16.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:16.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:16.666 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:38:16.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:38:16.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:38:16.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:38:16.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:38:16.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:38:16.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:38:16.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:38:16.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:38:16.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:38:16.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:38:16.676 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:38:16.676 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:38:16.676 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:38:16.676 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:38:16.676 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:38:16.676 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:38:16.676 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:38:21.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:38:21.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:38:21.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:38:21.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:38:21.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:38:21.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:38:21.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:38:21.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:38:21.704 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:38:21.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:38:21.704 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:38:21.710 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:38:21.711 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:38:21.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:38:21.711 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:38:21.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:38:21.711 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:38:21.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:38:21.711 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:38:21.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:38:21.719 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:38:21.719 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:38:21.720 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:38:21.720 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:38:21.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:38:21.720 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:38:21.720 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:38:21.720 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:38:21.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:38:21.725 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:38:21.725 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:38:21.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:38:21.726 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:38:21.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:38:21.726 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:38:21.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:38:21.726 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:38:21.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:38:21.730 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:38:21.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:38:21.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:38:21.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:38:21.730 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:38:21.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:38:21.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:38:21.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:38:21.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:38:21.730 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:38:21.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:21.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:21.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:38:21.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:38:21.731 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:38:21.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:21.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:21.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:21.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:38:21.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:21.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:21.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:21.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:21.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:21.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:21.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:21.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:38:21.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:38:21.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:38:21.735 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:38:22.201 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:38:22.254 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:38:22.255 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:38:22.257 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:38:22.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:38:22.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:22.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:22.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:38:22.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:22.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:22.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:38:22.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:38:22.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:22.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:38:22.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:38:22.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:38:22.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:38:22.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:38:22.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:38:22.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:22.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:22.670 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:38:22.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:38:22.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:38:22.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:38:22.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:38:23.142 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:38:23.615 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:38:23.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:38:23.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:38:23.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:38:23.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:38:24.088 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:38:24.556 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:38:24.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:38:24.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:38:24.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:38:24.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:38:25.021 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:38:25.486 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:38:25.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:38:25.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:38:25.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:38:25.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:38:25.952 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:38:26.423 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:38:26.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:38:26.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:38:26.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:38:26.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:38:26.897 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:38:27.369 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:38:27.836 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:38:28.310 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:38:28.782 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:38:29.255 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:38:29.726 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:38:30.194 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:38:30.661 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:38:31.128 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:38:31.594 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:38:32.063 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:38:32.536 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:38:33.008 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:38:33.477 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:38:33.948 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:38:34.414 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:38:34.882 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:38:35.353 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:38:35.825 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:38:36.298 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:38:36.766 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:38:37.237 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:38:37.708 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:38:38.178 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:38:38.649 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:38:39.123 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:38:39.595 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:38:40.068 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:38:40.538 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:38:41.009 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:38:41.479 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:38:41.946 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:38:42.412 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:38:42.881 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:38:43.347 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:38:43.814 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:38:44.285 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:38:44.754 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:38:45.227 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:38:45.698 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:38:46.165 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:38:46.637 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:38:47.107 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:38:47.577 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:38:48.042 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 03:38:48.509 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 03:38:48.979 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 03:38:49.446 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 03:38:49.911 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 03:38:50.384 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 03:38:50.857 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 03:38:51.324 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 03:38:51.788 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 03:38:52.260 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 03:38:52.730 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 03:38:53.196 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 03:38:53.663 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 03:38:54.128 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 03:38:54.594 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 03:38:55.061 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 03:38:55.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:55.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:38:55.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:55.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:55.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:55.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:55.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:38:55.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:38:55.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:38:55.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:38:55.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:38:55.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:55.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:38:55.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:38:55.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:38:55.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:38:55.338 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:38:55.338 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:38:55.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:55.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:38:55.528 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 03:38:56.000 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 03:38:56.467 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 03:38:56.933 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 03:38:57.406 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 03:38:57.878 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 03:38:58.351 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 03:38:58.820 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 03:38:59.294 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 03:38:59.766 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 03:39:00.239 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 03:39:00.712 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 03:39:01.184 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 03:39:01.657 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 03:39:02.131 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 03:39:02.602 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 03:39:03.073 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 03:39:03.546 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 03:39:04.019 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 03:39:04.492 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 03:39:04.965 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 03:39:05.437 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 03:39:05.910 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 03:39:06.376 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 03:39:06.839 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 03:39:07.312 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 03:39:07.784 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 03:39:08.255 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 03:39:08.726 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 03:39:09.196 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 03:39:09.662 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-03 03:39:10.129 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-03 03:39:10.595 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-03 03:39:11.060 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-03 03:39:11.529 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-03 03:39:11.998 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-03 03:39:12.467 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-03 03:39:12.938 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-03 03:39:13.404 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-03 03:39:13.871 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-03 03:39:14.337 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-03 03:39:14.803 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-03 03:39:15.272 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-03 03:39:15.741 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-03 03:39:16.206 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-03 03:39:16.675 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-03 03:39:17.145 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-03 03:39:17.618 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-03 03:39:18.091 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-03 03:39:18.563 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-03 03:39:19.037 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-03 03:39:19.510 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-03 03:39:19.982 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-03 03:39:20.455 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-03 03:39:20.924 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-03 03:39:21.397 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-03 03:39:21.869 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-03 03:39:22.340 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-03 03:39:22.813 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-03 03:39:23.282 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-03 03:39:23.752 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-03 03:39:24.222 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-03 03:39:24.688 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-03 03:39:25.156 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-03 03:39:25.623 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-03 03:39:26.093 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-03 03:39:26.560 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-03 03:39:27.027 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-03 03:39:27.496 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-03 03:39:27.964 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-03 03:39:28.429 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-03 03:39:28.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:39:28.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:39:28.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:39:28.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:39:28.868 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:39:28.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:39:28.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:39:28.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:39:28.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:39:28.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:39:28.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:39:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:39:28.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:39:28.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:39:28.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:39:28.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:39:28.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:39:28.894 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-03 03:39:28.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:39:28.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:39:28.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:39:28.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:39:29.361 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-03 03:39:29.828 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-03 03:39:30.293 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-03 03:39:30.764 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-03 03:39:31.235 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-03 03:39:31.705 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-03 03:39:32.176 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-03 03:39:32.650 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-03 03:39:33.122 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-03 03:39:33.594 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-03 03:39:34.065 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-03 03:39:34.536 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-03 03:39:35.004 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-03 03:39:35.477 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-03 03:39:35.949 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-03 03:39:36.420 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-03 03:39:36.891 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-03 03:39:37.358 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-03 03:39:37.822 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-03 03:39:38.288 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-03 03:39:38.759 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-03 03:39:39.231 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-03 03:39:39.700 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-03 03:39:40.165 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-03 03:39:40.634 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-03 03:39:41.101 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-03 03:39:41.566 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-03 03:39:42.033 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-03 03:39:42.500 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-03 03:39:42.965 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-03 03:39:43.431 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-03 03:39:43.897 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-03 03:39:44.363 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-03 03:39:44.832 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-03 03:39:45.302 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-03 03:39:45.771 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-03 03:39:46.236 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-03 03:39:46.704 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-03 03:39:47.174 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-03 03:39:47.645 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-03 03:39:48.112 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-03 03:39:48.585 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-03 03:39:49.055 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-03 03:39:49.528 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-03 03:39:50.000 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-03 03:39:50.471 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-03 03:39:50.945 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-03 03:39:51.417 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-03 03:39:51.889 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-05-03 03:39:52.360 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-05-03 03:39:52.831 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-05-03 03:39:53.298 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-05-03 03:39:53.768 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-05-03 03:39:54.241 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-05-03 03:39:54.714 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-05-03 03:39:55.185 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-05-03 03:39:55.656 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-05-03 03:39:56.121 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-05-03 03:39:56.586 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-05-03 03:39:57.054 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-05-03 03:39:57.523 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-05-03 03:39:57.993 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-05-03 03:39:58.462 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-05-03 03:39:58.928 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-05-03 03:39:59.399 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-05-03 03:39:59.864 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-05-03 03:40:00.329 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-05-03 03:40:00.798 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-05-03 03:40:01.265 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-05-03 03:40:01.731 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-05-03 03:40:02.198 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-05-03 03:40:02.664 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-05-03 03:40:03.137 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-05-03 03:40:03.609 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-05-03 03:40:04.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:04.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:40:04.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:04.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:04.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:04.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:04.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:40:04.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:04.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:04.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:40:04.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:40:04.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:04.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:40:04.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:40:04.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:40:04.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:40:04.075 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:40:04.075 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:40:04.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:04.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:04.079 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-05-03 03:40:04.551 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-05-03 03:40:05.023 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-05-03 03:40:05.495 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-05-03 03:40:05.968 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-05-03 03:40:06.440 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-05-03 03:40:06.911 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-05-03 03:40:07.385 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-05-03 03:40:07.857 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-05-03 03:40:08.330 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-05-03 03:40:08.801 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-05-03 03:40:09.274 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-05-03 03:40:09.745 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-05-03 03:40:10.216 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-05-03 03:40:10.687 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-05-03 03:40:11.154 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-05-03 03:40:11.623 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-05-03 03:40:12.087 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-05-03 03:40:12.553 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-05-03 03:40:13.018 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-05-03 03:40:13.487 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-05-03 03:40:13.959 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-05-03 03:40:14.431 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-05-03 03:40:14.904 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-05-03 03:40:15.377 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-05-03 03:40:15.850 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-05-03 03:40:16.322 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-05-03 03:40:16.795 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-05-03 03:40:17.266 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-05-03 03:40:17.739 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-05-03 03:40:18.211 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-05-03 03:40:18.683 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-05-03 03:40:19.155 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-05-03 03:40:19.627 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-05-03 03:40:19.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:19.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:19.933 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:40:19.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:19.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:19.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:19.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:19.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:40:19.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:40:19.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:40:19.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:40:19.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:40:19.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:40:19.943 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:40:19.943 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=25672 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:40:19.943 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=25672 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:40:19.943 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=25672 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:40:19.943 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=25672 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:40:19.943 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=25672 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:40:19.943 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=25672 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:40:19.943 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=25672 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:40:24.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:40:24.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:40:24.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:40:24.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:40:24.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:40:24.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:40:24.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:40:24.948 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:40:24.948 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:40:24.948 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:40:24.948 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:40:24.949 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:40:24.949 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:40:24.949 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:40:24.949 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:40:24.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:40:24.949 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:40:24.949 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:40:24.949 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:40:24.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:24.950 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:40:24.950 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:40:24.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:40:24.950 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:40:24.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:40:24.950 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:40:24.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:40:24.950 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:40:24.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:24.951 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:40:24.951 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:40:24.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:40:24.951 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:40:24.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:40:24.951 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:40:24.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:40:24.951 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:40:24.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:24.953 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:40:24.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:40:24.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:40:24.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:40:24.953 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:40:24.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:40:24.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:40:24.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:24.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:40:24.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:40:24.953 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:40:24.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:24.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:24.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:40:24.954 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:40:24.954 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:40:24.954 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:24.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:40:24.955 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:40:24.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:40:24.955 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:40:29.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:40:29.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:40:29.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:40:29.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:40:29.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:40:29.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:40:29.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:40:29.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:40:29.965 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:40:29.966 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:40:29.966 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:40:29.966 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:40:29.966 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:40:29.967 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:40:29.967 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:40:29.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:40:29.967 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:40:29.967 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:40:29.967 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:40:29.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:29.968 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:40:29.968 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:40:29.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:40:29.968 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:40:29.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:40:29.968 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:40:29.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:40:29.968 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:40:29.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:29.969 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:40:29.969 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:40:29.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:40:29.969 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:40:29.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:40:29.969 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:40:29.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:40:29.969 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:40:29.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:29.971 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:40:29.971 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:40:29.971 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:40:29.972 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:29.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:29.976 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:40:30.453 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:40:30.496 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:40:30.498 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:40:30.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:40:30.501 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:40:30.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:30.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:30.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:40:30.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:30.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:30.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:40:30.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:40:30.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:30.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:40:30.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:40:30.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:40:30.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:40:30.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:40:30.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:40:30.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:30.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:30.925 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:40:30.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:30.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:30.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:30.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:31.396 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:40:31.867 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:40:31.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:31.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:40:31.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:31.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:31.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:31.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:31.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:31.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:31.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:31.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:31.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:40:32.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:32.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:32.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:40:32.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:40:32.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:32.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:40:32.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:40:32.003 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:40:32.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:40:32.050 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:40:32.050 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:40:32.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:32.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:32.338 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:40:32.811 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:40:32.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:32.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:32.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:32.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:33.284 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:40:33.757 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:40:33.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:33.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:33.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:33.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:34.230 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:40:34.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:34.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:40:34.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:34.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:34.347 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:40:34.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:34.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:34.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:40:34.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:34.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:34.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:40:34.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:40:34.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:34.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:40:34.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:40:34.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:40:34.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:40:34.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:40:34.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:40:34.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:34.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:34.700 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:40:34.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:34.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:34.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:34.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:35.174 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:40:35.646 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:40:36.116 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:40:36.587 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:40:37.058 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:40:37.528 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:40:37.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:37.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:40:37.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:37.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:37.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:37.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:37.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:40:37.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:37.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:37.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:40:37.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:40:37.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:37.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:40:37.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:40:37.712 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:40:37.712 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:40:37.762 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:40:37.762 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:40:37.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:37.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:38.000 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:40:38.473 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:40:38.945 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:40:39.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:39.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:39.029 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:40:39.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:39.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:39.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:39.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:39.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:40:39.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:40:39.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:40:39.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:40:39.036 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:40:39.036 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:40:39.036 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:40:44.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:40:44.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:40:44.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:40:44.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:40:44.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:40:44.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:40:44.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:40:44.046 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:40:44.046 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:40:44.046 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:40:44.046 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:40:44.047 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:40:44.048 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:40:44.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:40:44.048 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:40:44.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:40:44.048 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:40:44.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:40:44.048 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:40:44.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:44.050 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:40:44.050 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:40:44.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:40:44.050 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:40:44.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:40:44.050 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:40:44.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:40:44.050 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:40:44.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:44.052 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:40:44.052 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:40:44.052 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:40:44.052 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:40:44.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:40:44.052 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:40:44.052 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:40:44.052 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:40:44.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:44.054 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:40:44.054 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:40:44.054 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:40:44.055 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:40:44.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:44.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:40:44.059 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:40:44.522 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:40:44.583 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:40:44.585 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:40:44.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:40:44.588 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:40:44.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:44.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:44.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:40:44.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:44.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:44.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:40:44.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:40:44.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:44.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:40:44.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:40:44.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:40:44.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:40:44.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:40:44.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:40:44.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:44.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:44.990 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:40:45.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:45.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:45.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:45.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:45.460 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:40:45.930 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:40:46.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:46.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:46.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:46.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:46.395 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:40:46.865 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:40:47.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:47.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:47.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:47.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:47.339 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:40:47.812 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:40:48.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:48.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:48.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:48.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:48.282 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:40:48.753 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:40:49.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:40:49.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:40:49.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:40:49.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:40:49.226 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:40:49.699 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:40:50.171 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:40:50.642 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:40:51.113 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:40:51.583 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:40:52.054 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:40:52.525 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:40:52.995 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:40:53.467 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:40:53.937 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:40:54.408 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:40:54.882 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:40:55.354 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:40:55.827 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:40:56.298 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:40:56.768 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:40:57.239 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:40:57.713 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:40:58.185 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:40:58.657 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:40:59.128 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:40:59.601 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:40:59.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:59.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:40:59.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:59.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:59.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:59.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:59.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:40:59.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:40:59.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:40:59.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:40:59.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:40:59.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:59.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:40:59.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:40:59.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:40:59.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:40:59.921 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:40:59.921 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:40:59.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:40:59.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:00.067 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:41:00.532 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:41:00.998 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:41:01.463 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:41:01.930 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:41:02.396 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:41:02.866 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:41:03.337 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:41:03.807 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:41:04.274 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:41:04.743 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:41:05.216 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:41:05.686 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:41:06.153 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:41:06.623 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:41:07.091 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:41:07.559 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:41:08.028 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:41:08.495 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:41:08.968 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:41:09.440 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:41:09.913 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:41:10.381 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 03:41:10.852 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 03:41:11.325 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 03:41:11.798 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 03:41:12.270 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 03:41:12.743 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 03:41:13.211 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 03:41:13.682 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 03:41:14.156 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 03:41:14.628 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 03:41:14.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:14.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:41:14.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:14.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:14.984 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:41:15.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:15.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:15.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:41:15.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:15.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:15.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:41:15.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:41:15.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:15.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:41:15.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:41:15.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:41:15.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:41:15.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:41:15.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:41:15.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:15.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:15.101 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 03:41:15.572 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 03:41:16.045 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 03:41:16.517 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 03:41:16.985 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 03:41:17.458 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 03:41:17.931 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 03:41:18.402 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 03:41:18.874 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 03:41:19.340 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 03:41:19.805 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 03:41:20.270 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 03:41:20.743 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 03:41:21.215 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 03:41:21.686 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 03:41:22.157 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 03:41:22.628 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 03:41:23.101 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 03:41:23.571 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 03:41:24.037 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 03:41:24.501 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 03:41:24.967 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 03:41:25.438 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 03:41:25.909 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 03:41:26.381 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 03:41:26.854 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 03:41:27.326 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 03:41:27.797 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 03:41:28.270 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 03:41:28.743 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 03:41:29.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:29.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:41:29.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:29.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:29.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:29.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:29.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:41:29.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:29.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:29.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:41:29.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:41:29.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:29.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:41:29.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:41:29.211 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:41:29.211 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:41:29.215 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 03:41:29.260 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:41:29.260 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:41:29.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:29.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:29.687 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 03:41:30.160 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 03:41:30.630 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 03:41:31.103 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 03:41:31.575 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 03:41:31.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:31.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:31.966 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:41:31.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:41:31.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:41:31.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:41:31.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:41:31.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:41:31.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:41:31.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:41:31.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:41:31.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:41:31.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:41:31.972 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:41:36.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:41:36.982 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:41:36.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:41:36.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:41:36.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:41:36.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:41:36.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:41:36.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:41:36.991 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:41:36.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:41:36.991 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:41:36.993 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:41:36.994 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:41:36.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:41:36.994 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:41:36.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:41:36.995 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:41:36.995 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:41:36.995 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:41:36.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:41:36.996 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:41:36.996 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:41:36.996 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:41:36.996 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:41:36.996 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:41:36.996 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:41:36.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:41:36.997 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:41:36.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:41:36.999 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:41:36.999 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:41:36.999 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:41:36.999 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:41:36.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:41:36.999 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:41:36.999 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:41:36.999 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:41:36.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:41:37.002 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:41:37.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:41:37.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:41:37.003 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:41:37.003 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:41:37.003 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:41:37.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:41:37.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:41:37.008 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:41:37.479 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:41:37.521 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:41:37.523 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:41:37.524 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:41:37.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:41:37.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:37.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:37.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:41:37.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:37.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:37.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:41:37.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:41:37.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:37.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:41:37.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:41:37.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:41:37.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:41:37.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:41:37.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:41:37.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:37.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:37.947 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:41:38.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:41:38.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:41:38.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:41:38.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:41:38.418 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:41:38.891 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:41:39.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:41:39.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:41:39.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:41:39.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:41:39.364 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:41:39.836 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:41:40.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:41:40.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:41:40.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:41:40.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:41:40.306 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:41:40.773 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:41:41.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:41:41.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:41:41.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:41:41.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:41:41.247 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:41:41.719 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:41:42.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:41:42.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:41:42.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:41:42.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:41:42.192 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:41:42.665 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:41:43.138 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:41:43.610 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:41:44.079 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:41:44.551 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:41:45.024 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:41:45.497 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:41:45.968 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:41:46.439 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:41:46.912 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:41:47.383 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:41:47.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:47.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:41:47.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:47.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:47.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:47.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:47.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:41:47.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:47.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:47.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:41:47.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:41:47.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:47.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:41:47.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:41:47.605 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:41:47.605 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:41:47.613 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:41:47.613 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:41:47.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:47.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:47.851 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:41:48.318 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:41:48.783 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:41:49.252 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:41:49.726 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:41:50.198 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:41:50.664 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:41:51.133 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:41:51.602 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:41:52.075 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:41:52.549 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:41:53.021 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:41:53.488 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:41:53.961 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:41:54.431 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:41:54.899 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:41:55.372 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:41:55.846 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:41:56.318 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:41:56.790 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:41:57.263 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:41:57.736 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:41:57.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:57.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:41:57.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:57.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:57.900 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:41:57.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:57.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:57.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:41:57.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:41:57.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:41:57.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:41:57.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:41:57.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:57.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:41:57.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:41:57.922 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:41:57.922 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:41:57.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:41:57.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:41:57.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:57.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:41:58.206 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:41:58.677 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:41:59.150 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:41:59.623 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:42:00.095 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-03 03:42:00.566 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-03 03:42:01.039 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-03 03:42:01.512 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-03 03:42:01.984 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-03 03:42:02.455 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-03 03:42:02.926 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-03 03:42:03.399 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-03 03:42:03.871 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-03 03:42:04.344 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-03 03:42:04.814 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-03 03:42:04.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:04.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:04.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:04.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:04.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:04.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:04.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:04.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:04.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:04.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:04.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:04.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:04.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:42:04.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:42:04.882 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:42:04.882 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:42:04.904 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:42:04.904 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:42:04.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:04.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:05.285 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-03 03:42:05.756 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-03 03:42:06.226 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-03 03:42:06.698 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-03 03:42:07.171 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-03 03:42:07.643 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-03 03:42:08.113 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-03 03:42:08.579 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-03 03:42:09.052 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-03 03:42:09.524 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-03 03:42:09.997 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-03 03:42:10.470 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-03 03:42:10.942 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-03 03:42:11.414 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-03 03:42:11.888 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-03 03:42:12.358 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-03 03:42:12.830 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-03 03:42:13.298 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-03 03:42:13.771 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-03 03:42:14.240 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-03 03:42:14.713 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-03 03:42:15.186 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-03 03:42:15.652 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-03 03:42:16.124 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-03 03:42:16.596 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-03 03:42:17.069 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-03 03:42:17.540 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-03 03:42:18.008 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-03 03:42:18.477 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-03 03:42:18.941 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-03 03:42:19.410 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-03 03:42:19.883 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-03 03:42:20.353 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-03 03:42:20.820 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-03 03:42:21.293 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-03 03:42:21.762 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-03 03:42:22.229 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-03 03:42:22.697 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-03 03:42:23.169 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-03 03:42:23.641 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-03 03:42:24.112 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-03 03:42:24.585 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-03 03:42:24.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:24.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:24.879 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:42:24.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:24.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:24.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:24.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:24.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:42:24.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:42:24.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:42:24.882 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:42:24.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:42:24.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:42:24.882 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:42:29.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:42:29.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:42:29.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:42:29.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:42:29.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:42:29.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:42:29.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:42:29.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:42:29.895 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:42:29.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:42:29.895 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:42:29.896 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:42:29.896 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:42:29.896 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:42:29.896 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:42:29.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:42:29.896 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:42:29.897 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:42:29.897 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:42:29.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:29.897 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:42:29.897 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:42:29.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:42:29.897 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:42:29.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:42:29.897 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:42:29.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:42:29.897 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:42:29.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:29.899 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:42:29.899 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:42:29.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:42:29.899 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:42:29.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:42:29.899 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:42:29.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:42:29.899 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:42:29.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:42:29.903 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:42:29.903 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:42:29.903 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:29.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:29.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:42:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:29.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:29.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:29.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:29.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:29.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:29.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:29.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:29.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:29.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:29.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:29.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:29.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:29.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:29.908 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:42:30.379 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:42:30.430 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:42:30.433 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:42:30.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:30.435 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:42:30.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:30.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:30.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:30.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:30.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:30.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:30.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:30.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:30.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:42:30.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:42:30.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:42:30.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:42:30.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:42:30.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:42:30.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:30.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:30.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:30.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:30.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:30.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:30.850 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:42:30.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:30.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:30.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:30.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:30.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:30.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:30.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:30.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:30.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:42:30.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:42:30.862 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:42:30.862 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:42:30.891 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:42:30.891 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:42:30.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:30.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:30.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:30.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:30.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:30.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:31.322 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:42:31.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:31.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:31.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:31.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:31.382 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:42:31.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:31.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:31.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:31.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:31.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:31.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:31.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:31.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:31.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:42:31.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:42:31.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:42:31.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:42:31.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:42:31.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:42:31.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:31.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:31.793 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:42:31.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:31.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:31.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:31.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:32.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:32.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:32.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:32.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:32.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:32.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:32.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:32.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:32.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:32.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:32.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:32.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:32.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:42:32.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:42:32.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:42:32.207 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:42:32.208 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:42:32.208 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:42:32.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:32.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:32.264 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:42:32.736 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:42:32.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:32.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:32.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:32.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:33.209 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:42:33.679 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:42:33.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:33.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:33.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:33.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:34.152 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:42:34.625 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:42:34.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:34.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:34.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:34.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:35.098 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:42:35.569 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:42:36.037 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:42:36.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:36.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:36.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:36.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:36.293 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:42:36.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:36.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:36.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:36.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:36.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:42:36.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:42:36.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:42:36.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:42:36.316 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:42:36.316 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:42:36.316 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:42:36.316 [WARNING] transceiver.py:257 (TRX1@172.18.37.20:5700/1) RX TRXD message (ver=1 fn=1388 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:42:36.316 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1387 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:42:36.316 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1387 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:42:36.317 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1387 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:42:36.317 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1387 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:42:36.317 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:42:36.317 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1388 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:42:36.317 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1388 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:42:36.317 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1388 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:42:36.317 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1388 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:42:36.317 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1388 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:42:36.317 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1388 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:42:36.317 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1388 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:42:36.317 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=1388 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:42:41.314 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:42:41.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:42:41.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:42:41.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:42:41.314 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:42:41.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:42:41.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:42:41.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:42:41.326 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:42:41.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:42:41.326 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:42:41.330 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:42:41.331 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:42:41.331 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:42:41.331 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:42:41.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:42:41.331 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:42:41.331 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:42:41.332 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:42:41.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:41.336 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:42:41.336 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:42:41.336 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:42:41.336 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:42:41.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:42:41.336 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:42:41.337 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:42:41.337 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:42:41.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:41.341 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:42:41.341 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:42:41.341 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:42:41.341 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:42:41.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:42:41.341 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:42:41.341 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:42:41.341 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:42:41.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:41.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:42:41.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:42:41.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:42:41.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:42:41.348 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:42:41.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:42:41.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:42:41.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:42:41.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:42:41.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:41.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:41.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:41.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:42:41.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:41.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:41.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:41.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:41.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:41.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:41.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:41.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:42:41.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:42:41.349 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:42:41.349 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:42:41.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:41.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:41.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:42:41.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:41.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:41.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:42:41.354 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:42:41.819 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:42:41.875 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:42:41.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:41.876 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:42:41.878 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:42:41.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:41.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:41.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:41.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:41.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:41.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:41.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:41.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:41.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:42:41.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:42:41.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:42:41.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:42:41.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:42:41.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:42:41.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:41.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:42.286 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:42:42.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:42.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:42.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:42.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:42.754 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:42:43.219 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:42:43.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:43.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:43.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:43.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:43.686 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:42:44.156 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:42:44.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:44.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:44.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:44.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:44.627 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:42:45.100 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:42:45.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:45.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:45.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:45.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:45.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:45.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:45.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:45.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:45.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:45.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:45.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:45.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:45.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:42:45.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:42:45.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:42:45.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:42:45.234 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:42:45.234 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:42:45.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:45.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:45.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:45.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:45.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:45.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:45.569 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:42:46.034 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:42:46.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:46.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:46.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:46.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:46.502 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:42:46.967 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:42:47.432 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:42:47.901 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:42:48.365 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:42:48.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:48.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:48.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:48.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:48.574 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:42:48.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:48.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:48.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:48.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:48.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:48.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:48.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:48.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:48.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:42:48.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:42:48.596 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:42:48.596 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:42:48.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:42:48.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:42:48.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:48.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:48.831 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:42:49.297 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:42:49.768 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:42:50.238 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:42:50.710 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:42:51.180 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:42:51.649 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:42:52.119 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:42:52.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:52.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:52.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:52.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:52.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:52.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:52.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:52.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:52.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:52.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:42:52.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:52.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:52.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:42:52.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:42:52.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:42:52.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:42:52.352 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:42:52.352 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:42:52.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:52.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:52.587 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:42:53.058 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:42:53.527 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:42:53.996 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:42:54.466 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:42:54.932 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:42:55.401 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:42:55.866 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:42:56.334 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:42:56.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:42:56.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:42:56.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:42:56.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:42:56.416 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:42:56.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:42:56.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:42:56.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:42:56.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:42:56.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:42:56.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:42:56.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:42:56.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:42:56.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:42:56.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:42:56.425 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:43:01.436 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:43:01.436 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:43:01.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:43:01.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:43:01.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:43:01.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:43:01.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:43:01.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:43:01.447 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:43:01.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:43:01.447 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:43:01.449 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:43:01.450 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:43:01.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:43:01.450 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:43:01.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:43:01.450 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:43:01.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:43:01.450 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:43:01.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:01.453 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:43:01.453 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:43:01.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:43:01.453 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:43:01.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:43:01.453 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:43:01.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:43:01.453 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:43:01.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:01.455 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:43:01.455 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:43:01.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:43:01.455 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:43:01.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:43:01.455 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:43:01.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:43:01.455 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:43:01.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:01.457 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:43:01.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:43:01.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:43:01.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:43:01.457 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:43:01.458 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:43:01.458 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:43:01.458 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:01.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:01.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:01.463 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:43:01.933 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:43:01.984 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:43:01.986 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:43:01.987 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:43:01.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:02.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:02.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:02.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:02.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:02.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:02.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:02.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:02.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:02.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:02.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:02.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:43:02.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:43:02.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:02.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:02.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:02.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:02.400 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:43:02.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:02.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:02.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:02.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:02.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:02.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:02.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:02.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:02.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:02.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:02.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:02.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:02.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:02.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:02.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:02.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:02.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:02.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:02.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:43:02.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:43:02.489 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:43:02.489 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:43:02.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:02.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:02.871 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:43:03.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:03.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:03.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:03.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:03.050 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:43:03.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:03.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:03.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:03.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:03.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:03.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:03.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:03.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:03.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:03.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:03.074 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:43:03.074 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:43:03.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:03.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:03.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:03.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:03.341 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:43:03.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:03.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:03.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:03.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:03.809 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:43:04.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:04.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:04.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:04.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:04.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:04.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:04.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:04.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:04.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:04.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:04.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:04.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:04.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:04.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:04.225 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:43:04.225 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:43:04.277 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:43:04.277 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:43:04.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:04.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:04.278 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:43:04.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:04.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:04.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:04.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:04.748 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:43:05.219 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:43:05.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:05.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:05.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:05.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:05.690 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:43:06.162 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:43:06.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:06.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:06.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:06.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:06.634 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:43:07.107 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:43:07.580 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:43:08.051 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:43:08.523 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:43:08.996 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:43:09.469 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:43:09.942 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:43:10.415 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:43:10.887 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:43:11.358 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:43:11.825 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:43:12.298 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:43:12.770 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:43:13.240 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:43:13.710 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:43:14.177 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:43:14.642 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:43:15.107 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:43:15.571 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:43:16.038 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:43:16.503 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:43:16.968 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:43:17.438 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:43:17.903 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-03 03:43:18.370 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-03 03:43:18.837 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-03 03:43:19.306 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-03 03:43:19.772 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-03 03:43:20.243 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-03 03:43:20.715 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-03 03:43:21.188 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-03 03:43:21.661 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-03 03:43:22.128 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-03 03:43:22.599 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-03 03:43:23.070 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-03 03:43:23.543 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-03 03:43:24.016 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-03 03:43:24.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:24.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:24.221 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:43:24.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:24.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:24.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:24.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:24.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:43:24.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:43:24.227 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:43:24.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:43:24.227 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:43:24.227 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:43:24.227 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:43:29.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:43:29.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:43:29.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:43:29.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:43:29.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:43:29.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:43:29.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:43:29.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:43:29.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:43:29.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:43:29.242 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:43:29.244 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:43:29.244 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:43:29.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:43:29.244 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:43:29.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:43:29.244 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:43:29.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:43:29.244 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:43:29.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:29.245 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:43:29.245 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:43:29.245 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:43:29.245 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:43:29.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:43:29.246 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:43:29.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:43:29.246 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:43:29.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:29.247 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:43:29.247 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:43:29.247 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:43:29.247 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:43:29.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:43:29.247 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:43:29.247 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:43:29.247 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:43:29.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:43:29.249 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:43:29.249 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:43:29.249 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:29.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:29.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:29.254 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:43:29.717 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:43:29.761 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:43:29.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:29.762 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:43:29.763 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:43:29.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:29.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:29.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:29.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:29.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:29.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:29.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:29.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:29.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:29.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:29.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:43:29.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:43:29.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:29.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:29.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:29.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:30.188 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:43:30.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:30.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:30.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:30.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:30.661 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:43:31.133 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:43:31.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:31.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:31.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:31.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:31.604 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:43:32.075 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:43:32.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:32.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:32.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:32.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:32.545 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:43:32.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:32.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:32.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:32.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:32.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:32.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:32.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:32.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:32.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:32.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:32.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:32.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:32.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:32.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:32.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:43:32.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:43:32.681 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:43:32.681 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:43:32.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:32.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:33.016 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:43:33.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:33.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:33.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:33.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:33.483 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:43:33.957 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:43:34.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:34.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:34.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:34.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:34.430 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:43:34.900 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:43:35.370 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:43:35.841 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:43:36.312 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:43:36.777 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:43:37.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:37.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:37.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:37.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:37.193 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:43:37.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:37.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:37.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:37.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:37.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:37.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:37.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:37.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:37.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:37.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:37.221 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:43:37.221 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:43:37.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:37.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:37.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:37.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:37.248 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:43:37.713 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:43:38.180 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:43:38.645 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:43:39.114 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:43:39.581 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:43:40.050 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:43:40.522 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:43:40.993 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:43:41.464 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:43:41.937 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:43:42.404 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:43:42.870 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:43:43.342 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:43:43.814 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:43:43.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:43.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:43.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:43.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:43.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:43.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:43.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:44.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:44.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:44.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:44.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:44.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:44.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:44.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:44.003 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:43:44.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:43:44.049 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:43:44.049 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:43:44.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:44.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:44.285 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:43:44.756 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:43:44.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:44.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:44.838 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:43:44.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:44.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:44.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:44.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:44.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:43:44.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:43:44.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:43:44.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:43:44.846 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:43:44.846 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:43:44.846 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:43:49.849 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:43:49.849 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:43:49.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:43:49.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:43:49.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:43:49.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:43:49.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:43:49.857 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:43:49.857 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:43:49.857 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:43:49.857 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:43:49.860 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:43:49.861 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:43:49.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:43:49.861 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:43:49.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:43:49.861 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:43:49.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:43:49.861 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:43:49.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:49.865 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:43:49.865 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:43:49.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:43:49.865 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:43:49.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:43:49.866 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:43:49.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:43:49.866 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:43:49.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:49.869 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:43:49.870 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:43:49.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:43:49.870 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:43:49.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:43:49.870 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:43:49.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:43:49.870 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:43:49.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:49.876 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:43:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:43:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:43:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:43:49.876 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:43:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:43:49.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:43:49.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:49.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:43:49.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:43:49.877 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:43:49.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:49.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:49.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:49.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:49.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:49.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:49.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:49.877 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:43:49.877 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:43:49.877 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:43:49.877 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:43:49.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:49.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:49.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:43:49.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:49.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:49.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:49.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:49.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:43:49.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:43:49.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:43:49.882 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:43:50.353 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:43:50.412 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:43:50.413 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:43:50.415 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:43:50.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:50.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:50.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:50.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:50.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:50.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:50.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:50.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:50.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:50.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:50.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:50.463 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:43:50.463 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:43:50.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:50.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:50.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:50.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:50.826 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:43:50.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:50.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:50.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:50.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:51.297 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:43:51.767 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:43:51.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:51.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:51.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:51.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:52.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:52.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:52.235 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:43:52.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:52.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:52.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:52.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:52.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:52.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:52.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:52.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:52.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:52.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:52.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:52.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:52.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:43:52.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:43:52.277 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:43:52.277 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-03 03:43:52.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:52.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:52.703 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:43:52.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:52.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:52.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:52.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:53.169 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:43:53.639 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:43:53.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:53.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:53.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:53.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:54.103 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:43:54.570 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:43:54.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:43:54.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:43:54.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:43:54.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:43:55.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:55.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:55.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:55.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:55.012 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:43:55.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:55.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:55.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:55.037 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:43:55.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:55.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:55.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:55.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:55.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:55.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:55.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:55.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:43:55.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:43:55.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:55.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:55.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:55.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:55.505 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:43:55.976 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:43:56.447 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:43:56.914 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:43:57.384 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:43:57.854 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:43:58.326 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:43:58.797 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:43:59.267 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:43:59.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:59.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:59.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:59.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:59.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:59.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:59.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:59.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:43:59.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:43:59.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:43:59.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:43:59.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:59.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:43:59.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:43:59.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:43:59.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:43:59.501 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.37.22:6700) Recv SETFH cmd
2026-05-03 03:43:59.501 [INFO] transceiver.py:201 (MS@172.18.37.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-03 03:43:59.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:59.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:43:59.737 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:44:00.206 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:44:00.675 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:44:01.145 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:44:01.616 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:44:01.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:44:01.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:44:01.699 [INFO] transceiver.py:205 (MS@172.18.37.22:6700) Frequency hopping disabled
2026-05-03 03:44:01.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:01.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:01.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:01.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:01.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:01.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:01.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:01.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:01.707 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:44:01.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:01.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:06.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:06.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:06.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:06.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:06.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:06.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:06.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:06.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:06.727 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:06.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:06.727 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:44:06.729 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:44:06.729 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:44:06.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:06.729 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:06.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:06.729 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:44:06.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:06.729 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:44:06.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:06.730 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:44:06.730 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:44:06.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:06.730 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:06.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:06.730 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:44:06.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:06.730 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:44:06.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:06.732 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:44:06.732 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:44:06.732 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:06.732 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:06.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:06.732 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:44:06.732 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:06.732 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:44:06.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:44:06.734 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:44:06.734 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:44:06.734 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:06.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:06.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:06.739 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:44:07.211 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:44:07.259 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:44:07.261 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:44:07.263 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:44:07.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:07.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:07.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:07.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:07.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:07.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:07.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:07.676 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:44:07.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:07.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:07.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:07.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:07.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:07.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:07.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:07.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:08.148 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:44:08.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:08.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:08.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:08.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:08.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:08.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:08.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:08.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:08.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:08.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:08.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:08.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:08.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:08.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:08.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:08.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:08.569 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:44:08.570 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=400 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:08.570 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=400 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:08.570 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=400 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:08.570 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=400 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:08.570 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=400 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:08.570 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=400 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:13.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:13.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:13.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:13.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:13.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:13.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:13.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:13.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:13.585 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:13.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:13.585 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:44:13.590 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:44:13.591 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:44:13.591 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:13.591 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:13.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:13.592 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:44:13.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:13.592 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:44:13.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:13.595 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:44:13.595 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:44:13.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:13.596 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:13.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:13.596 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:44:13.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:13.596 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:44:13.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:13.599 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:44:13.600 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:44:13.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:13.600 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:13.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:13.600 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:44:13.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:13.600 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:44:13.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:13.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:13.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:13.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:13.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:13.605 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:44:13.605 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:44:13.605 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:44:13.605 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:44:13.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:13.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:13.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:13.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:44:13.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:13.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:13.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:13.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:13.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:13.610 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:44:14.081 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:44:14.133 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:44:14.135 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:44:14.136 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:44:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.545 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:44:14.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:14.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:14.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:14.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:14.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:14.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:15.014 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:44:15.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:15.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:15.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:15.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:15.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:15.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:15.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:15.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:15.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:15.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:15.483 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:44:15.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:15.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:15.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:15.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:15.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:15.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:15.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:15.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:15.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:15.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:15.512 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:15.512 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:15.512 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:44:15.512 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=416 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:15.512 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=416 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:15.513 [WARNING] transceiver.py:257 (TRX1@172.18.37.20:5700/1) RX TRXD message (ver=1 fn=417 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:15.513 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=416 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:15.513 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=416 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:15.513 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=416 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:15.513 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=416 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:15.513 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=416 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:20.507 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:20.507 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:20.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:20.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:20.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:20.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:20.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:20.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:20.522 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:20.522 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:20.522 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:44:20.529 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:44:20.529 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:44:20.529 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:20.529 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:20.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:20.530 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:44:20.530 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:20.530 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:44:20.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:20.535 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:44:20.535 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:44:20.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:20.535 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:20.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:20.536 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:44:20.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:20.536 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:44:20.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:20.539 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:44:20.539 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:44:20.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:20.539 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:20.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:20.539 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:44:20.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:20.539 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:44:20.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:20.543 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:44:20.543 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:44:20.543 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:44:20.544 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:44:20.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:20.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:20.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:20.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:44:20.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:20.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:20.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:20.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:20.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:20.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:20.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:20.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:20.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:20.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:20.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:20.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:20.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:20.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:20.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:20.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:20.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:20.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:20.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:20.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:20.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:20.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:20.548 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:44:21.015 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:44:21.074 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:44:21.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.078 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:44:21.079 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:44:21.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.479 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:44:21.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:21.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:21.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:21.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:21.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:21.946 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:44:22.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:22.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:22.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:22.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:22.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:22.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:22.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:22.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:22.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:22.414 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:44:22.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:22.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:22.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:22.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:22.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:22.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:22.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:22.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:22.418 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:44:22.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:22.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:22.419 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:22.419 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=412 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:22.419 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:22.419 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=412 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:22.419 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=412 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:22.419 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=412 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:22.419 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=412 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:27.423 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:27.423 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:27.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:27.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:27.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:27.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:27.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:27.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:27.426 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:27.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:27.426 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:44:27.427 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:44:27.427 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:44:27.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:27.427 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:27.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:27.427 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:44:27.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:27.427 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:44:27.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:27.428 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:44:27.428 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:44:27.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:27.429 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:27.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:27.429 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:44:27.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:27.429 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:44:27.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:27.430 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:44:27.430 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:44:27.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:27.430 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:27.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:27.430 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:44:27.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:27.430 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:44:27.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:27.432 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:44:27.432 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:44:27.432 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:44:27.433 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:27.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:27.437 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:44:27.905 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:44:27.959 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:44:27.961 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:44:27.963 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:44:27.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:27.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:28.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:28.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:28.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:28.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:28.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:28.371 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:44:28.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:28.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:28.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:28.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:28.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:28.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:28.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:28.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:28.837 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:44:28.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:28.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:28.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:28.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:29.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:29.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:29.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:29.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:29.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:29.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:29.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:29.308 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:44:29.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:29.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:29.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:29.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:29.308 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:44:29.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:29.309 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:29.309 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:29.309 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:29.309 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:29.309 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:29.309 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:29.309 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:34.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:34.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:34.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:34.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:34.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:34.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:34.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:34.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:34.321 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:34.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:34.321 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:44:34.322 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:44:34.323 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:44:34.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:34.323 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:34.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:34.323 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:44:34.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:34.323 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:44:34.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:34.324 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:44:34.324 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:44:34.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:34.324 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:34.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:34.324 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:44:34.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:34.324 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:44:34.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:34.325 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:44:34.325 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:44:34.325 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:34.325 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:34.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:34.326 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:44:34.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:34.326 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:44:34.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:34.327 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:44:34.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:44:34.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:44:34.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:44:34.328 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:44:34.328 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:44:34.328 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:34.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:34.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:34.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:34.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:34.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:34.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:34.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:34.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:34.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:34.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:34.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:34.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:34.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:34.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:34.333 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:44:34.805 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:44:34.856 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:44:34.858 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:44:34.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:34.860 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:44:34.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:34.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:34.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:35.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:35.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:35.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:35.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:35.277 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:44:35.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:35.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:35.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:35.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:35.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:35.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:35.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:35.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:35.746 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:44:35.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:35.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:35.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:35.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:36.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:36.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:36.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:36.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:36.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:36.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:36.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:36.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:36.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:36.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:36.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:36.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:36.179 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:44:41.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:41.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:41.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:41.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:41.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:41.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:41.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:41.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:41.199 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:41.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:41.199 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:44:41.201 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:44:41.201 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:44:41.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:41.201 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:41.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:41.201 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:44:41.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:41.201 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:44:41.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:41.202 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:44:41.202 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:44:41.202 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:41.202 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:41.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:41.202 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:44:41.202 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:41.202 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:44:41.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:41.203 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:44:41.203 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:44:41.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:41.203 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:41.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:41.204 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:44:41.204 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:41.204 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:44:41.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:41.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:44:41.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:44:41.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:44:41.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:44:41.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:44:41.206 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:44:41.206 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:44:41.206 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:41.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:41.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:41.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:41.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:41.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:41.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:41.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:41.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:41.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:41.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:41.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:41.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:41.211 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:44:41.679 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:44:41.736 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:44:41.738 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:44:41.739 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:44:41.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:41.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:41.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:41.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:41.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:41.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.142 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:44:42.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:42.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:42.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:42.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:42.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.611 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:44:42.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:42.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:43.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:43.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:43.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:43.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:43.078 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:44:43.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:43.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:43.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:43.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:43.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:43.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:43.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:43.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:43.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:43.093 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:43.093 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:44:43.093 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=413 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:43.093 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=413 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:43.093 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=413 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:43.093 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=413 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:43.094 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=413 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:43.094 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=413 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:43.094 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=413 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:48.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:48.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:48.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:48.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:48.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:48.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:48.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:48.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:48.094 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:48.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:48.094 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:44:48.095 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:44:48.095 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:44:48.095 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:48.095 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:48.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:48.095 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:44:48.095 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:48.095 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:44:48.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:48.096 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:44:48.096 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:44:48.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:48.096 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:48.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:48.096 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:44:48.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:48.096 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:44:48.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:48.097 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:44:48.097 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:44:48.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:48.098 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:48.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:48.098 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:44:48.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:48.098 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:44:48.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:44:48.100 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:44:48.100 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:44:48.100 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:48.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:48.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:48.105 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:44:48.570 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:44:48.628 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:44:48.630 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:44:48.632 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:44:48.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:48.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:48.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:48.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:48.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:48.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:48.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:48.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:48.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:48.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:48.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.035 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:44:49.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:49.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:49.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:49.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:49.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.502 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:44:49.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:49.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:49.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:49.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:49.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:49.973 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:44:49.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:49.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:49.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:49.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:49.975 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:44:49.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:49.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:49.975 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=411 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:49.975 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:49.975 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:49.975 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:49.975 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:49.975 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:49.975 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:44:54.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:54.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:54.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:54.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:54.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:54.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:54.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:54.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:54.984 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:54.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:44:54.985 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:44:54.987 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:44:54.987 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:44:54.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:54.987 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:54.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:54.987 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:44:54.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:44:54.988 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:44:54.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:54.990 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:44:54.990 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:44:54.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:54.990 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:54.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:54.990 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:44:54.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:44:54.990 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:44:54.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:54.992 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:44:54.992 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:44:54.992 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:54.992 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:44:54.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:54.992 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:44:54.992 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:44:54.992 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:44:54.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:54.995 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:44:54.995 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:44:54.995 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:44:54.996 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:44:54.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:44:55.000 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:44:55.470 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:44:55.523 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:44:55.526 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:44:55.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.528 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:44:55.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:44:55.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:44:55.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:44:55.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:44:55.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:44:55.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:44:55.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:44:55.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:44:55.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:44:55.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:44:55.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:44:55.609 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:45:00.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:00.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:00.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:00.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:00.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:00.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:00.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:00.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:00.621 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:00.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:00.621 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:45:00.623 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:45:00.623 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:45:00.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:00.623 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:00.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:00.623 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:45:00.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:00.623 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:45:00.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:00.625 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:45:00.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:45:00.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:00.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:00.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:00.625 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:45:00.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:00.625 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:45:00.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:00.627 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:45:00.627 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:45:00.627 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:00.627 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:00.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:00.627 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:45:00.627 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:00.627 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:45:00.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:00.629 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:45:00.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:45:00.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:45:00.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:45:00.629 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:45:00.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:45:00.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:45:00.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:00.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:45:00.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:45:00.630 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:45:00.630 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:45:00.630 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:00.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:00.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:00.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:00.634 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:45:01.097 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:45:01.160 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:45:01.162 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:45:01.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.163 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:45:01.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:01.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:01.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:01.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:01.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:01.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:01.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:01.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:01.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:01.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:01.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:01.272 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:45:06.283 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:06.283 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:06.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:06.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:06.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:06.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:06.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:06.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:06.291 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:06.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:06.292 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:45:06.294 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:45:06.294 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:45:06.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:06.294 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:06.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:06.294 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:45:06.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:06.294 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:45:06.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:06.296 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:45:06.296 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:45:06.297 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:06.297 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:06.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:06.297 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:45:06.297 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:06.297 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:45:06.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:06.299 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:45:06.299 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:45:06.299 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:06.299 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:06.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:06.299 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:45:06.299 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:06.299 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:45:06.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:06.301 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:45:06.302 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:45:06.302 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:45:06.302 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:06.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:06.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:06.307 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:45:06.774 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:45:06.827 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:45:06.829 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:45:06.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.831 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:45:06.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:06.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:06.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:06.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:06.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:06.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:06.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:06.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:06.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:06.931 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:06.931 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:06.931 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:45:06.931 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=138 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:06.931 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=138 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:06.931 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=138 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:06.931 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=138 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:06.931 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=138 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:06.931 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=138 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:06.931 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=138 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:11.937 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:11.937 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:11.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:11.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:11.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:11.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:11.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:11.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:11.942 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:11.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:11.942 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:45:11.946 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:45:11.946 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:45:11.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:11.947 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:11.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:11.947 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:45:11.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:11.947 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:45:11.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:11.950 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:45:11.950 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:45:11.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:11.950 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:11.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:11.950 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:45:11.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:11.950 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:45:11.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:11.953 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:45:11.953 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:45:11.953 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:11.953 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:11.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:11.953 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:45:11.953 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:11.953 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:45:11.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:11.956 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:45:11.957 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:45:11.957 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:45:11.957 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:11.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:11.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:11.962 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:45:12.426 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:45:12.485 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:45:12.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.488 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:45:12.492 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:45:12.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:12.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:12.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:12.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:12.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:12.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:12.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:12.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:12.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:12.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:12.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:12.580 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:45:12.580 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=137 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:12.580 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=137 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:12.580 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=137 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:12.580 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=137 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:12.580 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=137 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:12.580 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=137 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:12.580 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=137 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:17.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:17.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:17.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:17.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:17.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:17.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:17.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:17.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:17.598 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:17.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:17.598 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:45:17.600 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:45:17.600 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:45:17.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:17.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:17.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:17.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:45:17.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:17.600 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:45:17.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:17.601 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:45:17.601 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:45:17.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:17.601 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:17.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:17.601 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:45:17.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:17.601 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:45:17.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:17.603 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:45:17.603 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:45:17.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:17.603 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:17.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:17.603 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:45:17.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:17.603 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:45:17.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:17.605 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:45:17.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:45:17.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:45:17.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:45:17.605 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:45:17.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:45:17.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:45:17.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:45:17.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:45:17.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:17.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:17.605 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:45:17.606 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:45:17.606 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:45:17.606 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:17.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:17.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:17.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:17.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:17.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:17.610 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:45:18.084 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:45:18.130 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:45:18.132 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:45:18.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.134 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:45:18.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:18.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:18.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:18.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:18.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:18.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:18.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:18.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:18.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:18.250 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:45:18.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:18.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:23.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:23.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:23.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:23.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:23.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:23.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:23.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:23.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:23.254 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:23.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:23.254 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:45:23.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:45:23.256 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:45:23.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:23.256 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:23.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:23.256 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:45:23.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:23.256 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:45:23.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:23.259 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:45:23.259 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:45:23.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:23.259 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:23.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:23.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:45:23.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:23.259 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:45:23.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:23.262 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:45:23.262 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:45:23.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:23.262 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:23.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:23.262 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:45:23.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:23.262 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:45:23.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:23.264 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:45:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:45:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:45:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:45:23.264 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:45:23.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:45:23.265 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:45:23.265 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:45:23.265 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:23.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:23.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:23.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:23.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:23.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:23.270 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:45:23.734 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:45:23.798 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:45:23.799 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:45:23.801 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:45:23.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:23.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:23.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:23.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:23.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:23.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:23.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:23.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:23.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:23.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:23.921 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:45:23.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:23.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:28.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:28.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:28.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:28.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:28.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:28.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:28.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:28.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:28.937 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:28.938 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:28.938 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:45:28.939 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:45:28.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:45:28.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:28.940 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:28.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:28.940 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:45:28.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:28.940 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:45:28.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:28.941 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:45:28.942 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:45:28.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:28.942 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:28.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:28.942 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:45:28.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:28.942 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:45:28.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:28.943 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:45:28.943 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:45:28.943 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:28.943 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:28.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:28.943 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:45:28.943 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:28.943 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:45:28.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:28.945 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:45:28.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:45:28.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:45:28.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:45:28.945 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:45:28.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:45:28.946 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:45:28.946 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:45:28.946 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:28.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:28.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:28.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:28.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:28.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:28.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:28.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:28.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:28.950 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:45:29.418 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:45:29.473 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:45:29.474 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:45:29.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.478 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:45:29.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:29.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:29.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:29.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:29.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:29.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:29.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:29.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:29.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:29.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:29.569 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:45:29.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:29.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:34.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:34.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:34.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:34.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:34.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:34.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:34.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:34.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:34.598 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:34.599 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:34.599 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:45:34.600 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:45:34.601 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:45:34.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:34.601 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:34.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:34.601 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:45:34.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:34.601 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:45:34.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:34.602 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:45:34.602 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:45:34.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:34.602 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:34.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:34.602 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:45:34.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:34.602 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:45:34.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:34.604 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:45:34.604 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:45:34.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:34.604 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:34.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:34.604 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:45:34.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:34.604 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:45:34.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:45:34.606 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:45:34.606 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:45:34.606 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:34.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:34.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:34.611 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:45:35.080 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:45:35.129 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:45:35.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:35.133 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:45:35.136 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:45:35.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:45:35.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:45:35.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:45:35.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:45:35.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:45:35.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:45:35.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:45:35.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:45:35.549 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:45:35.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:35.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:35.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:35.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:36.023 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:45:36.495 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:45:36.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:36.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:36.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:36.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:36.966 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:45:37.439 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:45:37.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:37.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:37.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:37.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:37.911 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:45:38.383 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:45:38.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:45:38.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:45:38.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:38.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:38.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:38.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:38.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:38.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:38.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:38.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:38.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:38.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:38.601 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:45:38.601 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.602 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.602 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=864 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.602 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=864 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.602 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=864 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.602 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=864 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.602 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=864 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.602 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=864 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.602 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=864 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.602 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.602 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=865 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=865 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=865 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=865 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=865 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=865 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=865 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:38.603 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=865 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:45:43.602 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:43.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:43.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:43.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:43.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:43.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:43.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:43.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:43.612 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:43.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:43.613 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:45:43.616 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:45:43.616 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:45:43.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:43.616 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:43.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:43.617 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:45:43.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:43.618 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:45:43.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:43.619 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:45:43.619 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:45:43.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:43.619 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:43.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:43.619 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:45:43.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:43.620 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:45:43.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:43.622 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:45:43.622 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:45:43.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:43.622 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:43.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:43.622 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:45:43.622 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:43.622 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:45:43.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:43.625 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:45:43.625 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:45:43.625 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:45:43.626 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:43.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:43.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:43.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:43.630 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:45:44.108 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:45:44.154 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:45:44.156 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:45:44.158 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:45:44.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:44.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:45:44.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:45:44.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:45:44.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:45:44.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:45:44.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:45:44.178 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:45:44.178 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:45:44.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 03:45:44.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:45:44.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:45:44.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:45:44.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:45:44.580 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:45:44.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:44.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:44.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:44.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:44.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:45:44.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:45:44.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:45:44.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:45:44.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:45:44.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:45:44.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:45:44.703 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:45:44.703 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:45:44.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:44.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:45:44.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:45:44.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:44.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:44.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:44.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:44.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:44.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:44.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:44.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:44.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:44.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:44.728 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:45:49.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:45:49.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:45:49.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:49.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:49.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:49.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:49.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:45:49.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:49.744 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:49.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:45:49.744 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:45:49.746 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:45:49.746 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:45:49.747 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:49.747 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:49.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:45:49.747 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:45:49.747 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:45:49.747 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:45:49.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:49.749 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:45:49.749 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:45:49.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:49.749 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:49.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:45:49.749 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:45:49.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:45:49.749 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:45:49.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:49.751 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:45:49.751 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:45:49.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:49.751 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:45:49.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:45:49.751 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:45:49.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:45:49.751 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:45:49.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:49.753 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:45:49.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:45:49.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:45:49.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:45:49.753 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:45:49.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:45:49.754 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:45:49.754 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:45:49.754 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:49.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:49.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:49.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:49.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:49.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:49.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:49.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:45:49.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:49.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:49.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:49.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:49.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:45:49.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:45:49.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:49.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:45:49.759 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:45:50.222 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:45:50.286 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:45:50.287 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:45:50.288 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:45:50.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:50.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:45:50.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:45:50.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:45:50.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:45:50.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:45:50.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:45:50.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:45:50.320 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:45:50.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 03:45:50.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:45:50.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:45:50.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:45:50.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:45:50.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:45:50.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:45:50.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:45:50.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:45:50.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:45:50.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:45:50.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:45:50.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:45:50.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:45:50.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:45:50.687 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:45:50.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:50.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:50.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:50.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:51.155 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:45:51.621 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:45:51.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:51.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:51.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:51.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:52.086 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:45:52.552 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-03 03:45:52.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:52.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:52.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:52.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:53.023 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-03 03:45:53.494 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-03 03:45:53.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:53.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:53.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:53.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:53.967 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-03 03:45:54.439 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-03 03:45:54.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:45:54.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:45:54.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:45:54.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:45:54.910 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-03 03:45:55.381 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-03 03:45:55.854 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-03 03:45:56.327 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-03 03:45:56.797 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-03 03:45:57.270 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-03 03:45:57.740 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-03 03:45:58.212 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-03 03:45:58.685 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-03 03:45:59.152 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-03 03:45:59.624 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-03 03:46:00.095 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-03 03:46:00.566 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-03 03:46:01.036 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-03 03:46:01.507 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-03 03:46:01.979 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-03 03:46:02.452 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-03 03:46:02.925 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-03 03:46:03.398 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-03 03:46:03.871 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-03 03:46:04.343 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-03 03:46:04.816 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-03 03:46:05.289 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-03 03:46:05.761 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-03 03:46:06.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:46:06.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:46:06.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:46:06.065 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=3536 tn=0 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.065 [WARNING] transceiver.py:257 (MS@172.18.37.22:6700) RX TRXD message (fn=3536 tn=1 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:46:06.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:46:06.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:46:06.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:46:06.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:46:06.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:46:06.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:46:06.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:46:06.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:46:06.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:46:06.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:46:06.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:46:06.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:46:06.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:46:06.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:46:06.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:46:06.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:46:06.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:46:06.154 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:46:06.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:46:06.154 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3553 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.154 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3554 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3554 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3554 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3554 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3554 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3554 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3554 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3554 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3555 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3555 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3555 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3555 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3555 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3555 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3555 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:06.155 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=3555 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:11.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:46:11.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:46:11.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:46:11.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:46:11.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:46:11.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:46:11.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:46:11.162 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:46:11.162 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:11.163 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:46:11.163 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:46:11.165 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:46:11.166 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:46:11.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:46:11.166 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:11.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:46:11.167 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:46:11.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:46:11.167 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:46:11.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:46:11.168 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:46:11.168 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:46:11.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:46:11.168 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:11.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:46:11.169 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:46:11.169 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:46:11.169 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:46:11.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:46:11.170 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:46:11.171 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:46:11.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:46:11.171 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:11.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:46:11.171 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:46:11.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:46:11.171 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:46:11.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:46:11.173 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:46:11.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:46:11.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:46:11.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:46:11.173 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:46:11.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:46:11.174 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:46:11.174 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:46:11.174 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:11.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:11.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:11.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:11.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:11.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:11.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:11.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:11.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:11.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:11.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:11.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:11.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:11.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:11.179 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:46:11.657 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:46:11.704 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:46:11.706 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:46:11.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:46:11.709 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:46:11.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:46:11.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:46:11.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:46:11.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:46:11.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:46:11.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:46:11.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:46:11.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:46:11.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 03:46:11.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:46:11.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:46:11.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:46:11.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:46:11.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:46:11.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 03:46:12.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:46:12.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:46:12.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:46:12.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:46:12.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:46:12.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:46:12.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:46:12.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:46:12.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:46:12.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:46:12.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:46:12.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:46:12.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:46:12.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:46:12.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:46:12.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:46:12.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:46:12.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:46:12.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:46:12.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:46:12.090 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:46:12.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:46:12.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:46:17.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:46:17.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:46:17.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:46:17.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:46:17.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:46:17.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:46:17.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:46:17.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:46:17.111 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:17.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:46:17.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:46:17.113 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:46:17.113 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:46:17.113 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:46:17.113 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:17.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:46:17.113 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:46:17.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:46:17.114 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:46:17.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:46:17.116 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:46:17.116 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:46:17.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:46:17.117 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:17.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:46:17.117 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:46:17.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:46:17.117 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:46:17.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:46:17.119 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:46:17.119 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:46:17.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:46:17.119 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:17.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:46:17.120 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:46:17.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:46:17.120 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:46:17.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:46:17.122 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:46:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:46:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:46:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:46:17.122 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:46:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:46:17.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:46:17.123 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:46:17.123 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:46:17.123 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:17.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:17.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:17.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:17.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:17.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:17.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:17.128 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-03 03:46:17.600 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-03 03:46:17.653 [DEBUG] fake_trx.py:278 (BTS@172.18.37.20:5700) Recv FAKE_TOA cmd
2026-05-03 03:46:17.655 [DEBUG] fake_trx.py:297 (BTS@172.18.37.20:5700) Recv FAKE_RSSI cmd
2026-05-03 03:46:17.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:46:17.657 [DEBUG] fake_trx.py:322 (BTS@172.18.37.20:5700) Recv FAKE_CI cmd
2026-05-03 03:46:17.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:46:17.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:46:17.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:46:17.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:46:17.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:46:17.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:46:17.678 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:46:17.678 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:46:17.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD HANDOVER
2026-05-03 03:46:17.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:46:17.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:46:17.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:46:17.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:46:18.072 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-03 03:46:18.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:46:18.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:46:18.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:46:18.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:46:18.543 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-03 03:46:19.015 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-03 03:46:19.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:46:19.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:46:19.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:46:19.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:46:19.485 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-03 03:46:19.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:46:19.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:46:19.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:46:19.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD ECHO
2026-05-03 03:46:19.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.37.22:6700) Ignore CMD SETSLOT
2026-05-03 03:46:19.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.37.22:6700) Recv RXTUNE cmd
2026-05-03 03:46:19.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.37.22:6700) Recv TXTUNE cmd
2026-05-03 03:46:19.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.37.22:6700) Recv POWERON CMD
2026-05-03 03:46:19.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.37.22:6700) Starting transceiver...
2026-05-03 03:46:19.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD NOHANDOVER
2026-05-03 03:46:19.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.37.22:6700) Recv POWEROFF cmd
2026-05-03 03:46:19.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.37.22:6700) Stopping transceiver...
2026-05-03 03:46:19.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:46:19.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:46:19.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:46:19.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:46:19.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:46:19.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:46:19.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:46:19.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:46:19.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:46:19.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:46:19.780 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:46:19.781 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=576 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:19.781 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=576 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:19.781 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=576 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:19.781 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=576 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:19.781 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=576 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:19.781 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=576 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:19.781 [WARNING] transceiver.py:257 (BTS@172.18.37.20:5700) RX TRXD message (ver=1 fn=576 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-03 03:46:24.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:46:24.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:46:24.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:46:24.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:46:24.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:46:24.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:46:24.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:46:24.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:46:24.779 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:24.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:46:24.779 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:46:24.780 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:46:24.780 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:46:24.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:46:24.781 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:24.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:46:24.781 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:46:24.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:46:24.781 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:46:24.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:46:24.782 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:46:24.782 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:46:24.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:46:24.782 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:24.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:46:24.782 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:46:24.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:46:24.782 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:46:24.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:46:24.783 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:46:24.783 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:46:24.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:46:24.783 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:24.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:46:24.783 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:46:24.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:46:24.783 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:46:24.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:24.785 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:46:24.785 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:46:24.785 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:46:24.786 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:46:24.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:24.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:24.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:24.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:46:24.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:24.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:24.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:24.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:24.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:24.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:24.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:46:24.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:46:24.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:46:24.787 [INFO] transceiver.py:246 Stopping clock generator
2026-05-03 03:46:29.792 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:46:29.792 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:46:29.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:46:29.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:46:29.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:46:29.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:46:29.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:46:29.797 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:46:29.797 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.37.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:29.797 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.37.20:5700) Recv SETFORMAT cmd
2026-05-03 03:46:29.797 [INFO] ctrl_if_trx.py:201 (BTS@172.18.37.20:5700) TRXD header version 1 -> 1
2026-05-03 03:46:29.798 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.37.20:5700/1) Recv RXTUNE cmd
2026-05-03 03:46:29.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.37.20:5700/1) Recv TXTUNE cmd
2026-05-03 03:46:29.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:46:29.799 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.37.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:29.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:46:29.799 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.37.20:5700/1) Recv NOMTXPOWER cmd
2026-05-03 03:46:29.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.37.20:5700/1) Recv SETFORMAT cmd
2026-05-03 03:46:29.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.37.20:5700/1) TRXD header version 1 -> 1
2026-05-03 03:46:29.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.37.20:5700/1) Recv SETPOWER cmd
2026-05-03 03:46:29.800 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.37.20:5700/2) Recv RXTUNE cmd
2026-05-03 03:46:29.800 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.37.20:5700/2) Recv TXTUNE cmd
2026-05-03 03:46:29.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:46:29.800 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.37.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:29.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:46:29.800 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.37.20:5700/2) Recv NOMTXPOWER cmd
2026-05-03 03:46:29.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.37.20:5700/2) Recv SETFORMAT cmd
2026-05-03 03:46:29.800 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.37.20:5700/2) TRXD header version 1 -> 1
2026-05-03 03:46:29.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.37.20:5700/2) Recv SETPOWER cmd
2026-05-03 03:46:29.801 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.37.20:5700/3) Recv RXTUNE cmd
2026-05-03 03:46:29.801 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.37.20:5700/3) Recv TXTUNE cmd
2026-05-03 03:46:29.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:46:29.801 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.37.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-03 03:46:29.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:46:29.801 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.37.20:5700/3) Recv NOMTXPOWER cmd
2026-05-03 03:46:29.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.37.20:5700/3) Recv SETFORMAT cmd
2026-05-03 03:46:29.802 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.37.20:5700/3) TRXD header version 1 -> 1
2026-05-03 03:46:29.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.37.20:5700/3) Recv SETPOWER cmd
2026-05-03 03:46:29.803 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.37.20:5700) Recv RXTUNE cmd
2026-05-03 03:46:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETTSC
2026-05-03 03:46:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETTSC
2026-05-03 03:46:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETTSC
2026-05-03 03:46:29.803 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.37.20:5700) Recv TXTUNE cmd
2026-05-03 03:46:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETRXGAIN
2026-05-03 03:46:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETRXGAIN
2026-05-03 03:46:29.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETTSC
2026-05-03 03:46:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETRXGAIN
2026-05-03 03:46:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:29.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.37.20:5700) Recv NOMTXPOWER cmd
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.37.20:5700) Recv SETPOWER cmd
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.37.20:5700) Recv POWERON CMD
2026-05-03 03:46:29.804 [INFO] ctrl_if_trx.py:109 (BTS@172.18.37.20:5700) Starting transceiver...
2026-05-03 03:46:29.804 [INFO] transceiver.py:243 Starting clock generator
2026-05-03 03:46:29.804 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETRXGAIN
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:29.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.37.20:5700/1) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.37.20:5700/1) Recv RFMUTE cmd
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.37.20:5700/2) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.37.20:5700/3) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.37.20:5700) Ignore CMD SETSLOT
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.37.20:5700/2) Recv RFMUTE cmd
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.37.20:5700) Recv RFMUTE cmd
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.37.20:5700/3) Recv RFMUTE cmd
2026-05-03 03:46:29.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.37.20:5700) Recv POWEROFF cmd
2026-05-03 03:46:29.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.37.20:5700) Stopping transceiver...
2026-05-03 03:46:29.805 [INFO] transceiver.py:246 Stopping clock generator